Changeset e9ae97fb in rtems
- Timestamp:
- Nov 9, 2001, 12:04:57 AM (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 1a98a0d
- Parents:
- de202e7
- Location:
- c/src/lib
- Files:
-
- 5 added
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c
rde202e7 re9ae97fb 367 367 v, i->pc); 368 368 #endif 369 #if def ppc403369 #if defined(ppc403) || defined(ppc405) 370 370 if (v == PPC_IRQ_EXTERNAL) 371 371 { … … 628 628 break; 629 629 630 #if defined(ppc403) 630 #if defined(ppc403) || defined(ppc405) 631 631 632 632 /* PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET -
c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h
rde202e7 re9ae97fb 475 475 boolean exceptions_in_RAM; /* TRUE if in RAM */ 476 476 477 #if (defined(ppc403) || defined( mpc860) || defined(mpc821))477 #if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821)) 478 478 unsigned32 serial_per_sec; /* Serial clocks per second */ 479 479 boolean serial_external_clock; … … 509 509 (_CPU_Table.exceptions_in_RAM) 510 510 511 #if (defined(ppc403) || defined( mpc860) || defined(mpc821))511 #if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821)) 512 512 513 513 #define rtems_cpu_configuration_get_serial_per_sec() \ -
c/src/lib/libcpu/powerpc/ChangeLog
rde202e7 re9ae97fb 1 2001-11-08 Dennis Ehlin (ECS) <Dennis.Ehlin@ecs.ericsson.se> 2 3 This modification is part of the submitted modifications necessary to 4 support the IBM PPC405 family. This submission was reviewed by 5 Thomas Doerfler <Thomas.Doerfler@imd-systems.de> who ensured it did 6 not negatively impact the ppc403 BSPs. The submission and tracking 7 process was captured as PR50. 8 * ppc403/console/console405.c ppc403/tty_drv/.cvsignore, 9 ppc403/tty_drv/Makefile.am, ppc403/tty_drv/tty_drv.c, 10 ppc403/tty_drv/tty_drv.h: New files. 11 * Makefile.am, README, configure.ac, old_exception_processing/cpu.c, 12 old_exception_processing/cpu.h, ppc403/Makefile.am, 13 ppc403/clock/clock.c, ppc403/console/Makefile.am, 14 ppc403/console/console.c, ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h, 15 ppc403/timer/timer.c: Modified. 16 1 17 2001-11-07 Joel Sherrill <joel@OARcorp.com> 2 18 -
c/src/lib/libcpu/powerpc/Makefile.am
rde202e7 re9ae97fb 35 35 CPU_SUBDIR = ppc403 36 36 endif 37 if ppc405 38 ## 403 and 405 chips use the same CPU sources... 39 CPU_SUBDIR = ppc403 40 endif 37 41 38 42 SUBDIRS = $(SHARED_LIB) $(EXCEPTION_SUBDIR) $(CPU_SUBDIR) wrapup -
c/src/lib/libcpu/powerpc/README
rde202e7 re9ae97fb 10 10 of the PowerPC family, an entry per CPU type is provided. 11 11 12 Initially, (4/December/1995), only the PPC403 was supported.13 12 At this time, support is included for the following PowerPC 14 family members :13 family members using the new exception processing model: 15 14 16 15 + mpc505 16 + mpc6xx 17 17 + mpc750 18 + mpc821 18 + mpc821 19 + mpc823 (uses mpc821 directory) 20 + mpc850 (uses mpc860 directory) 19 21 + mpc860 22 + mpc8260 23 24 The following PowerPC family members are supported but 25 still use the old exception processing model: 26 20 27 + ppc403 21 + mpc8260 28 + ppc405 (uses ppc403 directory) 29 + ppc6xx (no libcpu support) 22 30 23 31 Note that because of similarities in various family members, -
c/src/lib/libcpu/powerpc/configure.ac
rde202e7 re9ae97fb 51 51 AM_CONDITIONAL(old_exception_processing, \ 52 52 test "$RTEMS_CPU_MODEL" = "ppc403" || \ 53 test "$RTEMS_CPU_MODEL" = "ppc405" || \ 53 54 test "$RTEMS_CPU_MODEL" = "mpc505" || \ 54 55 test "$RTEMS_CPU_MODEL" = "ppc603e" \ … … 65 66 AM_CONDITIONAL(mpc8260, test "$RTEMS_CPU_MODEL" = "mpc8260") 66 67 AM_CONDITIONAL(ppc403, test "$RTEMS_CPU_MODEL" = "ppc403") 68 AM_CONDITIONAL(ppc405, test "$RTEMS_CPU_MODEL" = "ppc405") 67 69 68 70 # Explicitly list all Makefiles here … … 83 85 ppc403/clock/Makefile 84 86 ppc403/console/Makefile 87 ppc403/tty_drv/Makefile 85 88 ppc403/ictrl/Makefile 86 89 ppc403/timer/Makefile -
c/src/lib/libcpu/powerpc/old-exceptions/cpu.c
rde202e7 re9ae97fb 367 367 v, i->pc); 368 368 #endif 369 #if def ppc403369 #if defined(ppc403) || defined(ppc405) 370 370 if (v == PPC_IRQ_EXTERNAL) 371 371 { … … 628 628 break; 629 629 630 #if defined(ppc403) 630 #if defined(ppc403) || defined(ppc405) 631 631 632 632 /* PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET -
c/src/lib/libcpu/powerpc/old_exception_processing/cpu.c
rde202e7 re9ae97fb 367 367 v, i->pc); 368 368 #endif 369 #if def ppc403369 #if defined(ppc403) || defined(ppc405) 370 370 if (v == PPC_IRQ_EXTERNAL) 371 371 { … … 628 628 break; 629 629 630 #if defined(ppc403) 630 #if defined(ppc403) || defined(ppc405) 631 631 632 632 /* PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET -
c/src/lib/libcpu/powerpc/old_exception_processing/cpu.h
rde202e7 re9ae97fb 475 475 boolean exceptions_in_RAM; /* TRUE if in RAM */ 476 476 477 #if (defined(ppc403) || defined( mpc860) || defined(mpc821))477 #if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821)) 478 478 unsigned32 serial_per_sec; /* Serial clocks per second */ 479 479 boolean serial_external_clock; … … 509 509 (_CPU_Table.exceptions_in_RAM) 510 510 511 #if (defined(ppc403) || defined( mpc860) || defined(mpc821))511 #if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821)) 512 512 513 513 #define rtems_cpu_configuration_get_serial_per_sec() \ -
c/src/lib/libcpu/powerpc/ppc403/Makefile.am
rde202e7 re9ae97fb 5 5 AUTOMAKE_OPTIONS = foreign 1.4 6 6 7 if ppc403 7 8 SUBDIRS = console clock timer vectors ictrl 9 endif 10 if ppc405 11 SUBDIRS = console tty_drv clock timer vectors ictrl 12 endif 8 13 9 14 include $(top_srcdir)/../../../../../automake/subdirs.am -
c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
rde202e7 re9ae97fb 26 26 * COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. 27 27 * 28 *29 28 * COPYRIGHT (c) 1989-1999. 30 29 * On-Line Applications Research Corporation (OAR). … … 34 33 * http://www.OARcorp.com/rtems/license.html. 35 34 * 35 * Modifications for PPC405GP by Dennis Ehlin 36 * 36 37 * $Id$ 37 38 */ … … 60 61 register rtems_unsigned32 rc; 61 62 63 #ifndef ppc405 /* this is a ppc403 */ 62 64 asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */ 65 #else /* ppc405 */ 66 asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */ 67 #endif /* ppc405 */ 63 68 64 69 return rc; … … 72 77 Clock_isr(rtems_vector_number vector) 73 78 { 79 rtems_unsigned32 clicks_til_next_interrupt; 74 80 if (!auto_restart) 75 81 { 76 rtems_unsigned32 clicks_til_next_interrupt;77 82 rtems_unsigned32 itimer_value; 78 79 83 /* 80 84 * setup for next interrupt; making sure the new value is reasonably … … 132 136 { 133 137 rtems_isr_entry previous_isr; 134 rtems_unsigned32 pvr,iocr;138 rtems_unsigned32 iocr; 135 139 register rtems_unsigned32 tcr; 140 #ifdef ppc403 141 rtems_unsigned32 pvr; 142 #endif /* ppc403 */ 136 143 137 144 Clock_driver_ticks = 0; 138 145 146 #ifndef ppc405 /* this is a ppc403 */ 139 147 asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */ 140 141 148 if (rtems_cpu_configuration_get_timer_internal_clock()) { 142 149 iocr &= ~4; /* timer clocked from system clock */ … … 145 152 iocr |= 4; /* select external timer clock */ 146 153 } 147 148 154 asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */ 149 155 150 156 asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */ 151 152 157 if (((pvr & 0xffff0000) >> 16) != 0x0020) 153 158 return; /* Not a ppc403 */ … … 163 168 auto_restart = 1; 164 169 170 #else /* ppc405 */ 171 asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr)); /*405GP CPC0_CR1 */ 172 if (rtems_cpu_configuration_get_timer_internal_clock()) { 173 iocr &=~0x800000 ;/* timer clocked from system clock CETE*/ 174 } 175 else { 176 iocr |= 0x800000; /* select external timer clock CETE*/ 177 } 178 asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */ 179 180 /* 181 * Enable auto restart 182 */ 183 184 auto_restart=1; 185 186 #endif /* ppc405 */ 165 187 pit_value = rtems_configuration_get_microseconds_per_tick() * 166 188 rtems_cpu_configuration_get_clicks_per_usec(); 167 189 168 169 190 /* 170 191 * initialize the interval here … … 177 198 rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr); 178 199 200 /* 201 * Set PIT value 202 */ 203 179 204 asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */ 180 205 181 asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ 182 183 tcr &= ~ 0x04400000; 184 185 tcr |= (auto_restart ? 0x04400000 : 0x04000000); 186 206 /* 207 * Set timer to autoreload, bit TCR->ARE = 1 0x0400000 208 * Enable PIT interrupt, bit TCR->PIE = 1 0x4000000 209 */ 187 210 tick_time = get_itimer() + pit_value; 188 211 asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ 212 tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000); 189 213 asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ 190 214 … … 209 233 * Called via atexit() 210 234 * Remove the clock interrupt handler by setting handler to NULL 235 * 236 * This will not work on the 405GP because 237 * when bit's are set in TCR they can only be unset by a reset 211 238 */ 212 239 -
c/src/lib/libcpu/powerpc/ppc403/console/Makefile.am
rde202e7 re9ae97fb 7 7 PGM = $(ARCH)/console.rel 8 8 9 if ppc403 9 10 C_FILES = console.c 11 endif 12 if ppc405 13 C_FILES = console405.c 14 endif 10 15 11 16 console_rel_OBJECTS = $(C_FILES:%.c=$(ARCH)/%.o) … … 26 31 .PRECIOUS: $(PGM) 27 32 28 EXTRA_DIST = console.c console.c.polled 33 EXTRA_DIST = console.c console.c.polled console405.c 29 34 30 35 include $(top_srcdir)/../../../../../automake/local.am -
c/src/lib/libcpu/powerpc/ppc403/console/console.c
rde202e7 re9ae97fb 148 148 149 149 static void *spittyp; /* handle for termios */ 150 int ppc403_spi_interrupt = 1; /* do notuse interrupts... */150 int ppc403_spi_interrupt = 1; /* use interrupts... */ 151 151 152 152 /* -
c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c
rde202e7 re9ae97fb 19 19 * of this software for any purpose. 20 20 * 21 * Modifications for PPC405GP by Dennis Ehlin 22 * 21 23 */ 22 24 … … 42 44 * clear bits in EXISR that have a bit set in mask 43 45 */ 46 #if defined(ppc405) 44 47 RTEMS_INLINE_ROUTINE void 45 48 clr_exisr(unsigned32 mask) 46 49 { 50 asm volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/ 51 } 52 53 /* 54 * get value of EXISR 55 */ 56 RTEMS_INLINE_ROUTINE unsigned32 57 get_exisr(void) 58 { 59 unsigned32 val; 60 61 asm volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/ 62 return val; 63 } 64 65 /* 66 * get value of EXIER 67 */ 68 RTEMS_INLINE_ROUTINE unsigned32 69 get_exier(void) 70 { 71 unsigned32 val; 72 asm volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/ 73 return val; 74 } 75 76 /* 77 * set value of EXIER 78 */ 79 RTEMS_INLINE_ROUTINE void 80 set_exier(unsigned32 val) 81 { 82 asm volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/ 83 } 84 85 #else /* not ppc405 */ 86 87 RTEMS_INLINE_ROUTINE void 88 clr_exisr(unsigned32 mask) 89 { 47 90 asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/ 48 91 } … … 79 122 asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/ 80 123 } 81 124 #endif /* ppc405 */ 82 125 /* 83 126 * enable an external interrupt, make this interrupt consistent … … 192 235 if ((vector >= PPC_IRQ_EXT_BASE) && 193 236 (vector < PPC_IRQ_EXT_BASE + PPC_IRQ_EXT_MAX)) { 194 195 237 /* return old handler entry */ 196 238 *old_handler = ictrl_vector_table[vector - PPC_IRQ_EXT_BASE]; -
c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h
rde202e7 re9ae97fb 19 19 * IMD makes no representations about the suitability 20 20 * of this software for any purpose. 21 * 22 * Modifications for PPC405GP by Dennis Ehlin 21 23 * 22 24 */ … … 41 43 /* mask for external interrupt status in EXIER/EXISR register */ 42 44 /* note: critical interrupt is in these registers aswell */ 45 #ifndef ppc405 43 46 #define PPC_EXI_MASK 0x0FFFFFFF 47 #else /* ppc405 */ 48 #define PPC_EXI_MASK 0xFFFFFFFF 49 #endif /* ppc405 */ 44 50 51 #ifndef ppc405 45 52 #define PPC_IRQ_EXT_SPIR (PPC_IRQ_EXT_BASE+4) 46 53 #define PPC_IRQ_EXT_SPIT (PPC_IRQ_EXT_BASE+5) 54 #else /* ppc405 */ 55 #define PPC_IRQ_EXT_UART0 (PPC_IRQ_EXT_BASE+0) 56 #define PPC_IRQ_EXT_UART1 (PPC_IRQ_EXT_BASE+1) 57 #endif /* ppc405 */ 47 58 #define PPC_IRQ_EXT_JTAGR (PPC_IRQ_EXT_BASE+6) 48 59 #define PPC_IRQ_EXT_JTAGT (PPC_IRQ_EXT_BASE+7) -
c/src/lib/libcpu/powerpc/ppc403/timer/timer.c
rde202e7 re9ae97fb 31 31 * http://www.OARcorp.com/rtems/license.html. 32 32 * 33 * Modifications for PPC405GP by Dennis Ehlin 34 * 33 35 * $Id$ 36 * 34 37 */ 35 38 … … 46 49 rtems_unsigned32 ret; 47 50 51 #ifndef ppc405 48 52 asm volatile ("mfspr %0, 0x3dd" : "=r" ((ret))); /* TBLO */ 53 #else /* ppc405 */ 54 /* asm volatile ("mfspr %0, 0x3dd" : "=r" ((ret))); TBLO */ 55 56 asm volatile ("mfspr %0, 0x10c" : "=r" ((ret))); /* 405GP TBL */ 57 #endif /* ppc405 */ 49 58 50 59 return ret; … … 55 64 rtems_unsigned32 iocr; 56 65 66 #ifndef ppc405 57 67 asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */ 58 68 iocr &= ~4; 59 69 iocr |= 4; /* Select external timer clock */ 60 70 asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */ 71 #else /* ppc405 */ 72 asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr)); /*405GP CPC0_CR1 */ 73 /* asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); IOCR */ 74 75 /* iocr |= 0x800000; select external timer clock CETE*/ 76 iocr &= ~0x800000; /* timer clocked from system clock CETE*/ 77 78 asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */ 79 /* asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); IOCR */ 80 #endif /* ppc405 */ 61 81 62 82 Timer_starting = get_itimer();
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