Changeset e9ae97fb in rtems


Ignore:
Timestamp:
Nov 9, 2001, 12:04:57 AM (19 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
1a98a0d
Parents:
de202e7
Message:

2001-11-08 Dennis Ehlin (ECS) <Dennis.Ehlin@…>

This modification is part of the submitted modifications necessary to
support the IBM PPC405 family. This submission was reviewed by
Thomas Doerfler <Thomas.Doerfler@…> who ensured it did
not negatively impact the ppc403 BSPs. The submission and tracking
process was captured as PR50.

  • ppc403/console/console405.c ppc403/tty_drv/.cvsignore, ppc403/tty_drv/Makefile.am, ppc403/tty_drv/tty_drv.c, ppc403/tty_drv/tty_drv.h: New files.
  • Makefile.am, README, configure.ac, old_exception_processing/cpu.c, old_exception_processing/cpu.h, ppc403/Makefile.am, ppc403/clock/clock.c, ppc403/console/Makefile.am, ppc403/console/console.c, ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h, ppc403/timer/timer.c: Modified.
Location:
c/src/lib
Files:
5 added
16 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c

    rde202e7 re9ae97fb  
    367367           v, i->pc);
    368368#endif
    369 #ifdef ppc403
     369#if defined(ppc403) || defined(ppc405)
    370370    if (v == PPC_IRQ_EXTERNAL)
    371371        {
     
    628628      break;
    629629
    630 #if defined(ppc403)
     630#if defined(ppc403) || defined(ppc405)
    631631                                 
    632632/*  PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET
  • c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h

    rde202e7 re9ae97fb  
    475475  boolean      exceptions_in_RAM;     /* TRUE if in RAM */
    476476
    477 #if (defined(ppc403) || defined(mpc860) || defined(mpc821))
     477#if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821))
    478478  unsigned32   serial_per_sec;         /* Serial clocks per second */
    479479  boolean      serial_external_clock;
     
    509509   (_CPU_Table.exceptions_in_RAM)
    510510
    511 #if (defined(ppc403) || defined(mpc860) || defined(mpc821))
     511#if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821))
    512512
    513513#define rtems_cpu_configuration_get_serial_per_sec() \
  • c/src/lib/libcpu/powerpc/ChangeLog

    rde202e7 re9ae97fb  
     12001-11-08      Dennis Ehlin (ECS) <Dennis.Ehlin@ecs.ericsson.se>
     2
     3        This modification is part of the submitted modifications necessary to
     4        support the IBM PPC405 family.  This submission was reviewed by
     5        Thomas Doerfler <Thomas.Doerfler@imd-systems.de> who ensured it did
     6        not negatively impact the ppc403 BSPs.  The submission and tracking
     7        process was captured as PR50.
     8        * ppc403/console/console405.c ppc403/tty_drv/.cvsignore,
     9        ppc403/tty_drv/Makefile.am, ppc403/tty_drv/tty_drv.c,
     10        ppc403/tty_drv/tty_drv.h: New files.
     11        * Makefile.am, README, configure.ac, old_exception_processing/cpu.c,
     12        old_exception_processing/cpu.h, ppc403/Makefile.am,
     13        ppc403/clock/clock.c, ppc403/console/Makefile.am,
     14        ppc403/console/console.c, ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h,
     15        ppc403/timer/timer.c: Modified.
     16
    1172001-11-07      Joel Sherrill <joel@OARcorp.com>
    218
  • c/src/lib/libcpu/powerpc/Makefile.am

    rde202e7 re9ae97fb  
    3535CPU_SUBDIR = ppc403
    3636endif
     37if ppc405
     38## 403 and 405 chips use the same CPU sources...
     39CPU_SUBDIR = ppc403
     40endif
    3741
    3842SUBDIRS = $(SHARED_LIB) $(EXCEPTION_SUBDIR) $(CPU_SUBDIR) wrapup
  • c/src/lib/libcpu/powerpc/README

    rde202e7 re9ae97fb  
    1010of the PowerPC family, an entry per CPU type is provided.
    1111
    12 Initially, (4/December/1995), only the PPC403 was supported.
    1312At this time, support is included for the following PowerPC
    14 family members:
     13family members using the new exception processing model:
    1514
    1615  + mpc505
     16  + mpc6xx
    1717  + mpc750
    18   + mpc821
     18  + mpc821
     19  + mpc823 (uses mpc821 directory)
     20  + mpc850 (uses mpc860 directory)
    1921  + mpc860
     22  + mpc8260
     23
     24The following PowerPC family members are supported but
     25still use the old exception processing model:
     26
    2027  + ppc403
    21   + mpc8260
     28  + ppc405 (uses ppc403 directory)
     29  + ppc6xx (no libcpu support)
    2230
    2331Note that because of similarities in various family members,
  • c/src/lib/libcpu/powerpc/configure.ac

    rde202e7 re9ae97fb  
    5151AM_CONDITIONAL(old_exception_processing, \
    5252test "$RTEMS_CPU_MODEL" = "ppc403" || \
     53test "$RTEMS_CPU_MODEL" = "ppc405" || \
    5354test "$RTEMS_CPU_MODEL" = "mpc505" || \
    5455test "$RTEMS_CPU_MODEL" = "ppc603e" \
     
    6566AM_CONDITIONAL(mpc8260, test "$RTEMS_CPU_MODEL" = "mpc8260")
    6667AM_CONDITIONAL(ppc403, test "$RTEMS_CPU_MODEL" = "ppc403")
     68AM_CONDITIONAL(ppc405, test "$RTEMS_CPU_MODEL" = "ppc405")
    6769
    6870# Explicitly list all Makefiles here
     
    8385ppc403/clock/Makefile
    8486ppc403/console/Makefile
     87ppc403/tty_drv/Makefile
    8588ppc403/ictrl/Makefile
    8689ppc403/timer/Makefile
  • c/src/lib/libcpu/powerpc/old-exceptions/cpu.c

    rde202e7 re9ae97fb  
    367367           v, i->pc);
    368368#endif
    369 #ifdef ppc403
     369#if defined(ppc403) || defined(ppc405)
    370370    if (v == PPC_IRQ_EXTERNAL)
    371371        {
     
    628628      break;
    629629
    630 #if defined(ppc403)
     630#if defined(ppc403) || defined(ppc405)
    631631                                 
    632632/*  PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET
  • c/src/lib/libcpu/powerpc/old_exception_processing/cpu.c

    rde202e7 re9ae97fb  
    367367           v, i->pc);
    368368#endif
    369 #ifdef ppc403
     369#if defined(ppc403) || defined(ppc405)
    370370    if (v == PPC_IRQ_EXTERNAL)
    371371        {
     
    628628      break;
    629629
    630 #if defined(ppc403)
     630#if defined(ppc403) || defined(ppc405)
    631631                                 
    632632/*  PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET
  • c/src/lib/libcpu/powerpc/old_exception_processing/cpu.h

    rde202e7 re9ae97fb  
    475475  boolean      exceptions_in_RAM;     /* TRUE if in RAM */
    476476
    477 #if (defined(ppc403) || defined(mpc860) || defined(mpc821))
     477#if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821))
    478478  unsigned32   serial_per_sec;         /* Serial clocks per second */
    479479  boolean      serial_external_clock;
     
    509509   (_CPU_Table.exceptions_in_RAM)
    510510
    511 #if (defined(ppc403) || defined(mpc860) || defined(mpc821))
     511#if (defined(ppc403) || defined(ppc405) || defined(mpc860) || defined(mpc821))
    512512
    513513#define rtems_cpu_configuration_get_serial_per_sec() \
  • c/src/lib/libcpu/powerpc/ppc403/Makefile.am

    rde202e7 re9ae97fb  
    55AUTOMAKE_OPTIONS = foreign 1.4
    66
     7if ppc403
    78SUBDIRS = console clock timer vectors ictrl
     9endif
     10if ppc405
     11SUBDIRS = console tty_drv clock timer vectors ictrl
     12endif
    813
    914include $(top_srcdir)/../../../../../automake/subdirs.am
  • c/src/lib/libcpu/powerpc/ppc403/clock/clock.c

    rde202e7 re9ae97fb  
    2626 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
    2727 *
    28  *
    2928 *  COPYRIGHT (c) 1989-1999.
    3029 *  On-Line Applications Research Corporation (OAR).
     
    3433 *  http://www.OARcorp.com/rtems/license.html.
    3534 *
     35 *  Modifications for PPC405GP by Dennis Ehlin
     36 *
    3637 *  $Id$
    3738 */
     
    6061    register rtems_unsigned32 rc;
    6162
     63#ifndef ppc405 /* this is a ppc403 */
    6264    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
     65#else /* ppc405 */
     66    asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
     67#endif /* ppc405 */
    6368
    6469    return rc;
     
    7277Clock_isr(rtems_vector_number vector)
    7378{
     79      rtems_unsigned32 clicks_til_next_interrupt;
    7480    if (!auto_restart)
    7581    {
    76       rtems_unsigned32 clicks_til_next_interrupt;
    7782      rtems_unsigned32 itimer_value;
    78  
    7983      /*
    8084       * setup for next interrupt; making sure the new value is reasonably
     
    132136{
    133137    rtems_isr_entry previous_isr;
    134     rtems_unsigned32 pvr, iocr;
     138    rtems_unsigned32 iocr;
    135139    register rtems_unsigned32 tcr;
     140#ifdef ppc403
     141    rtems_unsigned32 pvr;
     142#endif /* ppc403 */
    136143 
    137144    Clock_driver_ticks = 0;
    138145 
     146#ifndef ppc405 /* this is a ppc403 */
    139147    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
    140 
    141148    if (rtems_cpu_configuration_get_timer_internal_clock()) {
    142149        iocr &= ~4; /* timer clocked from system clock */
     
    145152        iocr |= 4; /* select external timer clock */
    146153    }
    147 
    148154    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
    149155 
    150156    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
    151  
    152157    if (((pvr & 0xffff0000) >> 16) != 0x0020)
    153158      return; /* Not a ppc403 */
     
    163168      auto_restart = 1;
    164169 
     170#else /* ppc405 */
     171    asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
     172    if (rtems_cpu_configuration_get_timer_internal_clock()) {
     173        iocr &=~0x800000        ;/* timer clocked from system clock CETE*/
     174    }
     175    else {
     176        iocr |= 0x800000; /* select external timer clock CETE*/
     177    }
     178    asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
     179
     180     /*
     181      * Enable auto restart
     182      */
     183
     184    auto_restart=1;
     185
     186#endif /* ppc405 */
    165187    pit_value = rtems_configuration_get_microseconds_per_tick() *
    166188      rtems_cpu_configuration_get_clicks_per_usec();
    167189 
    168 
    169190    /*
    170191     * initialize the interval here
     
    177198    rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
    178199
     200     /*
     201      * Set PIT value
     202      */
     203
    179204    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
    180205 
    181     asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
    182  
    183     tcr &= ~ 0x04400000;
    184  
    185     tcr |= (auto_restart ? 0x04400000 : 0x04000000);
    186  
     206     /*     
     207      * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
     208      * Enable PIT interrupt, bit TCR->PIE = 1     0x4000000
     209      */
    187210    tick_time = get_itimer() + pit_value;
    188  
     211    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
     212    tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
    189213    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
    190214
     
    209233 * Called via atexit()
    210234 * Remove the clock interrupt handler by setting handler to NULL
     235 *
     236 * This will not work on the 405GP because
     237 * when bit's are set in TCR they can only be unset by a reset
    211238 */
    212239
  • c/src/lib/libcpu/powerpc/ppc403/console/Makefile.am

    rde202e7 re9ae97fb  
    77PGM = $(ARCH)/console.rel
    88
     9if ppc403
    910C_FILES = console.c
     11endif
     12if ppc405
     13C_FILES = console405.c
     14endif
    1015
    1116console_rel_OBJECTS = $(C_FILES:%.c=$(ARCH)/%.o)
     
    2631.PRECIOUS: $(PGM)
    2732
    28 EXTRA_DIST = console.c console.c.polled
     33EXTRA_DIST = console.c console.c.polled console405.c
    2934
    3035include $(top_srcdir)/../../../../../automake/local.am
  • c/src/lib/libcpu/powerpc/ppc403/console/console.c

    rde202e7 re9ae97fb  
    148148
    149149static void *spittyp;         /* handle for termios */
    150 int ppc403_spi_interrupt = 1; /* do not use interrupts... */
     150int ppc403_spi_interrupt = 1; /* use interrupts... */
    151151
    152152/*
  • c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c

    rde202e7 re9ae97fb  
    1919 *      of this software for any purpose.
    2020 *
     21 *  Modifications for PPC405GP by Dennis Ehlin
     22 *
    2123 */
    2224
     
    4244 *  clear bits in EXISR that have a bit set in mask
    4345 */
     46#if defined(ppc405)
    4447RTEMS_INLINE_ROUTINE void
    4548clr_exisr(unsigned32 mask)
    4649{
     50    asm volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/
     51}
     52
     53/*
     54 *  get value of EXISR
     55 */
     56RTEMS_INLINE_ROUTINE unsigned32
     57get_exisr(void)
     58{
     59    unsigned32 val;
     60
     61    asm volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/
     62    return val;
     63}
     64
     65/*
     66 *  get value of EXIER
     67 */
     68RTEMS_INLINE_ROUTINE unsigned32
     69get_exier(void)
     70{
     71    unsigned32 val;
     72    asm volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/
     73    return val;
     74}
     75
     76/*
     77 *  set value of EXIER
     78 */
     79RTEMS_INLINE_ROUTINE void
     80set_exier(unsigned32 val)
     81{
     82    asm volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/
     83}
     84
     85#else /* not ppc405 */
     86
     87RTEMS_INLINE_ROUTINE void
     88clr_exisr(unsigned32 mask)
     89{
    4790    asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/
    4891}
     
    79122    asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/
    80123}
    81 
     124#endif /* ppc405 */
    82125/*
    83126 *  enable an external interrupt, make this interrupt consistent
     
    192235  if ((vector >= PPC_IRQ_EXT_BASE) &&
    193236      (vector <  PPC_IRQ_EXT_BASE + PPC_IRQ_EXT_MAX)) {
    194 
    195237    /* return old handler entry */
    196238    *old_handler = ictrl_vector_table[vector - PPC_IRQ_EXT_BASE];
  • c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h

    rde202e7 re9ae97fb  
    1919 *      IMD makes no representations about the suitability
    2020 *      of this software for any purpose.
     21 *
     22 *  Modifications for PPC405GP by Dennis Ehlin
    2123 *
    2224 */
     
    4143/* mask for external interrupt status in EXIER/EXISR register */
    4244/* note: critical interrupt is in these registers aswell */
     45#ifndef ppc405
    4346#define PPC_EXI_MASK           0x0FFFFFFF
     47#else /* ppc405 */
     48#define PPC_EXI_MASK           0xFFFFFFFF
     49#endif /* ppc405 */
    4450
     51#ifndef ppc405
    4552#define PPC_IRQ_EXT_SPIR        (PPC_IRQ_EXT_BASE+4)
    4653#define PPC_IRQ_EXT_SPIT        (PPC_IRQ_EXT_BASE+5)
     54#else /* ppc405 */
     55#define PPC_IRQ_EXT_UART0       (PPC_IRQ_EXT_BASE+0)
     56#define PPC_IRQ_EXT_UART1       (PPC_IRQ_EXT_BASE+1)
     57#endif /* ppc405 */
    4758#define PPC_IRQ_EXT_JTAGR       (PPC_IRQ_EXT_BASE+6)
    4859#define PPC_IRQ_EXT_JTAGT       (PPC_IRQ_EXT_BASE+7)
  • c/src/lib/libcpu/powerpc/ppc403/timer/timer.c

    rde202e7 re9ae97fb  
    3131 *  http://www.OARcorp.com/rtems/license.html.
    3232 *
     33 *  Modifications for PPC405GP by Dennis Ehlin
     34 *
    3335 *  $Id$
     36 *
    3437 */
    3538
     
    4649   rtems_unsigned32 ret;
    4750
     51#ifndef ppc405
    4852   asm volatile ("mfspr %0, 0x3dd" : "=r" ((ret))); /* TBLO */
     53#else /* ppc405 */
     54/*   asm volatile ("mfspr %0, 0x3dd" : "=r" ((ret)));  TBLO */
     55
     56   asm volatile ("mfspr %0, 0x10c" : "=r" ((ret))); /* 405GP TBL */
     57#endif /* ppc405 */
    4958
    5059   return ret;
     
    5564  rtems_unsigned32 iocr;
    5665
     66#ifndef ppc405
    5767  asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
    5868  iocr &= ~4;
    5969  iocr |= 4;  /* Select external timer clock */
    6070  asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
     71#else /* ppc405 */
     72  asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
     73/*  asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); IOCR */
     74
     75  /* iocr |= 0x800000;  select external timer clock CETE*/
     76  iocr &= ~0x800000; /* timer clocked from system clock CETE*/
     77
     78  asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
     79/*  asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr));  IOCR */
     80#endif /* ppc405 */
    6181
    6282  Timer_starting = get_itimer();
Note: See TracChangeset for help on using the changeset viewer.