Changeset e8f6005f in rtems


Ignore:
Timestamp:
Aug 8, 2014, 8:01:41 AM (5 years ago)
Author:
Daniel Hellstrom <daniel@…>
Branches:
4.11, master
Children:
5f4028b
Parents:
fed905c8
git-author:
Daniel Hellstrom <daniel@…> (08/08/14 08:01:41)
git-committer:
Daniel Hellstrom <daniel@…> (04/16/15 23:10:21)
Message:

GR-RASTA-TMTC,rev1: add GRGPIO[0] register init

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c

    rfed905c8 re8f6005f  
    245245}
    246246
    247 /* PCI Hardware (Revision 0) initialization */
    248 int gr_rasta_tmtc_hw_init(struct gr_rasta_tmtc_priv *priv)
    249 {
    250         unsigned int *page0 = NULL;
     247/* Init AMBA bus frequency, IRQ controller, GPIO register, bus maps and other
     248 * common stuff between rev0 and rev1.
     249 */
     250int gr_rasta_tmtc_hw_init_common(struct gr_rasta_tmtc_priv *priv)
     251{
    251252        struct ambapp_dev *tmp;
    252         struct ambapp_ahb_info *ahb;
    253253        unsigned int pci_freq_hz;
    254         pci_dev_t pcidev = priv->pcidev;
    255         struct pci_dev_info *devinfo = priv->devinfo;
    256         uint32_t bar0, bar0_size;
    257 
    258         /* Select version of GR-RASTA-TMTC board */
    259         switch (devinfo->rev) {
    260                 case 0:
    261                         priv->version = &gr_rasta_tmtc_ver0;
    262                         break;
    263                 default:
    264                         return -2;
    265         }
    266 
    267         bar0 = devinfo->resources[0].address;
    268         bar0_size = devinfo->resources[0].size;
    269         page0 = (unsigned int *)(bar0 + bar0_size/2);
    270 
    271         /* Point PAGE0 to start of Plug and Play information */
    272         *page0 = priv->version->amba_ioarea & 0xf0000000;
    273 
    274 #if 0
    275         {
    276                 uint32_t data;
    277                 /* set parity error response */
    278                 pci_cfg_r32(pcidev, PCI_COMMAND, &data);
    279                 pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
    280         }
    281 #endif
    282 
    283         /* Setup cache line size. Default cache line size will result in
    284          * poor performance (256 word fetches), 0xff will set it according
    285          * to the max size of the PCI FIFO.
     254
     255        /* Initialize Frequency of AMBA bus. The AMBA bus runs at same
     256         * frequency as PCI bus
    286257         */
    287         pci_cfg_w8(pcidev, PCI_CACHE_LINE_SIZE, 0xff);
    288 
    289         /* Scan AMBA Plug&Play */
    290 
    291         /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
    292         priv->amba_maps[0].size = 0x10000000;
    293         priv->amba_maps[0].local_adr = bar0;
    294         priv->amba_maps[0].remote_adr = AHB1_BASE_ADDR;
    295 
    296         /* AMBA MAP bar1 (in CPU) ==> 0x40000000(remote amba address) */
    297         priv->amba_maps[1].size = devinfo->resources[1].size;
    298         priv->amba_maps[1].local_adr = devinfo->resources[1].address;
    299         priv->amba_maps[1].remote_adr = 0x40000000;
    300 
    301         /* Addresses not matching with map be untouched */
    302         priv->amba_maps[2].size = 0xfffffff0;
    303         priv->amba_maps[2].local_adr = 0;
    304         priv->amba_maps[2].remote_adr = 0;
    305 
    306         /* Mark end of table */
    307         priv->amba_maps[3].size=0;
    308         priv->amba_maps[3].local_adr = 0;
    309         priv->amba_maps[3].remote_adr = 0;
    310 
    311         /* Start AMBA PnP scan at first AHB bus */
    312         ambapp_scan(&priv->abus,
    313                 bar0 + (priv->version->amba_ioarea & ~0xf0000000),
    314                 NULL, &priv->amba_maps[0]);
    315 
    316         /* Frequency is the same as the PCI bus frequency */
    317258        drvmgr_freq_get(priv->dev, 0, &pci_freq_hz);
    318 
    319         /* Initialize Frequency of AMBA bus */
    320259        ambapp_freq_init(&priv->abus, NULL, pci_freq_hz);
    321 
    322         /* Point PAGE0 to start of APB area */
    323         *page0 = AHB1_BASE_ADDR;
    324 
    325         /* Find GRPCI controller */
    326         tmp = (void *)ambapp_for_each(&priv->abus,
    327                                         (OPTIONS_ALL|OPTIONS_APB_SLVS),
    328                                         VENDOR_GAISLER, GAISLER_PCIFBRG,
    329                                         ambapp_find_by_idx, NULL);
    330         if ( !tmp ) {
    331                 return -3;
    332         }
    333         priv->grpci = (struct grpci_regs *)((struct ambapp_apb_info *)tmp->devinfo)->start;
    334 
    335         /* Set GRPCI mmap so that AMBA masters can access CPU-RAM over
    336          * the PCI window.
    337          */
    338         priv->grpci->cfg_stat = (priv->grpci->cfg_stat & 0x0fffffff) |
    339                                 (priv->ahbmst2pci_map & 0xf0000000);
    340         priv->grpci->page1 = 0x40000000;
    341260
    342261        /* Find IRQ controller, Clear all current IRQs */
     
    373292        DBG("GR-TMTC GPIO: 0x%x\n", (unsigned int)priv->gpio);
    374293
    375         /* Enable DMA by enabling PCI target as master */
    376         pci_master_enable(pcidev);
    377 
    378294        /* DOWN streams translation table */
    379295        priv->bus_maps_down[0].name = "PCI BAR0 -> AMBA";
     
    389305        /* Mark end of translation table */
    390306        priv->bus_maps_down[2].size = 0;
     307
     308        return 0;
     309}
     310
     311/* PCI Hardware (Revision 0) initialization */
     312int gr_rasta_tmtc0_hw_init(struct gr_rasta_tmtc_priv *priv)
     313{
     314        unsigned int *page0 = NULL;
     315        struct ambapp_dev *tmp;
     316        struct ambapp_ahb_info *ahb;
     317        int status;
     318        pci_dev_t pcidev = priv->pcidev;
     319        struct pci_dev_info *devinfo = priv->devinfo;
     320        uint32_t bar0, bar0_size;
     321
     322        /* Select version of GR-RASTA-TMTC board */
     323        switch (devinfo->rev) {
     324                case 0:
     325                        priv->version = &gr_rasta_tmtc_ver0;
     326                        break;
     327                default:
     328                        return -2;
     329        }
     330
     331        bar0 = devinfo->resources[0].address;
     332        bar0_size = devinfo->resources[0].size;
     333        page0 = (unsigned int *)(bar0 + bar0_size/2);
     334
     335        /* Point PAGE0 to start of Plug and Play information */
     336        *page0 = priv->version->amba_ioarea & 0xf0000000;
     337
     338#if 0
     339        {
     340                uint32_t data;
     341                /* set parity error response */
     342                pci_cfg_r32(pcidev, PCI_COMMAND, &data);
     343                pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
     344        }
     345#endif
     346
     347        /* Setup cache line size. Default cache line size will result in
     348         * poor performance (256 word fetches), 0xff will set it according
     349         * to the max size of the PCI FIFO.
     350         */
     351        pci_cfg_w8(pcidev, PCI_CACHE_LINE_SIZE, 0xff);
     352
     353        /* Scan AMBA Plug&Play */
     354
     355        /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
     356        priv->amba_maps[0].size = 0x10000000;
     357        priv->amba_maps[0].local_adr = bar0;
     358        priv->amba_maps[0].remote_adr = AHB1_BASE_ADDR;
     359
     360        /* AMBA MAP bar1 (in CPU) ==> 0x40000000(remote amba address) */
     361        priv->amba_maps[1].size = devinfo->resources[1].size;
     362        priv->amba_maps[1].local_adr = devinfo->resources[1].address;
     363        priv->amba_maps[1].remote_adr = 0x40000000;
     364
     365        /* Addresses not matching with map be untouched */
     366        priv->amba_maps[2].size = 0xfffffff0;
     367        priv->amba_maps[2].local_adr = 0;
     368        priv->amba_maps[2].remote_adr = 0;
     369
     370        /* Mark end of table */
     371        priv->amba_maps[3].size=0;
     372        priv->amba_maps[3].local_adr = 0;
     373        priv->amba_maps[3].remote_adr = 0;
     374
     375        /* Start AMBA PnP scan at first AHB bus */
     376        ambapp_scan(&priv->abus,
     377                bar0 + (priv->version->amba_ioarea & ~0xf0000000),
     378                NULL, &priv->amba_maps[0]);
     379
     380        /* Point PAGE0 to start of APB area */
     381        *page0 = AHB1_BASE_ADDR;
     382
     383        /* Find GRPCI controller */
     384        tmp = (void *)ambapp_for_each(&priv->abus,
     385                                        (OPTIONS_ALL|OPTIONS_APB_SLVS),
     386                                        VENDOR_GAISLER, GAISLER_PCIFBRG,
     387                                        ambapp_find_by_idx, NULL);
     388        if ( !tmp ) {
     389                return -3;
     390        }
     391        priv->grpci = (struct grpci_regs *)((struct ambapp_apb_info *)tmp->devinfo)->start;
     392
     393        /* Set GRPCI mmap so that AMBA masters can access CPU-RAM over
     394         * the PCI window.
     395         */
     396        priv->grpci->cfg_stat = (priv->grpci->cfg_stat & 0x0fffffff) |
     397                                (priv->ahbmst2pci_map & 0xf0000000);
     398        priv->grpci->page1 = 0x40000000;
     399
     400        /* init AMBA bus, IRQCtrl, GPIO, bus down-maps */
     401        status = gr_rasta_tmtc_hw_init_common(priv);
     402        if (status)
     403                return status;
    391404
    392405        /* Find GRPCI controller AHB Slave interface */
     
    427440        pci_dev_t pcidev = priv->pcidev;
    428441        struct pci_dev_info *devinfo = priv->devinfo;
    429         unsigned int pci_freq_hz;
    430442
    431443        /* Check capabilities list bit */
     
    490502                &priv->amba_maps[0]);
    491503
    492         /* Initialize Frequency of AMBA bus. The AMBA bus runs at same
    493          * frequency as PCI bus
    494          */
    495         drvmgr_freq_get(priv->dev, 0, &pci_freq_hz);
    496         ambapp_freq_init(&priv->abus, NULL, pci_freq_hz);
    497 
    498         /* Find IRQ controller, Clear all current IRQs */
    499         tmp = (struct ambapp_dev *)ambapp_for_each(&priv->abus,
    500                                 (OPTIONS_ALL|OPTIONS_APB_SLVS),
    501                                 VENDOR_GAISLER, GAISLER_IRQMP,
    502                                 ambapp_find_by_idx, NULL);
    503         if ( !tmp ) {
    504                 return -4;
    505         }
    506         priv->irq = (struct irqmp_regs *)DEV_TO_APB(tmp)->start;
    507         /* Set up GR-RASTA-SPW-ROUTER irq controller */
    508         priv->irq->mask[0] = 0;
    509         priv->irq->iclear = 0xffff;
    510         priv->irq->ilevel = 0;
    511 
    512         priv->bus_maps_down[0].name = "PCI BAR0 -> AMBA";
    513         priv->bus_maps_down[0].size = priv->amba_maps[0].size;
    514         priv->bus_maps_down[0].from_adr = (void *)priv->amba_maps[0].local_adr;
    515         priv->bus_maps_down[0].to_adr = (void *)priv->amba_maps[0].remote_adr;
    516         priv->bus_maps_down[1].name = "PCI BAR1 -> AMBA";
    517         priv->bus_maps_down[1].size = priv->amba_maps[1].size;
    518         priv->bus_maps_down[1].from_adr = (void *)priv->amba_maps[1].local_adr;
    519         priv->bus_maps_down[1].to_adr = (void *)priv->amba_maps[1].remote_adr;
    520         priv->bus_maps_down[2].size = 0;
     504        /* init AMBA bus, IRQCtrl, GPIO, bus down-maps */
     505        status = gr_rasta_tmtc_hw_init_common(priv);
     506        if (status)
     507                return status;
    521508
    522509        /* Find GRPCI2 controller AHB Slave interface */
     
    526513                                        ambapp_find_by_idx, NULL);
    527514        if ( !tmp ) {
    528                 return -5;
     515                return -6;
    529516        }
    530517        ahb = (struct ambapp_ahb_info *)tmp->devinfo;
     
    542529                                        ambapp_find_by_idx, NULL);
    543530        if ( !tmp ) {
    544                 return -6;
     531                return -7;
    545532        }
    546533        priv->grpci2 = (struct grpci2_regs *)
     
    638625                case 0:
    639626                        puts("GR-RASTA-TMTC: REVISION 0");
    640                         status = gr_rasta_tmtc_hw_init(priv);
     627                        status = gr_rasta_tmtc0_hw_init(priv);
    641628                        break;
    642629                case 1:
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