Changeset e8a7a46 in rtems


Ignore:
Timestamp:
Jan 24, 2001, 7:10:38 PM (19 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
38371dbe
Parents:
b00b6a7
Message:

2001-01-24 Ralf Corsepius <corsepiu@…>

  • Makefile.am, README, console/console-io.c, start/start.S, startup/linkcmds: Update to make shsim closer to functional.
Location:
c/src/lib/libbsp/sh/shsim
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sh/shsim/ChangeLog

    rb00b6a7 re8a7a46  
     12001-01-24      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
     2
     3        * Makefile.am, README, console/console-io.c, start/start.S,
     4        startup/linkcmds: Update to make shsim closer to functional.
     5
    162001-01-03      Joel Sherrill <joel@OARcorp.com>
    27
  • c/src/lib/libbsp/sh/shsim/Makefile.am

    rb00b6a7 re8a7a46  
    88# wrapup is the one that actually builds and installs the library
    99#  from the individual .rel files built in other directories
    10 #SUBDIRS = include start startup clock console timer wrapup
    1110SUBDIRS = include start startup clock console wrapup
    1211
    1312include $(top_srcdir)/../../bsp.am
    1413
    15 EXTRA_DIST = bsp_specs times
     14EXTRA_DIST = bsp_specs
    1615
    1716include $(top_srcdir)/../../../../../../automake/subdirs.am
  • c/src/lib/libbsp/sh/shsim/README

    rb00b6a7 re8a7a46  
    77Simulator Invocation
    88====================
    9 target sim
     9sh-rtems[elf|]-gdb <executable>
     10(gdb) target sim
     11(gdb) set archi [sh|sh2]
     12(gdb) load <executable>
     13(gdb) run
    1014
    1115Status
    1216======
    13 Does not link yet.  libcpu/sh code needs to be addressed so we can
    14 get context switch code.
     17
     18* The simulator invocation procedure outlined above produces error messages
     19with gdb-5.0, nevertheless seems to work. With gdb versions > 5.0 these
     20error messages are gone. I.e. if you plan to seriously work with the gdb
     21simulator better use gdb versions > 5.0.
     22
     23* gdb's simulator is not able to correctly emulate memory areas esp. shadowing
     24and non-consecutive memory. I.e. access to memory areas besides area 0 will
     25(bogusly) generate SIGBUS exceptions.  This includes access to area 5
     26(On-chip peripherials) and prevents simulation of configuration of
     27accesses to on-chip peripherials.
     28
     29* Due to limitations of the simulator you will only be able to run
     30applications which do not try to access any SH control registers.
     31
     32Currently, this excludes all applications, which apply timers and serial
     33devices, i.e. almost any real world application.
     34
     35* The simulator currently uses gdb's trap34 interface for console I/O. This
     36could be replaced with polled sci1 I/O for SHes > SH1.
  • c/src/lib/libbsp/sh/shsim/console/console-io.c

    rb00b6a7 re8a7a46  
    2525#define SYS_write       4
    2626
     27int errno ;
     28
     29extern int __trap34(int, int, void*, int );
     30
    2731/*
    2832 *  console_initialize_hardware
     
    4852)
    4953{
    50  return __trap34 (SYS_write, 1, &ch, 1);
     54  __trap34 (SYS_write, 1, &ch, 1);
     55  return;
    5156}
    5257
  • c/src/lib/libbsp/sh/shsim/start/start.S

    rb00b6a7 re8a7a46  
    1         .section .text
    2         .global start
    3 start:
     1/*
     2 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
     3 *           Bernd Becker (becker@faw.uni-ulm.de)
     4 *
     5 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
     6 *
     7 *  This program is distributed in the hope that it will be useful,
     8 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
     9 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
     10 *
     11 *
     12 *  COPYRIGHT (c) 1998.
     13 *  On-Line Applications Research Corporation (OAR).
     14 *  Copyright assigned to U.S. Government, 1994.
     15 *
     16 *  The license and distribution terms for this file may be
     17 *  found in the file LICENSE in this distribution or at
     18 *  http://www.OARcorp.com/rtems/license.html.
     19 *
     20 *  $Id$
     21 */
     22
     23#include "asm.h"
     24
     25        BEGIN_CODE
     26        PUBLIC(start)
     27SYM (start):
     28        ! install the stack pointer
    429        mov.l   stack_k,r15
    530
     
    833        mov.l   end_k,r1
    934        mov     #0,r2
    10 start_l:
    11          mov.l  r2,@r0
     350:
     36        mov.l   r2,@r0
    1237        add     #4,r0
    1338        cmp/ge  r0,r1
    14         bt      start_l
     39        bt      0b
    1540
    16 #if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY)
    17         mov.l set_fpscr_k, r1
    18         jsr @r1
    19         mov #0,r4
    20         lds r3,fpscr
    21 #endif /*  defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
     41        ! copy the vector table from rom to ram
     42        mov.l   vects_k,r0      ! vectab
     43        mov     #0,r1           ! address of boot vector table
     44        mov     #0,r2           ! number of bytes copied
     45        mov.w   vects_size,r3   ! size of entries in vectab
     461:
     47        mov.l   @r1+,r4
     48        mov.l   r4,@r0
     49        add     #4,r0
     50        add     #1,r2
     51        cmp/hi  r3,r2
     52        bf      1b
     53
     54        mov.l   vects_k,r0      ! update vbr to point to vectab
     55        ldc     r0,vbr
    2256
    2357        ! call the mainline     
    24         mov.l   boot_card_k,r0
    25         jsr     @r0
    26         or      r0,r0
     58        mov #0,r4               ! argc
     59        mov.l main_k,r0
     60        jsr @r0
     61        mov #0,r5               ! argv
    2762
    2863        ! call exit
     
    3267        or      r0,r0
    3368
     69        END_CODE
     70
    3471        .align 2
    35 #if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
    36 set_fpscr_k:
    37         .long   ___set_fpscr
    38 #endif /*  defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(SH4_SINGLE_ONLY) */
    3972stack_k:
    40         .long   _stack 
     73        .long   SYM(stack)     
    4174edata_k:
    42         .long   _edata
     75        .long   SYM(edata)
    4376end_k:
    44         .long   _end
    45 boot_card_k:
    46         .long   _boot_card
     77        .long   SYM(end)
     78main_k:
     79        .long   SYM(boot_card)
    4780exit_k:
    48         .long   _exit
     81        .long   SYM(exit)
     82
     83vects_k:
     84        .long   SYM(vectab)
     85vects_size:
     86        .word   255
    4987
    5088#ifdef __ELF__
     
    5391        .section .stack
    5492#endif
    55 _stack: .long   0xdeaddead
     93SYM(stack):
     94        .long   0xdeaddead
     95monvects_k:
     96        .long   SYM(monvects)
  • c/src/lib/libbsp/sh/shsim/startup/linkcmds

    rb00b6a7 re8a7a46  
    11/*
    2  * This is an adapted linker script from egcs-1.0.1
     2 * Memory layout for an SH 7032 with main memory in area 0
    33 *
    4  * Memory layout for an SH 7032 with main memory in area 2
    5  * This memory layout it very similar to that used for Hitachi's
    6  * EVB with CMON in rom
     4 * NOTES:
     5 * + All RAM/ROM areas are mapped onto area 0, because gdb's simulator
     6 * is not able to simulate memory areas but area 0. Area 5 (on-chip
     7 * peripherials) can not be mapped onto area 0 and will cause SIGILL
     8 * exceptions.
     9 * + Assumed to be compatible with other SH-cpu family members (eg. SH7045)
    710 *
    8  * NOTE: The ram start address may vary, all other start addresses are fixed
    9  *       Not suiteable for gdb's simulator
     11 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
    1012 *
    11  *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
    12  *           Bernd Becker (becker@faw.uni-ulm.de)
    13  *
    14  *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
     13 *  COPYRIGHT (c) 2001, Ralf Corsepius, Ulm, Germany
    1514 *
    1615 *  This program is distributed in the hope that it will be useful,
     
    1817 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
    1918 *
    20  *
    21  *  COPYRIGHT (c) 1998.
    22  *  On-Line Applications Research Corporation (OAR).
    23  *  Copyright assigned to U.S. Government, 1994.
    24  *
    25  *  The license and distribution terms for this file may be
    26  *  found in the file LICENSE in this distribution or at
    27  *  http://www.OARcorp.com/rtems/license.html.
    28  *
    2919 *  $Id$
    3020 */
    3121
    32 OUTPUT_FORMAT("coff-sh")
    3322OUTPUT_ARCH(sh)
    3423ENTRY(_start)
     
    3827  rom           : o = 0x00000000, l = 128k
    3928  onchip_peri   : o = 0x05000000, l = 512
    40   ram           : o = 0x0A040000, l = 256k
     29  ram           : o = 0x00040000, l = 256k
    4130
    42   onchip_ram    : o = 0x0f000000, l = 8k
     31  onchip_ram    : o = 0x00080000, l = 8k
    4332}
    4433
     
    4635{
    4736  /* boot vector table */
    48   .monvects 0x00000000 (NOLOAD): {
     37  .monvects 0x00000000 (NOLOAD) :
     38  {
    4939    _monvects = . ;
    5040  } > rom
    5141
    5242  /* monitor play area */
    53   .monram 0x0A040000 (NOLOAD) :
     43  .monram 0x00040000 (NOLOAD) :
    5444  {
    5545  _ramstart = .;
     
    5747
    5848  /* monitor vector table */
    59   .vects   0x0A042000 (NOLOAD) : {
     49  .vects   0x00042000 (NOLOAD) : {
    6050    _vectab = . ;
    6151    *(.vects);
     
    6454  /* Read-only sections, merged into text segment: */
    6555
    66   . = 0x0a044000 ;
     56  . = 0x00044000 ;
    6757  .interp        : { *(.interp)         }
    6858  .hash          : { *(.hash)           }
     
    154144  PROVIDE (end = .);
    155145
    156   _HeapBase = . ;
     146  _HeapStart = . ;
    157147  . = . + 1024 * 20 ;
    158148  PROVIDE( _HeapEnd = . );
    159149
    160   _WorkSpaceBase = . ;
    161   . = 0x0a080000 ;
     150  _WorkSpaceStart = . ;
     151  . = 0x00080000 ;
    162152  PROVIDE(_WorkSpaceEnd = .);
    163153
    164   _CPU_Interrupt_stack_low  = 0x0f000000 ;
     154  _CPU_Interrupt_stack_low  = 0x00080000 ;
    165155  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
    166156
     
    199189  .debug_varnames  0 : { *(.debug_varnames) }
    200190
    201   .stack 0x0f001ff0 : { _stack = .; *(.stack) } > onchip_ram
     191  .stack 0x00081ff0 : { _stack = .; *(.stack) } > onchip_ram
    202192  /* These must appear regardless of  .  */
    203193}
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