Changeset e8512eb in rtems for c/src/lib/libbsp/i960

Timestamp:

06/05/95 22:59:47 (29 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

6b782ab

Parents:

7979e35

Message:

incorporate Tony's patches:

+ c/src/lib/libc/support/generic/malloc.c did not initialize the

sbrk amount

+ _Thread_Handler in c/src/exec/rtems/thread.c left a window

during the begin extension which could result in a context switch

fixed places which did not correctly distinguish between an
CPU_isr and a CPU_isr_entry.

File:

• c/src/lib/libbsp/i960/cvme961/startup/setvec.c (modified) (4 diffs)

c/src/lib/libbsp/i960/cvme961/startup/setvec.c

@@ -58 +58 @@
 unsigned int Xint_2_Group_Map[8] = { 0, 1, 2, 5, 7, 3, 6, 4 };
 
-i960_isr set_vector(                       /* returns old vector */
+i960_isr_entry set_vector(                 /* returns old vector */
   rtems_isr_entry func,                    /* isr routine */
   unsigned int    xint,                    /* XINT number */
@@ -64 +64 @@
 )
 {
-  i960_isr        *intr_tbl, *cached_intr_tbl;
-  i960_isr         saved_intr;
+  i960_isr_entry  *intr_tbl, *cached_intr_tbl;
+  i960_isr_entry   saved_intr;
   unsigned int     vector, group, nibble;
   unsigned int    *imap;
@@ -72 +72 @@
     exit( 0x80 );
 
-  cached_intr_tbl = (i960_isr *) 0;
-  intr_tbl        = (i960_isr *) Prcb->intr_tbl;
+  cached_intr_tbl = (i960_isr_entry *) 0;
+  intr_tbl        = (i960_isr_entry *) Prcb->intr_tbl;
   group           = Xint_2_Group_Map[xint];  /* remap XINT to group */
   vector          = (group << 4) + 2;        /* direct vector num   */
@@ -80 +80 @@
     rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr );
   else {
-    saved_intr    = (i960_isr) intr_tbl[ vector ];
-                                             /* return old vector   */
-    intr_tbl[ vector + 1 ]   =               /* normal vector table */
-    cached_intr_tbl[ group ] = (i960_isr) func;    /* cached vector */
+    saved_intr    = (i960_isr_entry) intr_tbl[ vector ];
+                                                   /* return old vector   */
+    intr_tbl[ vector + 1 ]   =                     /* normal vector table */
+    cached_intr_tbl[ group ] = (i960_isr_entry) func;    /* cached vector */
   }