Changeset e79a1947 in rtems for c/src/lib/libbsp/powerpc/shared


Ignore:
Timestamp:
Nov 10, 2004, 11:51:17 PM (16 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
a84392d
Parents:
f9877d25
Message:

2004-11-10 Richard Campbell <richard.campbell@…>

  • Makefile.am, bootloader/misc.c, bootloader/pci.c, bootloader/pci.h, console/console.c, console/inch.c, console/reboot.c, console/uart.c, console/uart.h, irq/irq.c, irq/irq.h, irq/irq_init.c, motorola/motorola.c, motorola/motorola.h, openpic/openpic.c, openpic/openpic.h, pci/detect_raven_bridge.c, pci/pci.c, start/start.S, startup/bspstart.c, vectors/vectors_init.c, vme/vmeconfig.c: Add MVME2100 BSP and MPC8240 support. There was also a significant amount of spelling and whitespace cleanup.
  • tod/todcfg.c: New file.
Location:
c/src/lib/libbsp/powerpc/shared
Files:
1 added
23 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/shared/ChangeLog

    rf9877d25 re79a1947  
     12004-11-10      Richard Campbell <richard.campbell@oarcorp.com>
     2
     3        * Makefile.am, bootloader/misc.c, bootloader/pci.c, bootloader/pci.h,
     4        console/console.c, console/inch.c, console/reboot.c, console/uart.c,
     5        console/uart.h, irq/irq.c, irq/irq.h, irq/irq_init.c,
     6        motorola/motorola.c, motorola/motorola.h, openpic/openpic.c,
     7        openpic/openpic.h, pci/detect_raven_bridge.c, pci/pci.c,
     8        start/start.S, startup/bspstart.c, vectors/vectors_init.c,
     9        vme/vmeconfig.c: Add MVME2100 BSP and MPC8240 support. There was also
     10        a significant amount of spelling and whitespace cleanup.
     11        * tod/todcfg.c: New file.
     12
    1132003-11-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
    214
  • c/src/lib/libbsp/powerpc/shared/Makefile.am

    rf9877d25 re79a1947  
    4545    startup/pgtbl_activate.c
    4646
     47## tod
     48EXTRA_DIST += tod/todcfg.c
     49
    4750## vectors
    4851EXTRA_DIST += vectors/vectors_init.c vectors/vectors.S
  • c/src/lib/libbsp/powerpc/shared/bootloader/misc.c

    rf9877d25 re79a1947  
    2525#include <libcpu/byteorder.h>
    2626#include <rtems/bspIo.h>
     27#include <bsp.h>
    2728
    2829SPR_RW(DEC)
     
    276277         * select the serial console if not.
    277278         */
     279#if defined(BSP_KBD_IOBASE)
    278280        err = kbdreset();
    279         if (err) select_console(CONSOLE_SERIAL);
     281        if (err) select_console(CONSOLE_SERIAL);
     282#else
     283        err = 1;
     284        select_console(CONSOLE_SERIAL);
     285#endif
    280286
    281287        printk("\nModel: %s\nSerial: %s\n"
     
    289295               (vpd.TimeBaseDivisor ? vpd.TimeBaseDivisor : 4000),
    290296               res->TotalMemory);
    291         printk("Original MSR: %lx\nOriginal HID0: %lx\nOriginal R31: %lx\n",
    292                bd->o_msr, bd->o_hid0, bd->o_r31);
    293297
    294298        /* This reconfigures all the PCI subsystem */
  • c/src/lib/libbsp/powerpc/shared/bootloader/pci.c

    rf9877d25 re79a1947  
    2424#include <libcpu/page.h>
    2525#include <bsp/consoleIo.h>
     26#include <string.h>
    2627
    2728#include <string.h>
  • c/src/lib/libbsp/powerpc/shared/bootloader/pci.h

    rf9877d25 re79a1947  
    498498#define PCI_DEVICE_ID_MOTOROLA_MPC105   0x0001
    499499#define PCI_DEVICE_ID_MOTOROLA_MPC106   0x0002
     500#define PCI_DEVICE_ID_MOTOROLA_MPC8240  0x0003
    500501#define PCI_DEVICE_ID_MOTOROLA_RAVEN    0x4801
    501502
  • c/src/lib/libbsp/powerpc/shared/console/console.c

    rf9877d25 re79a1947  
    133133                  rtems_fatal_error_occurred (status);
    134134                }
    135 
    136135  }
     136
    137137  return RTEMS_SUCCESSFUL;
    138138} /* console_initialize */
     
    173173  rtems_status_code              status;
    174174  static rtems_termios_callbacks cb =
    175   {
    176     console_first_open,                 /* firstOpen */
    177     console_last_close,                 /* lastClose */
    178     NULL,                                               /* pollRead */
    179     BSP_uart_termios_write_com, /* write */
    180     conSetAttr,                                 /* setAttributes */
    181     NULL,                                               /* stopRemoteTx */
    182     NULL,                                               /* startRemoteTx */
    183     1                                                   /* outputUsesInterrupts */
     175#if defined(USE_POLLED_IO)
     176  {
     177     NULL,                              /* firstOpen */
     178     NULL,                              /* lastClose */
     179     NULL,                              /* pollRead */
     180     BSP_uart_termios_write_polled,     /* write */
     181     conSetAttr,                        /* setAttributes */
     182     NULL,                              /* stopRemoteTx */
     183     NULL,                              /* startRemoteTx */
     184     0                                  /* outputUsesInterrupts */
    184185  };
     186#else
     187  {
     188     console_first_open,                /* firstOpen */
     189     console_last_close,                /* lastClose */
     190     NULL,                              /* pollRead */
     191     BSP_uart_termios_write_com,        /* write */
     192     conSetAttr,                        /* setAttributes */
     193     NULL,                              /* stopRemoteTx */
     194     NULL,                              /* startRemoteTx */
     195     1                                  /* outputUsesInterrupts */
     196  };
     197#endif
    185198
    186199  status = rtems_termios_open (major, minor, arg, &cb);
     
    188201  if(status != RTEMS_SUCCESSFUL)
    189202    {
    190       printk("Error openning console device\n");
     203      printk("Error opening console device\n");
    191204      return status;
    192205    }
  • c/src/lib/libbsp/powerpc/shared/console/inch.c

    rf9877d25 re79a1947  
    2121
    2222#include <bsp.h>
     23#ifdef BSP_KBD_IOBASE
    2324#include <bsp/irq.h>
    2425
     
    297298    return c;
    298299} /* _IBMPC_inch */
     300#endif
  • c/src/lib/libbsp/powerpc/shared/console/reboot.c

    rf9877d25 re79a1947  
    1717  CPU_print_stack();
    1818  /* shutdown and reboot */
     19#if defined(BSP_KBD_IOBASE)
    1920  kbd_outb(0x4, 0xFE);      /* use keyboard controler to do the job... */
     21#endif
    2022} /* rtemsReboot */
  • c/src/lib/libbsp/powerpc/shared/console/uart.c

    rf9877d25 re79a1947  
    201201  /*
    202202   * This function may be called whenever TERMIOS parameters
    203    * are changed, so we have to make sire that baud change is
    204    * indeed required
     203   * are changed, so we have to make sure that baud change is
     204   * indeed required.
    205205   */
    206206
     
    459459uart_isr_is_on(const rtems_irq_connect_data *irq)
    460460{
    461 int uart = (irq->name == BSP_ISA_UART_COM1_IRQ) ?
     461  int uart;
     462
     463#if defined(mvme2100)
     464  uart = BSP_UART_COM1;
     465#else
     466  uart = (irq->name == BSP_ISA_UART_COM1_IRQ) ?
    462467                        BSP_UART_COM1 : BSP_UART_COM2;
     468#endif
    463469  return uread(uart,IER);
    464470}
     
    468474{
    469475        rtems_irq_connect_data d={0};
     476#if defined(mvme2100)
     477        d.name = BSP_UART_COM1_IRQ;
     478#else
    470479        d.name = (uart == BSP_UART_COM1) ?
    471480                        BSP_ISA_UART_COM1_IRQ : BSP_ISA_UART_COM2_IRQ;
     481#endif
    472482        d.off  = d.on = uart_noop;
    473483        d.isOn = uart_isr_is_on;
     
    524534
    525535int
     536BSP_uart_termios_write_polled(int minor, const char *buf, int len)
     537{
     538  int uart=minor;       /* could differ, theoretically */
     539  int nwrite;
     540  const char *b = buf;
     541
     542  assert(buf != NULL);
     543
     544  for (nwrite=0 ; nwrite < len ; nwrite++) {
     545    BSP_uart_polled_write(uart, *b++);
     546  }
     547  return nwrite;
     548}
     549
     550int
    526551BSP_uart_termios_write_com(int minor, const char *buf, int len)
    527552{
     
    534559    }
    535560
    536   /* If there TX buffer is busy - something is royally screwed up */
     561  /* If the TX buffer is busy - something is royally screwed up */
    537562  /*   assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); */
    538563
  • c/src/lib/libbsp/powerpc/shared/console/uart.h

    rf9877d25 re79a1947  
    1717
    1818void BSP_uart_init(int uart, int baud, int hwFlow);
    19 void BSP_uart_set_baud(int aurt, int baud);
     19void BSP_uart_set_baud(int uart, int baud);
    2020void BSP_uart_intr_ctrl(int uart, int cmd);
    2121void BSP_uart_throttle(int uart);
     
    3232int  BSP_uart_install_isr(int uart, rtems_irq_hdl handler);
    3333int  BSP_uart_remove_isr(int uart, rtems_irq_hdl handler);
     34int  BSP_uart_termios_write_polled(int minor, const char *buf, int len);
    3435int  BSP_uart_get_break_cb(int uart, rtems_libio_ioctl_args_t *arg);
    3536int  BSP_uart_set_break_cb(int uart, rtems_libio_ioctl_args_t *arg);
  • c/src/lib/libbsp/powerpc/shared/irq/irq.c

    rf9877d25 re79a1947  
    2222#include <libcpu/io.h>
    2323#include <bsp/vectors.h>
     24#include <stdlib.h>
    2425
    2526#include <rtems/bspIo.h> /* for printk */
     
    2930 * pointer to the mask representing the additionnal irq vectors
    3031 * that must be disabled when a particular entry is activated.
    31  * They will be dynamically computed from teh prioruty table given
     32 * They will be dynamically computed from the priority table given
    3233 * in BSP_rtems_irq_mngt_set();
    3334 * CAUTION : this table is accessed directly by interrupt routine
     
    6869
    6970/*
    70  * Check if IRQ is a Porcessor IRQ
     71 * Check if IRQ is a Processor IRQ
    7172 */
    7273static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine)
     
    359360
    360361/*
    361  * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
     362 * RTEMS Global Interrupt Handler Management Routines
    362363 */
    363364
  • c/src/lib/libbsp/powerpc/shared/irq/irq.h

    rf9877d25 re79a1947  
    22 *
    33 *  This include file describe the data structure and the functions implemented
    4  *  by rtems to write interrupt handlers.
    5  *
    6  *  CopyRight (C) 1999 valette@crf.canon.fr
     4 *  by RTEMS to write interrupt handlers.
     5 *
     6 *  Copyright (C) 1999 valette@crf.canon.fr
    77 *
    88 *  This code is heavilly inspired by the public specification of STREAM V2
     
    6464
    6565/*
    66  * Symblolic IRQ names and related definitions.
     66 * Symbolic IRQ names and related definitions
    6767 */
    6868
    6969typedef enum {
    7070  /* Base vector for our ISA IRQ handlers. */
    71   BSP_ISA_IRQ_VECTOR_BASE       =       BSP_ASM_IRQ_VECTOR_BASE,
     71  BSP_ISA_IRQ_VECTOR_BASE       = BSP_ASM_IRQ_VECTOR_BASE,
    7272  /*
    7373   * ISA IRQ handler related definitions
    7474   */
    75   BSP_ISA_IRQ_NUMBER            =       16,
    76   BSP_ISA_IRQ_LOWEST_OFFSET     =       0,
    77   BSP_ISA_IRQ_MAX_OFFSET        =       BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
     75  BSP_ISA_IRQ_NUMBER            = 16,
     76  BSP_ISA_IRQ_LOWEST_OFFSET     = 0,
     77  BSP_ISA_IRQ_MAX_OFFSET        = BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
    7878  /*
    7979   * PCI IRQ handlers related definitions
    8080   * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
    8181   */
    82   BSP_PCI_IRQ_NUMBER            =       16,
    83   BSP_PCI_IRQ_LOWEST_OFFSET     =       BSP_ISA_IRQ_NUMBER,
    84   BSP_PCI_IRQ_MAX_OFFSET        =       BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
    85   /*
    86    * PowerPc exceptions handled as interrupt where a rtems managed interrupt
     82  BSP_PCI_IRQ_NUMBER            = 16,
     83  BSP_PCI_IRQ_LOWEST_OFFSET     = BSP_ISA_IRQ_NUMBER,
     84  BSP_PCI_IRQ_MAX_OFFSET        = BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
     85  /*
     86   * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
    8787   * handler might be connected
    8888   */
    89   BSP_PROCESSOR_IRQ_NUMBER      =       1,
    90   BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_PCI_IRQ_MAX_OFFSET + 1,
    91   BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
     89  BSP_PROCESSOR_IRQ_NUMBER      = 1,
     90  BSP_PROCESSOR_IRQ_LOWEST_OFFSET = BSP_PCI_IRQ_MAX_OFFSET + 1,
     91  BSP_PROCESSOR_IRQ_MAX_OFFSET  = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
    9292  /* Misc vectors for OPENPIC irqs (IPI, timers)
    9393   */
    94   BSP_MISC_IRQ_NUMBER           =       8,
    95   BSP_MISC_IRQ_LOWEST_OFFSET    =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
    96   BSP_MISC_IRQ_MAX_OFFSET       =       BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
     94  BSP_MISC_IRQ_NUMBER           = 8,
     95  BSP_MISC_IRQ_LOWEST_OFFSET    = BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
     96  BSP_MISC_IRQ_MAX_OFFSET       = BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
    9797  /*
    9898   * Summary
    9999   */
    100   BSP_IRQ_NUMBER                =       BSP_MISC_IRQ_MAX_OFFSET + 1,
    101   BSP_LOWEST_OFFSET             =       BSP_ISA_IRQ_LOWEST_OFFSET,
    102   BSP_MAX_OFFSET                =       BSP_MISC_IRQ_MAX_OFFSET,
     100  BSP_IRQ_NUMBER                = BSP_MISC_IRQ_MAX_OFFSET + 1,
     101  BSP_LOWEST_OFFSET             = BSP_ISA_IRQ_LOWEST_OFFSET,
     102  BSP_MAX_OFFSET                = BSP_MISC_IRQ_MAX_OFFSET,
    103103    /*
    104104     * Some ISA IRQ symbolic name definition
    105105     */
    106   BSP_ISA_PERIODIC_TIMER        =       0,
    107 
    108   BSP_ISA_KEYBOARD              =       1,
    109 
    110   BSP_ISA_UART_COM2_IRQ         =       3,
    111 
    112   BSP_ISA_UART_COM1_IRQ         =       4,
    113 
    114   BSP_ISA_RT_TIMER1             =       8,
    115 
    116   BSP_ISA_RT_TIMER3             =       10,
     106  BSP_ISA_PERIODIC_TIMER        = 0,
     107  BSP_ISA_KEYBOARD              = 1,
     108  BSP_ISA_UART_COM2_IRQ         = 3,
     109  BSP_ISA_UART_COM1_IRQ         = 4,
     110  BSP_ISA_RT_TIMER1             = 8,
     111  BSP_ISA_RT_TIMER3             = 10,
    117112    /*
    118113     * Some PCI IRQ symbolic name definition
    119114     */
    120   BSP_PCI_IRQ0                  =       BSP_PCI_IRQ_LOWEST_OFFSET,
    121   BSP_PCI_ISA_BRIDGE_IRQ        =       BSP_PCI_IRQ0,
     115  BSP_PCI_IRQ0                  = BSP_PCI_IRQ_LOWEST_OFFSET,
     116  BSP_PCI_ISA_BRIDGE_IRQ        = BSP_PCI_IRQ0,
     117
     118#if defined(mvme2100)
     119  BSP_DEC21143_IRQ                = BSP_PCI_IRQ_LOWEST_OFFSET + 1,
     120  BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ   = BSP_PCI_IRQ_LOWEST_OFFSET + 2,
     121  BSP_PCMIP_TYPE1_SLOT1_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 3,
     122  BSP_PCMIP_TYPE2_SLOT0_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 4,
     123  BSP_PCMIP_TYPE2_SLOT1_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 5,
     124  BSP_PCI_INTA_UNIVERSE_LINT0_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 7,
     125  BSP_PCI_INTB_UNIVERSE_LINT1_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 8,
     126  BSP_PCI_INTC_UNIVERSE_LINT2_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 9,
     127  BSP_PCI_INTD_UNIVERSE_LINT3_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 10,
     128  BSP_UART_COM1_IRQ               = BSP_PCI_IRQ_LOWEST_OFFSET + 13,
     129  BSP_FRONT_PANEL_ABORT_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 14,
     130  BSP_RTC_IRQ                     = BSP_PCI_IRQ_LOWEST_OFFSET + 15,
     131#endif
     132
    122133    /*
    123      * Some Processor execption handled as rtems IRQ symbolic name definition
     134     * Some Processor execption handled as RTEMS IRQ symbolic name definition
    124135     */
    125   BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
    126 
    127 }rtems_irq_symbolic_name;
     136  BSP_DECREMENTER               = BSP_PROCESSOR_IRQ_LOWEST_OFFSET
     137
     138} rtems_irq_symbolic_name;
    128139
    129140/*
     
    201212  /*
    202213   * software priorities associated with interrupts.
    203    * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
     214   * if (*irqPrio  [i]  >  intrPrio  [j]  it  means  that
    204215   * interrupt handler hdl connected for interrupt name i
    205216   * will  not be interrupted by the handler connected for interrupt j
     
    229240int BSP_irq_enable_at_i8259s            (const rtems_irq_symbolic_name irqLine);
    230241/*
    231  * function to acknoledge a particular irq at 8259 level. After calling
     242 * function to acknowledge a particular irq at 8259 level. After calling
    232243 * this function, if a device asserts an enabled interrupt line it will
    233244 * be propagated further to the processor. Mainly usefull for people
    234  * writting raw handlers as this is automagically done for rtems managed
     245 * writing raw handlers as this is automagically done for RTEMS managed
    235246 * handlers.
    236247 */
     
    253264 *      4) modify them to disable the current interrupt at 8259 level (and may
    254265 *      be others depending on software priorities)
    255  *      5) aknowledge the i8259s',
     266 *      5) acknowledge the i8259s',
    256267 *      6) demask the processor,
    257268 *      7) call the application handler
     
    260271 *
    261272 *      a) can perfectly be written is C,
    262  *      b) may also well directly call the part of the RTEMS API that can be used
    263  *      from interrupt level,
     273 *      b) may also well directly call the part of the RTEMS API that can be
     274 *      used from interrupt level,
    264275 *      c) It only responsible for handling the jobs that need to be done at
    265  *      the device level including (aknowledging/re-enabling the interrupt at device,
    266  *      level, getting the data,...)
     276 *      the device level including (aknowledging/re-enabling the interrupt
     277 *      at device, level, getting the data,...)
    267278 *
    268279 *      When returning from the function, the following will be performed by
    269  *      the RTEMS irq epilogue :
     280 *      the RTEMS irq epilogue:
    270281 *
    271282 *      1) masks the interrupts again,
     
    275286 *      5) restore the C scratch registers...
    276287 *      6) restore initial execution flow
    277  *
    278288 */
    279289int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
     
    289299/*
    290300 * function to get disconnect the RTEMS irq handler for ptr->name.
    291  * This function checks that the value given is the current one for safety reason.
     301 * This function checks that the value given is the current one for safety
     302 * reasons.
    292303 * The user can use the previous function to get it.
    293304 */
  • c/src/lib/libbsp/powerpc/shared/irq/irq_init.c

    rf9877d25 re79a1947  
    2929#include <bsp/motorola.h>
    3030#include <rtems/bspIo.h>
    31 
    32 /*
    33 #define SHOW_ISA_PCI_BRIDGE_SETTINGS
    34 */
    3531
    3632typedef struct {
     
    6965static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
    7066  /*
    71    * actual rpiorities for interrupt :
     67   * actual priorities for interrupt :
    7268   *    0   means that only current interrupt is masked
    7369   *    255 means all other interrupts are masked
     
    7672   * ISA interrupts.
    7773   * The second entry has a priority of 255 because
    78    * it is the slave pic entry and is should always remain
     74   * it is the slave pic entry and should always remain
    7975   * unmasked.
    8076   */
     
    9288};
    9389
     90#if defined(mvme2100)
     91static unsigned char mvme2100_openpic_initpolarities[16] = {
     92    0,  /* Not used - should be disabled */
     93    0,  /* DEC21143 Controller */
     94    0,  /* PMC/PC-MIP Type I Slot 0 */
     95    0,  /* PC-MIP Type I Slot 1 */
     96    0,  /* PC-MIP Type II Slot 0 */
     97    0,  /* PC-MIP Type II Slot 1 */
     98    0,  /* Not used - should be disabled */
     99    0,  /* PCI Expansion Interrupt A/Universe II (LINT0) */
     100    0,  /* PCI Expansion Interrupt B/Universe II (LINT1) */
     101    0,  /* PCI Expansion Interrupt C/Universe II (LINT2) */
     102    0,  /* PCI Expansion Interrupt D/Universe II (LINT3) */
     103    0,  /* Not used - should be disabled */
     104    0,  /* Not used - should be disabled */
     105    1,  /* 16550 UART */
     106    0,  /* Front panel Abort Switch */
     107    0,  /* RTC IRQ */
     108};
     109
     110static unsigned char mvme2100_openpic_initsenses[] = {
     111    0,  /* Not used - should be disabled */
     112    1,  /* DEC21143 Controller */
     113    1,  /* PMC/PC-MIP Type I Slot 0 */
     114    1,  /* PC-MIP Type I Slot 1 */
     115    1,  /* PC-MIP Type II Slot 0 */
     116    1,  /* PC-MIP Type II Slot 1 */
     117    0,  /* Not used - should be disabled */
     118    1,  /* PCI Expansion Interrupt A/Universe II (LINT0) */
     119    1,  /* PCI Expansion Interrupt B/Universe II (LINT1) */
     120    1,  /* PCI Expansion Interrupt C/Universe II (LINT2) */
     121    1,  /* PCI Expansion Interrupt D/Universe II (LINT3) */
     122    0,  /* Not used - should be disabled */
     123    0,  /* Not used - should be disabled */
     124    1,  /* 16550 UART */
     125    0,  /* Front panel Abort Switch */
     126    1,  /* RTC IRQ */
     127};
     128#else
    94129static unsigned char mcp750_openpic_initpolarities[16] = {
    95130    1,  /* 8259 cascade */
     
    115150    1,  /* MCP750_INT_PCI_BUS2_INTD */
    116151};
     152#endif
    117153
    118154void VIA_isa_bridge_interrupts_setup(void)
     
    227263void BSP_rtems_irq_mng_init(unsigned cpuId)
    228264{
     265#if !defined(mvme2100)
     266  int known_cpi_isa_bridge = 0;
     267#endif
    229268  rtems_raw_except_connect_data vectorDesc;
    230   int known_cpi_isa_bridge = 0;
    231269  int i;
    232270
     
    234272   * First initialize the Interrupt management hardware
    235273   */
    236 #ifdef TRACE_IRQ_INIT
     274#if defined(mvme2100)
     275#ifdef TRACE_IRQ_INIT
     276  printk("Going to initialize EPIC interrupt controller (openpic compliant)\n");
     277#endif
     278  openpic_init(1, mvme2100_openpic_initpolarities, mvme2100_openpic_initsenses);
     279#else
     280#ifdef TRACE_IRQ_INIT
    237281  printk("Going to initialize raven interrupt controller (openpic compliant)\n");
    238282#endif
    239283  openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses);
    240 #ifdef TRACE_IRQ_INIT
     284#endif       
     285
     286#if !defined(mvme2100)
     287#ifdef TRACE_IRQ_INIT 
    241288  printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n");
    242289#endif
     
    263310#endif
    264311  BSP_i8259s_init();
    265   /*
    266    * Initialize Rtems management interrupt table
     312#endif
     313
     314  /*
     315   * Initialize RTEMS management interrupt table
    267316   */
    268317    /*
     
    311360    }
    312361#ifdef TRACE_IRQ_INIT
    313     printk("RTEMS IRQ management is now operationnal\n");
     362    printk("RTEMS IRQ management is now operational\n");
    314363#endif
    315364}
  • c/src/lib/libbsp/powerpc/shared/motorola/motorola.c

    rf9877d25 re79a1947  
    44 *  by rtems to identify motorola boards.
    55 *
    6  *  CopyRight (C) 1999 valette@crf.canon.fr
     6 *  Copyright (C) 1999 valette@crf.canon.fr
    77 *
    88 *  The license and distribution terms for this file may be
     
    1313 */
    1414
     15#include <bsp.h>
    1516#include <bsp/motorola.h>
    1617#include <rtems/bspIo.h>
     
    1920
    2021/*
    21 ** Board-specific table that maps interrupt names to onboard pci
    22 ** peripherals as well as local pci busses.  This table is used at
     22** Board-specific table that maps interrupt names to onboard PCI
     23** peripherals as well as local PCI busses.  This table is used at
    2324** bspstart() to configure the interrupt name & pin for all devices that
    2425** do not have it already specified.  If the device is already
     
    106107               {3, {25,-1,-1,-1}},
    107108               {4, {26,-1,-1,-1}},
     109               NULL_PINMAP}},
     110
     111   NULL_INTMAP };
     112
     113static struct _int_map mvme2100_intmap[] = {
     114   {0, 0, 0, {{1, {16,-1,-1,-1}}, /* something shows up in slot 0 and OpenPIC */
     115                                  /* 0 is unused.  This hushes the init code. */
     116               NULL_PINMAP}},
     117
     118   {0, 13, 0, {{1, {23,24,25,26}},  /* PCI INT[A-D]/Universe Lint[0-3] */
     119               NULL_PINMAP}},
     120
     121   {0, 14, 0, {{1, {17,-1,-1,-1}},  /* onboard ethernet */
    108122               NULL_PINMAP}},
    109123
     
    163177  {0x1E0, 0xFE, "MVME 3600 with MVME761", NULL, NULL},
    164178  {0x1E0, 0xFF, "MVME 1600-001 or 1600-011", NULL, NULL},
    165   {0x000, 0x00, ""}
     179  {0x000, 0x00, ""},   /* end of probeable values for automatic scan */
     180  {0x000, 0x00, "MVME 2100", mvme2100_intmap, prep_pci_swizzle},
    166181};
    167182
    168183prep_t currentPrepType;
    169 motorolaBoard           currentBoard;
     184motorolaBoard currentBoard;
     185
    170186prep_t checkPrepBoardType(RESIDUAL *res)
    171187{
     
    189205}
    190206
    191 motorolaBoard   getMotorolaBoard()
    192 {
     207motorolaBoard getMotorolaBoard()
     208{
     209/*
     210 *  At least the MVME2100 does not have the CPU Type and Base Type Registers,
     211 *  so it cannot be probed.
     212 *
     213 *  NOTE: Every path must set currentBoard.
     214 */
     215#if defined(mvme2100)
     216  currentBoard = (motorolaBoard) MVME_2100;
     217#else
    193218  unsigned char  cpu_type;
    194219  unsigned char  base_mod;
     
    210235    if (mot_boards[entry].base_type != base_mod)
    211236      continue;
    212     else{
     237    else {
    213238      mot_entry = entry;
    214239      break;
     
    223248  }
    224249  currentBoard = (motorolaBoard) mot_entry;
     250#endif
    225251  return currentBoard;
    226252}
     
    235261{
    236262  if (board == MOTOROLA_UNKNOWN) return NULL;
     263  /* printk( "IntMap board %d 0x%08x\n", board, mot_boards[board].intmap ); */
    237264  return mot_boards[board].intmap;
    238265}
  • c/src/lib/libbsp/powerpc/shared/motorola/motorola.h

    rf9877d25 re79a1947  
    2323  PREP_Radstone = 1,
    2424  PREP_Motorola = 2
    25 }prep_t;
     25} prep_t;
    2626
    2727typedef enum {
     
    4646  MVME_3600_W_MVME761           = 18,
    4747  MVME_1600                     = 19,
     48  /* In the table, slot 20 is the marker for end of automatic probe and scan */
     49  MVME_2100                     = 21,
    4850  MOTOROLA_UNKNOWN              = 255
    4951} motorolaBoard;
     
    5355  HOST_BRIDGE_HAWK      = 1,
    5456  HOST_BRIDGE_UNKNOWN   = 255
    55 }motorolaHostBridge;
     57} motorolaHostBridge;
    5658
    5759#define MOTOROLA_CPUTYPE_REG    0x800
  • c/src/lib/libbsp/powerpc/shared/openpic/openpic.c

    rf9877d25 re79a1947  
    2121
    2222#include <rtems.h>
     23#include <bsp.h>
    2324#include <rtems/bspIo.h>
    2425#include <bsp/openpic.h>
     
    2627#include <libcpu/io.h>
    2728#include <libcpu/byteorder.h>
    28 #include <bsp.h>
    2929#include <rtems/bspIo.h>
    3030
     
    190190
    191191    /* Kludge for the Raven */
     192/*
    192193    pci_read_config_dword(0, 0, 0, 0, &t);
     194*/
    193195    if (t == PCI_VENDOR_ID_MOTOROLA + (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
    194196        vendor = "Motorola";
     
    456458void openpic_initirq(unsigned int irq, unsigned int pri, unsigned int vec, int pol, int sense)
    457459{
     460#if 0
     461  printk("openpic_initirq: irq=%d pri=%d vec=%d pol=%d sense=%d\n",
     462    irq, pri, vec, pol, sense);
     463#endif
     464
    458465    check_arg_irq(irq);
    459466    check_arg_pri(pri);
  • c/src/lib/libbsp/powerpc/shared/openpic/openpic.h

    rf9877d25 re79a1947  
    4242     */
    4343
     44#if defined(mpc8240) || defined(mpc8245)
     45#define OPENPIC_MAX_SOURCES    (2048 - 16)
     46#else
    4447#define OPENPIC_MAX_SOURCES     2048
     48#endif
    4549#define OPENPIC_MAX_PROCESSORS  32
    4650
     
    152156    OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS];
    153157    char Pad1[0xee00];
     158#if defined(mpc8240) || defined(mpc8245)
     159    char Pad2[0x0200];
     160#endif 
    154161} OpenPIC_Global;
    155162
  • c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c

    rf9877d25 re79a1947  
    1313
    1414#include <rtems/bspIo.h>
     15#include <libcpu/cpuIdent.h>
    1516
    16 #define RAVEN_MPIC_IOSPACE_ENABLE       0x1
    17 #define RAVEN_MPIC_MEMSPACE_ENABLE      0x2
    18 #define RAVEN_MASTER_ENABLE             0x4
    19 #define RAVEN_PARITY_CHECK_ENABLE       0x40
    20 #define RAVEN_SYSTEM_ERROR_ENABLE       0x100
    21 #define RAVEN_CLEAR_EVENTS_MASK         0xf9000000
     17#define RAVEN_MPIC_IOSPACE_ENABLE  0x0001
     18#define RAVEN_MPIC_MEMSPACE_ENABLE 0x0002
     19#define RAVEN_MASTER_ENABLE        0x0004
     20#define RAVEN_PARITY_CHECK_ENABLE  0x0040
     21#define RAVEN_SYSTEM_ERROR_ENABLE  0x0100
     22#define RAVEN_CLEAR_EVENTS_MASK    0xf9000000
    2223
    23 #define RAVEN_MPIC_MEREN                ((volatile unsigned *)0xfeff0020)
    24 #define RAVEN_MPIC_MERST                ((volatile unsigned *)0xfeff0024)
     24#define RAVEN_MPIC_MEREN    ((volatile unsigned *)0xfeff0020)
     25#define RAVEN_MPIC_MERST    ((volatile unsigned *)0xfeff0024)
    2526/* enable machine check on all conditions */
    26 #define MEREN_VAL                               0x2f00
     27#define MEREN_VAL           0x2f00
    2728
    2829#define pci BSP_pci_configuration
     30extern unsigned int EUMBBAR;
    2931
    3032extern const pci_config_access_functions pci_direct_functions;
     
    3638unsigned merst;
    3739
    38                 merst = in_be32(RAVEN_MPIC_MERST);
    39                 /* write back value to clear status */
    40                 out_be32(RAVEN_MPIC_MERST, merst);
     40    merst = in_be32(RAVEN_MPIC_MERST);
     41    /* write back value to clear status */
     42    out_be32(RAVEN_MPIC_MERST, merst);
    4143
    42                 if (enableMCP) {
    43                         if (!quiet)
    44                                 printk("Enabling MCP generation on hostbridge errors\n");
    45                         out_be32(RAVEN_MPIC_MEREN, MEREN_VAL);
    46                 } else {
    47                         out_be32(RAVEN_MPIC_MEREN, 0);
    48                         if ( !quiet && enableMCP ) {
    49                                 printk("leaving MCP interrupt disabled\n");
    50                         }
    51                 }
    52                 return (merst & 0xffff);
     44    if (enableMCP) {
     45      if (!quiet)
     46        printk("Enabling MCP generation on hostbridge errors\n");
     47      out_be32(RAVEN_MPIC_MEREN, MEREN_VAL);
     48    } else {
     49      out_be32(RAVEN_MPIC_MEREN, 0);
     50      if ( !quiet && enableMCP ) {
     51        printk("leaving MCP interrupt disabled\n");
     52      }
     53    }
     54    return (merst & 0xffff);
    5355}
    5456
    5557void detect_host_bridge()
    5658{
     59#if (defined(mpc8240) || defined(mpc8245))
     60  /*
     61   * If the processor is an 8240 or an 8245 then the PIC is built
     62   * in instead of being on the PCI bus. The MVME2100 is using Processor
     63   * Address Map B (CHRP) although the Programmer's Reference Guide says
     64   * it defaults to Map A.
     65   */
     66  /* We have an EPIC Interrupt Controller  */
     67  OpenPIC = (volatile struct OpenPIC *) (EUMBBAR + BSP_OPEN_PIC_BASE_OFFSET);
     68  pci.pci_functions = &pci_indirect_functions;
     69  pci.pci_config_addr = (volatile unsigned char *) 0xfec00000;
     70  pci.pci_config_data = (volatile unsigned char *) 0xfee00000;
     71
     72#else
    5773  PPC_DEVICE *hostbridge;
    5874  unsigned int id0;
     
    131147#endif
    132148      OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
    133       printk("OpenPIC found at %x.\n",
    134              OpenPIC);
     149      printk("OpenPIC found at %x.\n", OpenPIC);
    135150    }
    136151  }
     152#endif
    137153  if (OpenPIC == (volatile struct OpenPIC *)0) {
    138154    BSP_panic("OpenPic Not found\n");
  • c/src/lib/libbsp/powerpc/shared/pci/pci.c

    rf9877d25 re79a1947  
    22 * pci.c :  this file contains basic PCI Io functions.
    33 *
    4  *  CopyRight (C) 1999 valette@crf.canon.fr
     4 *  Copyright (C) 1999 valette@crf.canon.fr
    55 *
    6  *  This code is heavilly inspired by the public specification of STREAM V2
     6 *  This code is heavily inspired by the public specification of STREAM V2
    77 *  that can be found at :
    88 *
     
    2222#include <libcpu/io.h>
    2323#include <bsp/pci.h>
     24#include <rtems/bspIo.h>
    2425
    2526/* allow for overriding these definitions */
     
    3637/* define a shortcut */
    3738#define pci     BSP_pci_configuration
    38 
    39 
    4039
    4140/*
     
    226225*/
    227226static int test_intname(
    228   const struct _int_map *row, int pbus, int pslot, int int_pin, int int_name )
     227  const struct _int_map *row,
     228  int pbus,
     229  int pslot,
     230  int int_pin,
     231  int int_name
     232)
    229233{
    230    int j,k;
     234   int j, k;
    231235   int _nopin= -1, _noname= -1;
    232236
  • c/src/lib/libbsp/powerpc/shared/start/start.S

    rf9877d25 re79a1947  
    1515#include <rtems/score/cpu.h>
    1616#include <libcpu/io.h>
     17#include <bspopts.h>
    1718
    1819#define SYNC \
     
    6768 */
    6869        lis     r11,KERNELBASE@h
    69         ori     r11,r11,0x1ffe          /* set up BAT registers for 604 */
     70/* set up BAT registers for 604 */
     71        ori     r11,r11,0x1ffe         
    7072        li      r8,2                    /* R/W access */
    7173        isync
     74#if defined(mvme2100)
     75        /* BSP_vme_config() wants to use BAT0, this board will use the
     76         * available BAT1 to map RAM.
     77         */
     78        mtspr   DBAT1L,r8               /* N.B. 6xx (not 601) have valid */
     79        mtspr   DBAT1U,r11              /* bit in upper BAT register */
     80        mtspr   IBAT1L,r8
     81        mtspr   IBAT1U,r11
     82#else
    7283        mtspr   DBAT0L,r8               /* N.B. 6xx (not 601) have valid */
    7384        mtspr   DBAT0U,r11              /* bit in upper BAT register */
    7485        mtspr   IBAT0L,r8
    7586        mtspr   IBAT0U,r11
     87#endif
    7688        isync
    7789
     
    8799enter_C_code:
    88100        bl      MMUon
    89         bl  __eabi      /* setup EABI and SYSV environment */
     101        bl      __eabi  /* setup EABI and SYSV environment */
    90102        bl      zero_bss
    91103        /*
     
    105117        mr      r1, r9
    106118        /*
    107          * We are know in a environment that is totally independent from bootloader setup.
     119         * We are now in a environment that is totally independent from
     120         * bootloader setup.
    108121         */
    109122        lis     r5,environ@ha
     
    118131MMUon:
    119132        mfmsr   r0
     133        ori     r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
     134#if defined(mvme2100)
     135        /* Data addr translation is broken for the mvme2100, disable it here */
     136        xori    r0,r0, MSR_DR
     137#endif
    120138#if (PPC_HAS_FPU == 0)
    121         ori     r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
    122139        xori    r0, r0, MSR_EE | MSR_IP | MSR_FP
    123140#else
    124         ori     r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
    125141        xori    r0, r0, MSR_EE | MSR_IP | MSR_FE0 | MSR_FE1
    126142#endif
  • c/src/lib/libbsp/powerpc/shared/startup/bspstart.c

    rf9877d25 re79a1947  
    2020#include <string.h>
    2121
     22#include <bsp.h>
    2223#include <rtems/libio.h>
    2324#include <rtems/libcsupport.h>
     
    2930#include <bsp/irq.h>
    3031#include <bsp/VME.h>
    31 #include <bsp.h>
    3232#include <libcpu/bat.h>
    3333#include <libcpu/pte121.h>
     
    4949SPR_RW(SPRG1)
    5050
     51#if defined(DEBUG_BATS)
     52void printBAT( int bat, unsigned32 upper, unsigned32 lower )
     53{
     54  unsigned32 lowest_addr;
     55  unsigned32 size;
     56
     57  printk("BAT%d raw(upper=0x%08x, lower=0x%08x) ", bat, upper, lower );
     58
     59  lowest_addr = (upper & 0xFFFE0000);
     60  size = (((upper & 0x00001FFC) >> 2) + 1) * (128 * 1024);
     61  printk(" range(0x%08x, 0x%08x) %s%s %s%s%s%s %s\n",
     62    lowest_addr,
     63    lowest_addr + (size - 1),
     64    (upper & 0x01) ? "P" : "p",
     65    (upper & 0x02) ? "S" : "s",
     66    (lower & 0x08) ? "G" : "g",
     67    (lower & 0x10) ? "M" : "m",
     68    (lower & 0x20) ? "I" : "i",
     69    (lower & 0x40) ? "W" : "w",
     70    (lower & 0x01) ? "Read Only" :
     71      ((lower & 0x02) ? "Read/Write" : "No Access")
     72  );
     73}
     74
     75void ShowBATS(){
     76  unsigned32 lower;
     77  unsigned32 upper;
     78
     79  __MFSPR(536, upper); __MFSPR(537, lower); printBAT( 0, upper, lower );
     80  __MFSPR(538, upper); __MFSPR(539, lower); printBAT( 1, upper, lower );
     81  __MFSPR(540, upper); __MFSPR(541, lower); printBAT( 2, upper, lower );
     82  __MFSPR(542, upper); __MFSPR(543, lower); printBAT( 3, upper, lower );
     83}
     84#endif
     85
    5186/*
    5287 * Copy of residuals passed by firmware
     
    131166void bsp_pretasking_hook(void)
    132167{
    133     uint32_t                heap_start;
    134     uint32_t                heap_size;
    135     uint32_t                heap_sbrk_spared;
    136         extern uint32_t         _bsp_sbrk_init(uint32_t, uint32_t*);
    137 
    138     heap_start = ((uint32_t) __rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE;
    139     if (heap_start & (CPU_ALIGNMENT-1))
    140         heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
    141 
    142     heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
    143 
    144         heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
    145 
    146 #ifdef SHOW_MORE_INIT_SETTINGS
    147         printk(" HEAP start %x  size %x (%x bytes spared for sbrk)\n", heap_start, heap_size, heap_sbrk_spared);
    148 #endif
    149 
    150     bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
     168  rtems_unsigned32        heap_start;   
     169  rtems_unsigned32        heap_size;
     170  rtems_unsigned32        heap_sbrk_spared;
     171  extern rtems_unsigned32 _bsp_sbrk_init(rtems_unsigned32, rtems_unsigned32*);
     172
     173  heap_start = ((rtems_unsigned32) __rtems_end) +
     174                INIT_STACK_SIZE + INTR_STACK_SIZE;
     175  if (heap_start & (CPU_ALIGNMENT-1))
     176      heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
     177
     178  heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
     179  heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
     180
     181#ifdef SHOW_MORE_INIT_SETTINGS
     182  printk( "HEAP start %x  size %x (%x bytes spared for sbrk)\n",
     183             heap_start, heap_size, heap_sbrk_spared);
     184#endif   
     185
     186  bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
    151187
    152188#ifdef RTEMS_DEBUG
    153     rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
     189  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
    154190#endif
    155191}
     
    173209}
    174210
     211#if defined(mpc8240) || defined(mpc8245)
     212unsigned int EUMBBAR;
     213
     214/*
     215 * Return the current value of the Embedded Utilities Memory Block Base Address
     216 * Register (EUMBBAR) as read from the processor configuration register using
     217 * Processor Address Map B (CHRP).
     218 */
     219unsigned int get_eumbbar() {
     220  register int a, e;
     221
     222  asm volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
     223  asm volatile("sync");
     224                                                               
     225  asm volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) );
     226  asm volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a)); 
     227  asm volatile("sync");
     228
     229  asm volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) );
     230  asm volatile("sync");
     231                                                         
     232  asm volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
     233  asm volatile("isync");
     234  return e;
     235}
     236#endif
     237
    175238/*
    176239 *  bsp_start
     
    181244void bsp_start( void )
    182245{
    183   int err;
    184246  unsigned char *stack;
     247#if !defined(mpc8240) && !defined(mpc8245)
    185248  unsigned l2cr;
     249#endif
    186250  register unsigned char* intrStack;
    187251  unsigned char *work_space_start;
     
    191255  motorolaBoard myBoard;
    192256  Triv121PgTbl  pt=0;
    193   /*
    194    * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
    195    * store the result in global variables so that it can be used latter...
     257
     258  /*
     259   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
     260   * function store the result in global variables so that it can be used
     261   * later...
    196262   */
    197263  myCpu         = get_ppc_cpu_type();
    198264  myCpuRevision = get_ppc_cpu_revision();
     265
     266#if defined(mvme2100)
     267  EUMBBAR = get_eumbbar();
     268
     269  Cpu_table.exceptions_in_RAM    = TRUE;
     270  { unsigned v = 0x3000 ; _CPU_MSR_SET(v); }
     271#endif
     272
     273#if !defined(mpc8240) && !defined(mpc8245)
    199274  /*
    200275   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
     
    202277   */
    203278  L1_caches_enables();
     279
    204280  /*
    205281   * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
     
    212288  if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
    213289    set_L2CR(0xb9A14000);
     290#endif
     291
    214292  /*
    215293   * the initial stack  has aready been set to this value in start.S
     
    217295   * so that It can be printed without accessing R1.
    218296   */
    219   stack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
    220 
    221  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
     297  stack = ((unsigned char*) __rtems_end) +
     298               INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
     299
     300  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
    222301  *((uint32_t*)stack) = 0;
    223302
     
    226305   * SPRG1 = software managed IRQ stack
    227306   *
    228    * This could be done latter (e.g in IRQ_INIT) but it helps to understand
     307   * This could be done later (e.g in IRQ_INIT) but it helps to understand
    229308   * some settings below...
    230309   */
    231   intrStack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
     310  intrStack = ((unsigned char*) __rtems_end) +
     311    INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
    232312
    233313  /* make sure it's properly aligned */
     
    243323
    244324  /*
    245    * Initialize default raw exception hanlders. See vectors/vectors_init.c
     325   * Initialize default raw exception handlers. See vectors/vectors_init.c
    246326   */
    247327  initialize_exceptions();
    248   /*
    249    * Init MMU block address translation to enable hardware
    250    * access
    251    */
    252   /*
    253    * PC legacy IO space used for inb/outb and all PC
    254    * compatible hardware
     328
     329  /*
     330   * Init MMU block address translation to enable hardware access
     331   */
     332
     333#if !defined(mvme2100)
     334  /*
     335   * PC legacy IO space used for inb/outb and all PC compatible hardware
    255336   */
    256337  setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
    257   /*
    258    * PCI devices memory area. Needed to access OPENPIC features
    259    * provided by the RAVEN
    260    */
    261   /* T. Straumann: give more PCI address space */
     338#endif
     339
     340  /*
     341   * PCI devices memory area. Needed to access OpenPIC features
     342   * provided by the Raven
     343   *
     344   * T. Straumann: give more PCI address space
     345   */
    262346  setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE);
    263   /*
    264    * Must have acces to open pic PCI ACK registers
    265    * provided by the RAVEN
    266    *
     347
     348  /*
     349   * Must have acces to open pic PCI ACK registers provided by the RAVEN
    267350   */
    268351  setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
     
    270353  select_console(CONSOLE_LOG);
    271354
    272   /* We check that the keyboard is present and immediately
     355  /*
     356   * We check that the keyboard is present and immediately
    273357   * select the serial console if not.
    274358   */
    275   err = kbdreset();
    276   if (err) select_console(CONSOLE_SERIAL);
     359#if defined(BSP_KBD_IOBASE)
     360  { int err;
     361    err = kbdreset();
     362    if (err) select_console(CONSOLE_SERIAL);
     363  }
     364#else
     365  select_console(CONSOLE_SERIAL);
     366#endif
    277367
    278368  boardManufacturer   =  checkPrepBoardType(&residualCopy);
     
    284374
    285375  printk("-----------------------------------------\n");
    286   printk("Welcome to %s on %s\n", _RTEMS_version, motorolaBoardToString(myBoard));
     376  printk("Welcome to %s on %s\n", _RTEMS_version,
     377                                    motorolaBoardToString(myBoard));
    287378  printk("-----------------------------------------\n");
    288379#ifdef SHOW_MORE_INIT_SETTINGS
     
    308399  InitializePCI();
    309400
    310  {
    311     const struct _int_map     *bspmap   = motorolaIntMap(currentBoard);
    312     if( bspmap )
    313     {
    314        printk("pci : Configuring interrupt routing for '%s'\n", motorolaBoardToString(currentBoard));
    315        FixupPCI(bspmap, motorolaIntSwizzle(currentBoard) );
     401  {
     402    const struct _int_map *bspmap  = motorolaIntMap(currentBoard);
     403    if( bspmap ) {
     404       printk("pci : Configuring interrupt routing for '%s'\n",
     405         motorolaBoardToString(currentBoard));
     406       FixupPCI(bspmap, motorolaIntSwizzle(currentBoard));
    316407    }
    317408    else
     
    329420  __asm__ __volatile ("sc");
    330421  /*
    331    * Check we can still catch exceptions and returned coorectly.
     422   * Check we can still catch exceptions and return coorectly.
    332423   */
    333424  printk("Testing exception handling Part 2\n");
    334425  __asm__ __volatile ("sc");
    335 #endif
    336 
    337   BSP_mem_size                          = residualCopy.TotalMemory;
    338   BSP_bus_frequency                     = residualCopy.VitalProductData.ProcessorBusHz;
    339   BSP_processor_frequency               = residualCopy.VitalProductData.ProcessorHz;
    340   BSP_time_base_divisor                 = (residualCopy.VitalProductData.TimeBaseDivisor?
    341                                            residualCopy.VitalProductData.TimeBaseDivisor : 4000);
     426
     427  /*
     428   *  Somehow doing the above seems to clobber SPRG0 on the mvme2100.  It
     429   *  is probably a not so subtle hint that you do not want to use PPCBug
     430   *  once RTEMS is up and running.  Anyway, we still needs to indicate
     431   *  that we have fixed PR288.  Eventually, this should go away.
     432   */
     433  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
     434#endif
     435
     436  BSP_mem_size            = residualCopy.TotalMemory;
     437  BSP_bus_frequency       = residualCopy.VitalProductData.ProcessorBusHz;
     438  BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz;
     439  BSP_time_base_divisor   = (residualCopy.VitalProductData.TimeBaseDivisor?
     440                    residualCopy.VitalProductData.TimeBaseDivisor : 4000);
    342441
    343442  /* clear hostbridge errors but leave MCP disabled -
     
    355454  pt = BSP_pgtbl_setup(&BSP_mem_size);
    356455
    357   if (!pt ||
    358           TRIV121_MAP_SUCCESS != triv121PgTblMap(
    359                                                                                 pt,
    360                                                                                 TRIV121_121_VSID,
    361                                                                                 0xfeff0000,
    362                                                                                 1,
    363                                                                                 TRIV121_ATTR_IO_PAGE,
    364                                                                                 TRIV121_PP_RW_PAGE
    365                                                                                 )) {
    366         printk("WARNING: unable to setup page tables VME bridge must share PCI space\n");
     456  if (!pt || TRIV121_MAP_SUCCESS != triv121PgTblMap(
     457            pt, TRIV121_121_VSID, 0xfeff0000, 1,
     458            TRIV121_ATTR_IO_PAGE, TRIV121_PP_RW_PAGE)) {
     459        printk("WARNING: unable to setup page tables VME "
     460               "bridge must share PCI space\n");
    367461  }
    368462
     
    381475
    382476#ifdef SHOW_MORE_INIT_SETTINGS
    383   printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size);
    384 #endif
     477  printk("BSP_Configuration.work_space_size = %x\n",
     478          BSP_Configuration.work_space_size);
     479#endif
     480
    385481  work_space_start =
    386482    (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size;
    387483
    388   if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
     484  if ( work_space_start <=
     485       ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
    389486    printk( "bspstart: Not enough RAM!!!\n" );
    390487    bsp_cleanup();
     
    407504#endif
    408505    BSP_pgtbl_activate(pt);
    409         /* finally, switch off DBAT3 */
    410         setdbat(3, 0, 0, 0, 0);
     506#if !defined(mvme2100)
     507    /* finally, switch off DBAT3 */
     508    setdbat(3, 0, 0, 0, 0);
     509#endif
    411510  }
    412511
    413512  /*
    414    * Initialize VME bridge - needs working PCI
    415    * and IRQ subsystems...
     513   * Initialize VME bridge - needs working PCI and IRQ subsystems...
    416514   */
    417515#ifdef SHOW_MORE_INIT_SETTINGS
    418516  printk("Going to initialize VME bridge\n");
    419517#endif
    420   /* VME initialization is in a separate file so apps which don't use
    421    * VME or want a different configuration may link against a customized
    422    * routine.
     518  /*
     519   * VME initialization is in a separate file so apps which don't use VME or
     520   * want a different configuration may link against a customized routine.
    423521   */
    424522  BSP_vme_config();
    425523
     524#if defined(DEBUG_BATS)
     525  ShowBATS();
     526#endif
     527
    426528#ifdef SHOW_MORE_INIT_SETTINGS
    427529  printk("Exit from bspstart\n");
  • c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c

    rf9877d25 re79a1947  
    177177    BSP_panic("Exception handling initialization failed\n");
    178178  }
     179#ifdef RTEMS_DEBUG
    179180  else {
    180181    printk("Exception handling initialization done\n");
    181182  }
     183#endif
    182184}
  • c/src/lib/libbsp/powerpc/shared/vme/vmeconfig.c

    rf9877d25 re79a1947  
    3535} dbat0u;
    3636
    37   if (currentBoard < MVME_2300 || currentBoard >= MVME_1600) {
    38                 printk("VME bridge for this board is unknown - if it's a Tundra Universe, add the board to 'shared/vme/vmeconfig.c'\n");
    39                 printk("Skipping VME initialization...\n");
    40                 return;
    41   }
    42 
    4337  vmeUniverseInit();
    4438  vmeUniverseReset();
    45 
    4639  /* setup a PCI area to map the VME bus */
    4740
     
    5043  /* if we have page tables, BAT0 is available */
    5144  if (dbat0u.bat.vs || dbat0u.bat.vp) {
    52         printk("WARNING: BAT0 is taken (no pagetables?); VME bridge must share PCI range for VME access\n");
    53         printk("Skipping VME initialization...\n");
     45        printk("WARNING: BAT0 is taken (no pagetables?); "
     46               "VME bridge must share PCI range for VME access\n"
     47               "Skipping VME initialization...\n");
    5448        return;
    5549  }
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