Changeset e75cef9 in rtems


Ignore:
Timestamp:
Mar 31, 2004, 11:12:13 AM (16 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
509fec9c
Parents:
e208738
Message:

2004-03-31 Ralf Corsepius <ralf_corsepius@…>

  • sh7032/clock/ckinit.c, sh7750/include/sh/sh4uart.h, sh7750/sci/sh4uart.c: Cosmetics.
Location:
c/src/lib/libcpu/sh
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/sh/ChangeLog

    re208738 re75cef9  
     12004-03-31      Ralf Corsepius <ralf_corsepius@rtems.org>
     2
     3        * sh7032/clock/ckinit.c, sh7750/include/sh/sh4uart.h,
     4        sh7750/sci/sh4uart.c: Cosmetics.
     5
    162004-03-30      Ralf Corsepius <ralf_corsepius@rtems.org>
    27
  • c/src/lib/libcpu/sh/sh7032/clock/ckinit.c

    re208738 re75cef9  
    104104  double fclicks_per_tick =
    105105    ((double) clicks_per_sec * (double) usec_per_tick) / 1000000.0 ;
    106   return (uint32_t  ) fclicks_per_tick ;
     106  return (uint32_t) fclicks_per_tick ;
    107107#endif
    108108}
  • c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h

    re208738 re75cef9  
    3636 * Macros to call UART registers
    3737 */
    38 #define SCRDR(n) (*(volatile uint8_t   *)SH7750_SCRDR(n))
     38#define SCRDR(n) (*(volatile uint8_t*)SH7750_SCRDR(n))
    3939#define SCRDR1 SCRDR(1)
    4040#define SCRDR2 SCRDR(2)
    41 #define SCTDR(n) (*(volatile uint8_t   *)SH7750_SCTDR(n))
     41#define SCTDR(n) (*(volatile uint8_t*)SH7750_SCTDR(n))
    4242#define SCTDR1 SCTDR(1)
    4343#define SCTDR2 SCTDR(2)
    44 #define SCSMR(n) ((n) == 1 ? *(volatile uint8_t   *)SH7750_SCSMR1 : \
    45         *(volatile uint16_t   *)SH7750_SCSMR2)
     44#define SCSMR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSMR1 : \
     45        *(volatile uint16_t*)SH7750_SCSMR2)
    4646#define SCSMR1 SCSMR(1)
    4747#define SCSMR2 SCSMR(2)
    48 #define SCSCR(n) ((n) == 1 ? *(volatile uint8_t   *)SH7750_SCSCR1 : \
    49         *(volatile uint16_t   *)SH7750_SCSCR2)
     48#define SCSCR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSCR1 : \
     49        *(volatile uint16_t*)SH7750_SCSCR2)
    5050#define SCSCR1 SCSCR(1)
    5151#define SCSCR2 SCSCR(2)
    52 #define SCSSR(n) ((n) == 1 ? *(volatile uint8_t   *)SH7750_SCSSR1 : \
    53         *(volatile uint16_t   *)SH7750_SCSSR2)
     52#define SCSSR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSSR1 : \
     53        *(volatile uint16_t*)SH7750_SCSSR2)
    5454#define SCSSR1 SCSSR(1)
    5555#define SCSSR2 SCSSR(2)
    56 #define SCSPTR1 (*(volatile uint8_t   *)SH7750_SCSPTR1)
    57 #define SCSPTR2 (*(volatile uint16_t   *)SH7750_SCSPTR2)
    58 #define SCBRR(n) (*(volatile uint8_t   *)SH7750_SCBRR(n))
     56#define SCSPTR1 (*(volatile uint8_t*)SH7750_SCSPTR1)
     57#define SCSPTR2 (*(volatile uint16_t*)SH7750_SCSPTR2)
     58#define SCBRR(n) (*(volatile uint8_t*)SH7750_SCBRR(n))
    5959#define SCBRR1 SCBRR(1)
    6060#define SCBRR2 SCBRR(2)
    61 #define SCFCR2 (*(volatile uint16_t   *)SH7750_SCFCR2)
    62 #define SCFDR2 (*(volatile uint16_t   *)SH7750_SCFDR2)
    63 #define SCLSR2 (*(volatile uint16_t   *)SH7750_SCLSR2)
     61#define SCFCR2 (*(volatile uint16_t*)SH7750_SCFCR2)
     62#define SCFDR2 (*(volatile uint16_t*)SH7750_SCFDR2)
     63#define SCLSR2 (*(volatile uint16_t*)SH7750_SCLSR2)
    6464
    65 #define IPRB (*(volatile uint16_t   *)SH7750_IPRB)
    66 #define IPRC (*(volatile uint16_t   *)SH7750_IPRC)
     65#define IPRB (*(volatile uint16_t*)SH7750_IPRB)
     66#define IPRC (*(volatile uint16_t*)SH7750_IPRC)
    6767
    6868/*
  • c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c

    re208738 re75cef9  
    8484sh4uart_get_Pph(void)
    8585{
    86     uint16_t   frqcr = *(volatile uint16_t   *)SH7750_FRQCR;
     86    uint16_t   frqcr = *(volatile uint16_t*)SH7750_FRQCR;
    8787    uint32_t   Pph = CPU_CLOCK_RATE_HZ;
    8888
     
    361361    uint16_t   smr;
    362362   
    363     smr = (uint16_t  )(*(uint8_t   *)SH7750_SCSMR(uart->chn));
     363    smr = (uint16_t)(*(uint8_t*)SH7750_SCSMR(uart->chn));
    364364
    365365    baud = cfgetospeed(t);
     
    404404
    405405    sh4uart_set_baudrate(uart, baud);
    406     SCSMR(uart->chn) = (uint8_t  )smr;
     406    SCSMR(uart->chn) = (uint8_t)smr;
    407407
    408408    /* enable operations */
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