Changeset e69307b7 in rtems
- Timestamp:
- 04/12/04 22:10:27 (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- b6bf7d53
- Parents:
- 8430205
- Location:
- cpukit/score/cpu/powerpc
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
cpukit/score/cpu/powerpc/ChangeLog
r8430205 re69307b7 1 2004-04-12 David Querbach <querbach@realtime.bc.ca> 2 3 * asm.h, rtems/new-exceptions/cpu.h, rtems/score/ppc.h: addition of 4 MPC555 support as part of the addition of the SS555 BSP. 5 1 6 2004-04-06 Ralf Corsepius <ralf_corsepius@rtems.org> 2 7 -
cpukit/score/cpu/powerpc/asm.h
r8430205 re69307b7 204 204 /* end of IBM400 series register definitions */ 205 205 206 #elif defined(mpc555) 207 /* The following registers are for the MPC5xx */ 208 #define eie 0x050 /* External Interrupt Enable Register */ 209 #define eid 0x051 /* External Interrupt Disable Register */ 210 #define nri 0x052 /* Non-Recoverable Interrupt Register */ 211 206 212 #elif defined(mpc860) || defined(mpc821) 207 213 /* The following registers are for the MPC8x0 */ -
cpukit/score/cpu/powerpc/rtems/asm.h
r8430205 re69307b7 204 204 /* end of IBM400 series register definitions */ 205 205 206 #elif defined(mpc555) 207 /* The following registers are for the MPC5xx */ 208 #define eie 0x050 /* External Interrupt Enable Register */ 209 #define eid 0x051 /* External Interrupt Disable Register */ 210 #define nri 0x052 /* Non-Recoverable Interrupt Register */ 211 206 212 #elif defined(mpc860) || defined(mpc821) 207 213 /* The following registers are for the MPC8x0 */ -
cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h
r8430205 re69307b7 415 415 #endif 416 416 417 #if (defined(mpc 860) || defined(mpc821) || defined(mpc8260))417 #if (defined(mpc555) || defined(mpc860) || defined(mpc821) || defined(mpc8260)) 418 418 uint32_t clock_speed; /* Speed of CPU in Hz */ 419 419 #endif -
cpukit/score/cpu/powerpc/rtems/score/ppc.h
r8430205 re69307b7 123 123 #define PPC_ALIGNMENT 4 124 124 #define PPC_CACHE_ALIGNMENT 16 125 126 /* Added by querbach@realtime.bc.ca */ 127 #define PPC_LOW_POWER_MODE PPC_LOW_POWER_MODE_STANDARD 125 128 126 129 /* Based on comments by Sergei Organov <osv@Javad.RU> */ … … 496 499 #define PPC_IRQ_MEXT_BP (PPC_STD_IRQ_LAST+ 4) 497 500 #define PPC_IRQ_NMEXT_BP (PPC_STD_IRQ_LAST+ 5) 501 502 #elif defined(mpc555) 503 #define PPC_IRQ_SOFTEMU (PPC_STD_IRQ_LAST+1) /* Software emulation. */ 504 #define PPC_IRQ_INST_PE (PPC_STD_IRQ_LAST+2) /* Insn protection error */ 505 #define PPC_IRQ_DATA_PE (PPC_STD_IRQ_LAST+3) /* Data protection error */ 506 #define PPC_IRQ_DATA_BP (PPC_STD_IRQ_LAST+4) /* Data breakpoint */ 507 #define PPC_IRQ_INST_BP (PPC_STD_IRQ_LAST+5) /* Insn breakpoint */ 508 #define PPC_IRQ_MEXT_BP (PPC_STD_IRQ_LAST+6) /* Maskable ext bkpt */ 509 #define PPC_IRQ_NMEXT_BP (PPC_STD_IRQ_LAST+7) /* Non-maskable ext bkpt */ 510 #define PPC_IRQ_LAST PPC_IRQ_NMEXT_BP 498 511 499 512 #elif defined(ppc601)
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