- Timestamp:
- 06/07/11 13:35:43 (13 years ago)
- Branches:
- 4.11, 5, master
- Children:
- b125b46
- Parents:
- e3cb4aa
- Location:
- c/src/lib/libbsp/powerpc
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/beatnik/ChangeLog
re3cb4aa re5da4340 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac: Use standard cache BSP options. 4 1 5 2011-05-17 Till Straumann <strauman@slac.stanford.edu> 2 6 -
c/src/lib/libbsp/powerpc/beatnik/configure.ac
re3cb4aa re5da4340 24 24 AM_PROG_AS 25 25 26 RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1]) 27 RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], 28 [If defined, then the PowerPC specific code in RTEMS will use 29 data cache instructions to optimize the context switch code. 30 This code can conflict with debuggers or emulators. It is known 31 to break the Corelis PowerPC emulator with at least some combinations 32 of PowerPC 603e revisions and emulator versions. 33 The BSP actually contains the call that enables this.]) 26 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1]) 27 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 28 29 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1]) 30 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 34 31 35 32 RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1]) -
c/src/lib/libbsp/powerpc/ep1a/ChangeLog
re3cb4aa re5da4340 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac: Use standard cache BSP options. 4 1 5 2011-05-17 Till Straumann <strauman@slac.stanford.edu> 2 6 -
c/src/lib/libbsp/powerpc/ep1a/configure.ac
re3cb4aa re5da4340 16 16 RTEMS_PROG_CCAS 17 17 18 RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[0]) 19 RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], 20 [If defined, then the PowerPC specific code in RTEMS will use 21 data cache instructions to optimize the context switch code. 22 This code can conflict with debuggers or emulators. It is known 23 to break the Corelis PowerPC emulator with at least some combinations 24 of PowerPC 603e revisions and emulator versions. 25 The BSP actually contains the call that enables this.]) 18 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[]) 19 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 26 20 27 RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[0]) 28 RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], 29 [If defined, the instruction cache will be enabled after address translation 30 is turned on.]) 21 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[]) 22 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 31 23 32 24 RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0]) -
c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog
re3cb4aa re5da4340 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac: Use standard cache BSP options. 4 1 5 2011-05-17 Till Straumann <strauman@slac.stanford.edu> 2 6 -
c/src/lib/libbsp/powerpc/motorola_powerpc/configure.ac
re3cb4aa re5da4340 23 23 AM_PROG_AS 24 24 25 RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1]) 26 RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], 27 [If defined, then the PowerPC specific code in RTEMS will use 28 data cache instructions to optimize the context switch code. 29 This code can conflict with debuggers or emulators. It is known 30 to break the Corelis PowerPC emulator with at least some combinations 31 of PowerPC 603e revisions and emulator versions. 32 The BSP actually contains the call that enables this.]) 25 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1]) 26 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 27 28 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1]) 29 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 33 30 34 31 RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
Note: See TracChangeset
for help on using the changeset viewer.