Changeset e5d706c in rtems


Ignore:
Timestamp:
Jan 28, 2014, 3:02:35 AM (6 years ago)
Author:
Chris Johns <chrisj@…>
Branches:
4.11, master
Children:
e1b96b8
Parents:
6dce1621
git-author:
Chris Johns <chrisj@…> (01/28/14 03:02:35)
git-committer:
Chris Johns <chrisj@…> (02/02/14 03:01:18)
Message:

bsp/xilinx_zynq: Support configuraton of memory map. Remove SMP variants.

Generate a linker command file from configure letting the user override the
defaults to suite their custom needs. Refer to configure.ac for the details.

Remove the SMP variants and let --enable-smp control if a BSP is built for
SMP.

Make USE_FAST_IDLE 1 only for the realview qemu BSP.

Location:
c/src/lib/libbsp/arm/xilinx-zynq
Files:
12 deleted
3 edited
1 moved

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am

    r6dce1621 re5d706c  
    6060
    6161project_lib_DATA += startup/linkcmds
    62 project_lib_DATA += startup/linkcmds.xilinx_zynq
    63 project_lib_DATA += startup/linkcmds.xilinx_zynq_a9_qemu
    64 project_lib_DATA += startup/linkcmds.xilinx_zynq_a9_qemu_smp
    65 project_lib_DATA += startup/linkcmds.xilinx_zynq_zc702
    66 project_lib_DATA += startup/linkcmds.xilinx_zynq_zc702_smp
    67 project_lib_DATA += startup/linkcmds.xilinx_zynq_zc706
    68 project_lib_DATA += startup/linkcmds.xilinx_zynq_zc706_smp
    69 project_lib_DATA += startup/linkcmds.xilinx_zynq_zedboard
    70 project_lib_DATA += startup/linkcmds.xilinx_zynq_zedboard_smp
    7162
    7263###############################################################################
  • c/src/lib/libbsp/arm/xilinx-zynq/configure.ac

    r6dce1621 re5d706c  
    3030RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz])
    3131
    32 RTEMS_BSPOPTS_SET([CLOCK_DRIVER_USE_FAST_IDLE],[*qemu],[1])
     32USE_FAST_IDLE=0
     33AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu], [USE_FAST_IDLE=1])
     34
     35RTEMS_BSPOPTS_SET([CLOCK_DRIVER_USE_FAST_IDLE],[*qemu],[${USE_FAST_IDLE}])
    3336RTEMS_BSPOPTS_HELP([CLOCK_DRIVER_USE_FAST_IDLE],
    3437[This sets a mode where the time runs as fast as possible when a clock ISR
     
    3942RTEMS_BSPOPTS_HELP([BSP_CONSOLE_MINOR],[minor number of console device])
    4043
     44ZYNQ_CPUS="1"
    4145RTEMS_CHECK_SMP
    4246AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"])
     47AS_IF([test "$rtems_cv_HAS_SMP" = "yes"],
     48      [ZYNQ_CPUS="2"])
     49
     50#
     51# Zynq Memory map can be controlled from the configure command line. Use ...
     52#
     53#   ..../configure --target=arm-rtems4.11 ... ZYNQ_RAM_LENGTH=256M
     54#
     55AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu],
     56      [ZYNQ_RAM_ORIGIN="0x00000000"
     57       ZYNQ_RAM_LENGTH="256M"
     58       ZYNQ_RAM_MMU="0x0fffc000"
     59       ZYNQ_RAM_MMU_LENGTH="16k"
     60       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN}"
     61       ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 16k"
     62       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
     63       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     64       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
     65       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
     66
     67AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc702],
     68      [ZYNQ_RAM_ORIGIN="0x00100000"
     69       ZYNQ_RAM_LENGTH="1024M"
     70       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
     71       ZYNQ_RAM_MMU_LENGTH="16k"
     72       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
     73       ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 1M - 16k"
     74       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
     75       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     76       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
     77       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
     78
     79AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc706],
     80      [ZYNQ_RAM_ORIGIN="0x00400000"
     81       ZYNQ_RAM_LENGTH="1024M"
     82       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
     83       ZYNQ_RAM_MMU_LENGTH="16k"
     84       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
     85       ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 4M - 16k"
     86       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
     87       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     88       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
     89       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
     90
     91AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zedboard],
     92      [ZYNQ_RAM_ORIGIN="0x00100000"
     93       ZYNQ_RAM_LENGTH="512M"
     94       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
     95       ZYNQ_RAM_MMU_LENGTH="16k"
     96       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
     97       ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 1M - 16k"
     98       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
     99       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     100       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
     101       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
     102
     103AC_DEFUN([ZYNQ_LINKCMD],[
     104AC_ARG_VAR([$1],[$2; default $3])dnl
     105[$1]=[$]{[$1]:-[$3]}
     106])
     107
     108ZYNQ_LINKCMD([ZYNQ_CPUS],[Number of active cores],[${ZYNQ_CPUS}])
     109ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN],[normal RAM region origin],[${ZYNQ_RAM_ORIGIN}])
     110ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH],[normal RAM region length],[${ZYNQ_RAM_LENGTH}])
     111ZYNQ_LINKCMD([ZYNQ_RAM_MMU],[MMU region origin],[${ZYNQ_RAM_MMU}])
     112ZYNQ_LINKCMD([ZYNQ_RAM_MMU_LENGTH],[MMU region length],[${ZYNQ_RAM_MMU_LENGTH}])
     113ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN_AVAILABLE],[origin of available RAM],[${ZYNQ_RAM_ORIGIN_AVAILABLE}])
     114ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH_AVAILABLE],[length of available RAM],[${ZYNQ_RAM_LENGTH_AVAILABLE}])
     115ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_ORIGIN],[internal 0 RAM region origin],[${ZYNQ_RAM_INT_0_ORIGIN}])
     116ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_LENGTH],[internal 0 RAM region length],[${ZYNQ_RAM_INT_0_LENGTH}])
     117ZYNQ_LINKCMD([ZYNQ_RAM_INT_1_ORIGIN],[internal 1 RAM region origin],[${ZYNQ_RAM_INT_1_ORIGIN}])
     118ZYNQ_LINKCMD([ZYNQ_RAM_INT_1_LENGTH],[internal 1 RAM region length],[${ZYNQ_RAM_INT_1_LENGTH}])
    43119
    44120RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
    45 RTEMS_BSP_LINKCMDS
    46121
    47 AC_CONFIG_FILES([Makefile])
     122AC_CONFIG_FILES([
     123Makefile
     124startup/linkcmds])
    48125AC_OUTPUT
  • c/src/lib/libbsp/arm/xilinx-zynq/preinstall.am

    r6dce1621 re5d706c  
    147147TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
    148148
    149 $(PROJECT_LIB)/linkcmds.xilinx_zynq: startup/linkcmds.xilinx_zynq $(PROJECT_LIB)/$(dirstamp)
    150         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq
    151 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq
    152 
    153 $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu: startup/linkcmds.xilinx_zynq_a9_qemu $(PROJECT_LIB)/$(dirstamp)
    154         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu
    155 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu
    156 
    157 $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu_smp: startup/linkcmds.xilinx_zynq_a9_qemu_smp $(PROJECT_LIB)/$(dirstamp)
    158         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu_smp
    159 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu_smp
    160 
    161 $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702: startup/linkcmds.xilinx_zynq_zc702 $(PROJECT_LIB)/$(dirstamp)
    162         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702
    163 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702
    164 
    165 $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702_smp: startup/linkcmds.xilinx_zynq_zc702_smp $(PROJECT_LIB)/$(dirstamp)
    166         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702_smp
    167 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702_smp
    168 
    169 $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc706: startup/linkcmds.xilinx_zynq_zc706 $(PROJECT_LIB)/$(dirstamp)
    170         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc706
    171 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc706
    172 
    173 $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc706_smp: startup/linkcmds.xilinx_zynq_zc706_smp $(PROJECT_LIB)/$(dirstamp)
    174         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc706_smp
    175 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc706_smp
    176 
    177 $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard: startup/linkcmds.xilinx_zynq_zedboard $(PROJECT_LIB)/$(dirstamp)
    178         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard
    179 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard
    180 
    181 $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard_smp: startup/linkcmds.xilinx_zynq_zedboard_smp $(PROJECT_LIB)/$(dirstamp)
    182         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard_smp
    183 TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard_smp
    184 
  • c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in

    r6dce1621 re5d706c  
     1MEMORY {
     2   RAM_INT_0 : ORIGIN = @ZYNQ_RAM_INT_0_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_0_LENGTH@
     3   RAM_INT_1 : ORIGIN = @ZYNQ_RAM_INT_1_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_1_LENGTH@
     4   RAM_MMU   : ORIGIN = @ZYNQ_RAM_MMU@, LENGTH = @ZYNQ_RAM_MMU_LENGTH@
     5   RAM       : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@, LENGTH = @ZYNQ_RAM_LENGTH_AVAILABLE@
     6}
     7
     8bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : @ZYNQ_CPUS@;
     9
    110REGION_ALIAS ("REGION_START",          RAM);
    211REGION_ALIAS ("REGION_VECTOR",         RAM);
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