Index: c/src/lib/libcpu/powerpc/README
===================================================================
--- c/src/lib/libcpu/powerpc/README	(revision 289ad864a5597250d874d32b3e2019adcea42ac4)
+++ c/src/lib/libcpu/powerpc/README	(revision e57b0e23d4781e597299281524f6395dae4a25ad)
@@ -3,5 +3,5 @@
 #
 
-This hierachy contains support routines for the various
+This hierarchy contains support routines for the various
 PowerPC processors.
 
@@ -11,3 +11,3 @@
 Currently only the PPC403 is supported.
 
-Andrew Bray 18/8/1995
+Andrew Bray 4/December/1995
Index: c/src/lib/libcpu/powerpc/ppc403/README
===================================================================
--- c/src/lib/libcpu/powerpc/ppc403/README	(revision 289ad864a5597250d874d32b3e2019adcea42ac4)
+++ c/src/lib/libcpu/powerpc/ppc403/README	(revision e57b0e23d4781e597299281524f6395dae4a25ad)
@@ -9,5 +9,5 @@
 
 console - Uses the 403 Internal serial port to do RTEMS
-	console I/O.  Not ALL memebers of the 403 family
+	console I/O.  Not ALL members of the 403 family
 	have this.
 
@@ -20,3 +20,3 @@
 vectors - PowerPC 403 specific vector entry points.
 	Includes CPU dependant, application independant
-	handlres: alignment.
+	handlers: alignment.
Index: c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
===================================================================
--- c/src/lib/libcpu/powerpc/ppc403/clock/clock.c	(revision 289ad864a5597250d874d32b3e2019adcea42ac4)
+++ c/src/lib/libcpu/powerpc/ppc403/clock/clock.c	(revision e57b0e23d4781e597299281524f6395dae4a25ad)
@@ -4,5 +4,5 @@
  *  PowerPC 403 CPU.  The tick frequency is specified by the bsp.
  *
- *  Author:	Andrew Bray <andy@i-cubed.demon.co.uk>
+ *  Author: Andrew Bray <andy@i-cubed.co.uk>
  *
  *  COPYRIGHT (c) 1995 by i-cubed ltd.
@@ -57,5 +57,5 @@
     register rtems_unsigned32 rc;
 
-    asm volatile ("mftblo %0" : "=r" ((rc)));
+    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
 
     return rc;
@@ -70,56 +70,57 @@
 {
     if (!auto_restart)
-	{
-	    rtems_unsigned32 clicks_til_next_interrupt;
-	    rtems_unsigned32 itimer_value;
-
-	    /*
-	     * setup for next interrupt; making sure the new value is reasonably
-	     * in the future.... in case we lost out on an interrupt somehow
-	     */
-
-	    itimer_value = get_itimer();
-	    tick_time += pit_value;
-
-	    /*
-	     * how far away is next interrupt *really*
-	     * It may be a long time; this subtraction works even if
-	     * Clock_clicks_interrupt < Clock_clicks_low_order via
-	     * the miracle of unsigned math.
-	     */
-	    clicks_til_next_interrupt = tick_time - itimer_value;
-
-	    /*
-	     * If it is too soon then bump it up.
-	     * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
-	     * But setting it low is useful for debug, so...
-	     */
-
-	    if (clicks_til_next_interrupt < 400)
-		{
-		    tick_time = itimer_value + 1000;
-		    clicks_til_next_interrupt = 1000;
-		    /* XXX: count these! this should be rare */
-		}
-
-	    /*
-	     * If it is too late, that means we missed the interrupt somehow.
-	     * Rather than wait 35-50s for a wrap, we just fudge it here.
-	     */
-	    
-	    if (clicks_til_next_interrupt > pit_value)
-		{
-		    tick_time = itimer_value + 1000;
-		    clicks_til_next_interrupt = 1000;
-		    /* XXX: count these! this should never happen :-) */
-		}
-
-	    asm volatile ("mtpit %0" :: "r" (clicks_til_next_interrupt));
-	}
-
-    asm volatile ( "mttsr %0" :: "r" (0x08000000));
-
+    {
+      rtems_unsigned32 clicks_til_next_interrupt;
+      rtems_unsigned32 itimer_value;
+ 
+      /*
+       * setup for next interrupt; making sure the new value is reasonably
+       * in the future.... in case we lost out on an interrupt somehow
+       */
+ 
+      itimer_value = get_itimer();
+      tick_time += pit_value;
+ 
+      /*
+       * how far away is next interrupt *really*
+       * It may be a long time; this subtraction works even if
+       * Clock_clicks_interrupt < Clock_clicks_low_order via
+       * the miracle of unsigned math.
+       */
+      clicks_til_next_interrupt = tick_time - itimer_value;
+ 
+      /*
+       * If it is too soon then bump it up.
+       * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
+       * But setting it low is useful for debug, so...
+       */
+ 
+      if (clicks_til_next_interrupt < 400)
+      {
+        tick_time = itimer_value + 1000;
+        clicks_til_next_interrupt = 1000;
+        /* XXX: count these! this should be rare */
+      }
+ 
+      /*
+       * If it is too late, that means we missed the interrupt somehow.
+       * Rather than wait 35-50s for a wrap, we just fudge it here.
+       */
+ 
+      if (clicks_til_next_interrupt > pit_value)
+      {
+        tick_time = itimer_value + 1000;
+        clicks_til_next_interrupt = 1000;
+        /* XXX: count these! this should never happen :-) */
+      }
+ 
+      asm volatile ("mtspr 0x3db, %0" :: "r" 
+                         (clicks_til_next_interrupt)); /* PIT */
+  }
+ 
+    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
+ 
     Clock_driver_ticks++;
-
+ 
     rtems_clock_tick();
 }
@@ -129,28 +130,29 @@
     rtems_isr_entry previous_isr;
     rtems_unsigned32 pvr, iocr;
-
+ 
     Clock_driver_ticks = 0;
-
-    asm volatile ("mfiocr %0" : "=r" (iocr));
+ 
+    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
     iocr &= ~4;
     iocr |= 4;  /* Select external timer clock */
-    asm volatile ("mtiocr %0" : "=r" (iocr) : "0" (iocr));
-
-    asm volatile ("mfpvr %0" : "=r" ((pvr)));
-
+    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
+ 
+    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
+ 
     if (((pvr & 0xffff0000) >> 16) != 0x0020)
-	return; /* Not a ppc403 */
-
+      return; /* Not a ppc403 */
+ 
     if ((pvr & 0xff00) == 0x0000) /* 403GA */
-	auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
+      auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
     else if ((pvr & 0xff00) == 0x0100) /* 403GB */
-	auto_restart = 1;
-
+      auto_restart = 1;
+ 
     pit_value = BSP_Configuration.microseconds_per_tick *
-	Cpu_table.clicks_per_usec;
-
+      Cpu_table.clicks_per_usec;
+ 
     if (BSP_Configuration.ticks_per_timeslice)
     {
-	register rtems_unsigned32 tcr;
+      register rtems_unsigned32 tcr;
+
         /*
          * initialize the interval here
@@ -160,19 +162,18 @@
          * interrupt overhead
          */
-
-	rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT,
-			      &previous_isr);
-
-	asm volatile ("mtpit %0" : : "r" (pit_value));
-
-	asm volatile ("mftcr %0" : "=r" ((tcr)));
-
-	tcr &= ~ 0x04400000;
-
-	tcr |= (auto_restart ? 0x04400000 : 0x04000000);
-
-	tick_time = get_itimer() + pit_value;
-
-	asm volatile ("mttcr %0" : "=r" ((tcr)) : "0" ((tcr)));
+ 
+      rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
+ 
+      asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
+ 
+      asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+ 
+      tcr &= ~ 0x04400000;
+ 
+      tcr |= (auto_restart ? 0x04400000 : 0x04000000);
+ 
+      tick_time = get_itimer() + pit_value;
+ 
+      asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
     }
     atexit(Clock_exit);
@@ -187,6 +188,5 @@
     rtems_interrupt_disable(isrlevel);
     
-    rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT,
-			  &previous_isr);
+    rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr);
 
     rtems_interrupt_enable(isrlevel);
@@ -204,14 +204,15 @@
     if ( BSP_Configuration.ticks_per_timeslice )
     {
-	register rtems_unsigned32 tcr;
-
-	asm volatile ("mftcr %0" : "=r" ((tcr)));
-
-	tcr &= ~ 0x04400000;
-
-	asm volatile ("mttcr %0" : "=r" ((tcr)) : "0" ((tcr)));
-
-        (void) set_vector(0, PPC_IRQ_PIT, 1);
-    }
+      register rtems_unsigned32 tcr;
+ 
+      asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+ 
+      tcr &= ~ 0x04400000;
+ 
+      asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+ 
+      (void) set_vector(0, PPC_IRQ_PIT, 1);
+    }
+
 }
 
Index: c/src/lib/libcpu/powerpc/ppc403/console/console.c
===================================================================
--- c/src/lib/libcpu/powerpc/ppc403/console/console.c	(revision 289ad864a5597250d874d32b3e2019adcea42ac4)
+++ c/src/lib/libcpu/powerpc/ppc403/console/console.c	(revision e57b0e23d4781e597299281524f6395dae4a25ad)
@@ -2,5 +2,5 @@
  *  This file contains the PowerPC 403GA console IO package.
  *
- *  Author:	Andrew Bray <andy@i-cubed.demon.co.uk>
+ *  Author:	Andrew Bray <andy@i-cubed.co.uk>
  *
  *  COPYRIGHT (c) 1995 by i-cubed ltd.
@@ -146,11 +146,11 @@
 
   /* Initialise the serial port */
-  asm volatile ("mfiocr %0" : "=r" (tmp));
+  asm volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */
   tmp &= ~3;
   tmp |= (Cpu_table.serial_external_clock ? 2 : 0) |
       (Cpu_table.serial_cts_rts ? 1 : 0);
-  asm volatile ("mtiocr %0" : "=r" (tmp) : "0" (tmp));
+  asm volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */
   port->SPLS = (LSRDataReady | LSRFramingError | LSROverrunError |
-	       LSRParityError | LSRBreakInterrupt);
+         LSRParityError | LSRBreakInterrupt);
   tmp = Cpu_table.serial_per_sec / Cpu_table.serial_rate;
   tmp = ((tmp + 8) >> 4) - 1;
@@ -158,5 +158,5 @@
   port->BRDH = tmp >> 8;
   port->SPCTL = (CRNormal | CRDtr | CRRts | CRWordLength8 | CRParityDisable |
-		 CRStopBitsOne);
+     CRStopBitsOne);
   port->SPRC = (RCREnable | RCRIntDisable | RCRPauseEnable);
   port->SPTC = (TCREnable | TCRIntDisable);
@@ -229,13 +229,13 @@
     {
       if ((status = port->SPLS) & LSRDataReady)
-	break;
+	      break;
 
       /* Clean any dodgy status */
       if ((status & (LSRFramingError | LSROverrunError | LSRParityError |
 		     LSRBreakInterrupt)) != 0)
-	{
-	  port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError |
-			LSRBreakInterrupt);
-	}
+	    {
+	      port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError |
+			    LSRBreakInterrupt);
+	    }
     }
 
@@ -270,17 +270,15 @@
         port->SPHS = (HSRDsr | HSRCts);
       else if (status & LSRTxHoldEmpty)
-	break;
+	      break;
     }
 
   if (Cpu_table.serial_xon_xoff)
     while (is_character_ready(&status))
-      {
-	if (status == XOFFchar)
-	  do
-	    {
-	      while (!is_character_ready(&status));
-	    }
-	  while (status != XONchar);
-      }
+    {
+	    if (status == XOFFchar)
+	      do {
+	        while (!is_character_ready(&status));
+	      } while (status != XONchar);
+    }
 
   port->SPTB = ch;
Index: c/src/lib/libcpu/powerpc/ppc403/timer/timer.c
===================================================================
--- c/src/lib/libcpu/powerpc/ppc403/timer/timer.c	(revision 289ad864a5597250d874d32b3e2019adcea42ac4)
+++ c/src/lib/libcpu/powerpc/ppc403/timer/timer.c	(revision e57b0e23d4781e597299281524f6395dae4a25ad)
@@ -7,5 +7,5 @@
  *        determined when porting or modifying this code.
  *
- *  Author:	Andrew Bray <andy@i-cubed.demon.co.uk>
+ *  Author:	Andrew Bray <andy@i-cubed.co.uk>
  *
  *  COPYRIGHT (c) 1995 by i-cubed ltd.
@@ -50,5 +50,5 @@
    rtems_unsigned32 ret;
 
-   asm volatile ("mftblo %0" : "=r" ((ret)));
+   asm volatile ("mfspr %0, 0x3dd" : "=r" ((ret))); /* TBLO */
 
    return ret;
@@ -59,8 +59,8 @@
   rtems_unsigned32 iocr;
 
-  asm volatile ("mfiocr %0" : "=r" (iocr));
+  asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
   iocr &= ~4;
   iocr |= 4;  /* Select external timer clock */
-  asm volatile ("mtiocr %0" : "=r" (iocr) : "0" (iocr));
+  asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
 
   Timer_starting = get_itimer();
Index: c/src/lib/libcpu/powerpc/ppc403/vectors/align_h.s
===================================================================
--- c/src/lib/libcpu/powerpc/ppc403/vectors/align_h.s	(revision 289ad864a5597250d874d32b3e2019adcea42ac4)
+++ c/src/lib/libcpu/powerpc/ppc403/vectors/align_h.s	(revision e57b0e23d4781e597299281524f6395dae4a25ad)
@@ -1,3 +1,3 @@
-/*  align_h.s	1.0 - 95/09/26
+/*  align_h.s	1.1 - 95/12/04
  *
  *  This file contains the assembly code for the PowerPC 403
@@ -26,5 +26,5 @@
  * Modifications:
  *
- *  Author:	Andrew Bray <andy@i-cubed.demon.co.uk>
+ *  Author:	Andrew Bray <andy@i-cubed.co.uk>
  *
  *  COPYRIGHT (c) 1995 by i-cubed ltd.
@@ -122,8 +122,8 @@
         stw     r9,Open_cr(r1)
         stw     r10,Open_ctr(r1)
-        mfsrr2  r7
-        mfsrr3  r8
-        mfsrr0  r9
-        mfsrr1  r10
+        mfspr	r7, srr2		/* SRR 2 */
+        mfspr	r8, srr3		/* SRR 3 */
+        mfspr	r9, srr0		/* SRR 0 */
+        mfspr	r10, srr1		/* SRR 1 */
         stw     r7,Open_srr2(r1)
         stw     r8,Open_srr3(r1)
@@ -132,5 +132,5 @@
 
 /*      Set up common registers */
-        mfdear  r5                      /* R5 is data exception address */
+        mfspr	r5, dear		/* DEAR: R5 is data exception address */
         lwz     r9,Open_srr0(r1)        /* get faulting instruction */
         addi    r7,r9,4                 /* bump instruction */
@@ -426,11 +426,8 @@
         mtctr   r26
         mtcrf   0xFF, r27
-        mtsrr2  r28
-        mtsrr3  r29
-        mtsrr0  r30
-        mtsrr1  r31
-        mttcr   r30
-        mtexier r31
+        mtspr	srr2, r28		/* SRR 2 */
+        mtspr	srr3, r29		/* SRR 3 */
+        mtspr	srr0, r30		/* SRR 0 */
+        mtspr	srr1, r31		/* SRR 1 */
         lmw     r0,Open_gpr0+ALIGN_REGS(r0)
         rfi
-
Index: c/src/lib/libcpu/powerpc/ppc403/vectors/vectors.s
===================================================================
--- c/src/lib/libcpu/powerpc/ppc403/vectors/vectors.s	(revision 289ad864a5597250d874d32b3e2019adcea42ac4)
+++ c/src/lib/libcpu/powerpc/ppc403/vectors/vectors.s	(revision e57b0e23d4781e597299281524f6395dae4a25ad)
@@ -1,8 +1,8 @@
-/*  vectors.s	1.0 - 95/08/08
+/*  vectors.s	1.1 - 95/12/04
  *
  *  This file contains the assembly code for the PowerPC 403
  *  interrupt veneers for RTEMS.
  *
- *  Author:	Andrew Bray <andy@i-cubed.demon.co.uk>
+ *  Author:	Andrew Bray <andy@i-cubed.co.uk>
  *
  *  COPYRIGHT (c) 1995 by i-cubed ltd.
@@ -19,5 +19,4 @@
  *      of this software for any purpose.
  *
- *  $Id$
  */
 
@@ -38,4 +37,6 @@
  *  offset from 0x????0000 to the first location in the file.  This
  *  will usually be 0x0000 or 0x0100.
+ *
+ *  $Id$
  */
 
@@ -114,17 +115,13 @@
 /* Critical error handling */
 	.org	crit_vector - file_base
-	mtsprg1	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg1 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
@@ -134,17 +131,13 @@
 /* Machine check exception */
 	.org	mach_vector - file_base
-	mtsprg1	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg1 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
@@ -154,17 +147,13 @@
 /* Protection exception */
 	.org	prot_vector - file_base
-	mtsprg0	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg0 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
@@ -174,17 +163,13 @@
 /* External interrupt */
 	.org	ext_vector - file_base
-	mtsprg0	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg0 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
@@ -199,17 +184,13 @@
 /* Program exception */
 	.org	prog_vector - file_base
-	mtsprg0	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg0 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
@@ -219,17 +200,13 @@
 /* System call */
 	.org	sys_vector - file_base
-	mtsprg0	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg0 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
@@ -239,69 +216,45 @@
 /* PIT interrupt */
 	.org	pit_vector - file_base
-	b	pit
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
+	stw	r0, IP_0(r1)
+
+	li      r0, PPC_IRQ_PIT
+	b       PROC (_ISR_Handler)
 			
 /* FIT interrupt */
 	.org	fit_vector - file_base
-	b	fit
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
+	stw	r0, IP_0(r1)
+
+	li      r0, PPC_IRQ_FIT
+	b       PROC (_ISR_Handler)
 			
 /* Watchdog interrupt */
 	.org	wadt_vector - file_base
-	b	watch
-		
-/* PIT interrupt */
-pit:
-	mtsprg0	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg0 r0
-	stw	r0, IP_0(r1)
-
-	li      r0, PPC_IRQ_PIT
-	b       PROC (_ISR_Handler)
-	
-/* FIT interrupt */
-fit:
-	mtsprg0	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg0 r0
-	stw	r0, IP_0(r1)
-
-	li      r0, PPC_IRQ_FIT
-	b       PROC (_ISR_Handler)
-
-/* Watchdog interrupt */
-watch:
-	mtsprg1	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg1 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
@@ -311,17 +264,13 @@
 /* Debug exception */
 debug:
-	mtsprg1	r0
-	mfsprg2 r0
-	mtmsr	r0
-#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
-#if (PPC_HAS_FPU)
-	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
-#else
-	stwu	r1, -(20*4 + IP_END)(r1)
-#endif
-#else
-	stwu	r1, -(IP_END)(r1)
-#endif
-	mfsprg1 r0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
 	stw	r0, IP_0(r1)
 
