Changeset e4607167 in rtems


Ignore:
Timestamp:
Jun 28, 2011, 8:29:33 PM (8 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.11, master
Children:
c5a4332
Parents:
fdcd80e
Message:

2011-06-28 Joel Sherrill <joel.sherrill@…>

Jennifer Averett <jennifer.averett@…>

PR 1801/bsps

  • shared/start.S: Add SMP support to LEON3 BSP.
Location:
c/src/lib/libbsp/sparc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/ChangeLog

    rfdcd80e re4607167  
     12011-06-28      Joel Sherrill <joel.sherrill@oarcorp.com>
     2                Jennifer Averett <jennifer.averett@OARcorp.com>
     3
     4        PR 1801/bsps
     5        * shared/start.S: Add SMP support to LEON3 BSP.
     6
    172011-06-19      Ralf Corsépius <ralf.corsepius@rtems.org>
    28
  • c/src/lib/libbsp/sparc/shared/start.S

    rfdcd80e re4607167  
    1 /*
    2  *  start.s
     1/**
     2 *  @file
    33 *
    44 *  Common start code for SPARC.
     
    77 *  distribution of the SPARC Instruction Simulator (SIS) found
    88 *  at ftp://ftp.estec.esa.nl/pub/ws/wsd/erc32.
    9  *
    10  *  COPYRIGHT (c) 1989-2006.
     9 */
     10
     11/*
     12 *  COPYRIGHT (c) 1989-2011.
    1113 *  On-Line Applications Research Corporation (OAR).
    1214 *
     
    1921
    2022#include <rtems/asm.h>
     23#include <rtems/system.h>
    2124#include <bspopts.h>
    2225
     26#if defined(RTEMS_SMP) && defined(BSP_LEON3_SMP)
     27  #define ENABLE_SMP
     28#endif
     29
    2330/*
    2431 *  Unexpected trap will halt the processor by forcing it to error state
    2532 */
    26 
    2733#define BAD_TRAP \
    2834  ta 0; \
     
    3036  nop; \
    3137  nop;
     38
     39#if defined(ENABLE_SMP)
     40/*
     41 * Variables to contain information used with bring a secondary core
     42 * out of reset.
     43 */
     44        .global bsp_ap_stack
     45        .global bsp_ap_entry
     46#endif
    3247
    3348/*
     
    222237        nop
    223238
     239#if defined(ENABLE_SMP)
     240        rd      %asr17, %g1
     241        srl     %g1, 28, %g1
     242        and     %g1, 0xff, %g1                  ! extract cpu id
     243        cmp     %g1, 0
     244        beq     cpu0
     245        nop
     246        set     SYM(bsp_ap_stack), %g1          ! set the stack pointer
     247        ld      [%g1], %sp
     248        mov     %sp, %fp
     249        set     SYM(bsp_ap_entry), %g1          ! where to start
     250        ld      [%g1], %g1
     251        call    %g1
     252        nop
     253cpu0:
     254#endif
     255
    224256        set     (SYM(rdb_start)), %g6   ! End of RAM
    225257        st      %sp, [%g6]
Note: See TracChangeset for help on using the changeset viewer.