Ignore:
Timestamp:
Jun 27, 2018, 8:05:50 AM (2 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
5, master
Children:
afb60eb
Parents:
a8188730
git-author:
Sebastian Huber <sebastian.huber@…> (06/27/18 08:05:50)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/29/18 08:04:37)
Message:

riscv: Optimize context switch and interrupts

Save/restore non-volatile registers in _CPU_Context_switch().

Save/restore volatile registers in _ISR_Handler().

Update #3433.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/riscv/riscv-exception-handler.S

    ra8188730 re43994d  
    5151TYPE_FUNC(ISR_Handler)
    5252SYM(ISR_Handler):
    53         addi    sp, sp, -1 * 36 * CPU_SIZEOF_POINTER
     53        addi    sp, sp, -CPU_INTERRUPT_FRAME_SIZE
    5454
    55         SREG    x1, (1 * CPU_SIZEOF_POINTER)(sp)
    56         /* Skip x2/sp */
    57         SREG    x3, (3 * CPU_SIZEOF_POINTER)(sp)
    58         SREG    x4, (4 * CPU_SIZEOF_POINTER)(sp)
    59         SREG    x5, (5 * CPU_SIZEOF_POINTER)(sp)
    60         SREG    x6, (6 * CPU_SIZEOF_POINTER)(sp)
    61         SREG    x7, (7 * CPU_SIZEOF_POINTER)(sp)
    62         SREG    x8, (8 * CPU_SIZEOF_POINTER)(sp)
    63         SREG    x9, (9 * CPU_SIZEOF_POINTER)(sp)
    64         SREG    x10, (10 * CPU_SIZEOF_POINTER)(sp)
    65         SREG    x11, (11 * CPU_SIZEOF_POINTER)(sp)
    66         SREG    x12, (12 * CPU_SIZEOF_POINTER)(sp)
    67         SREG    x13, (13 * CPU_SIZEOF_POINTER)(sp)
    68         SREG    x14, (14 * CPU_SIZEOF_POINTER)(sp)
    69         SREG    x15, (15 * CPU_SIZEOF_POINTER)(sp)
    70         SREG    x16, (16 * CPU_SIZEOF_POINTER)(sp)
    71         SREG    x17, (17 * CPU_SIZEOF_POINTER)(sp)
    72         SREG    x18, (18 * CPU_SIZEOF_POINTER)(sp)
    73         SREG    x19, (19 * CPU_SIZEOF_POINTER)(sp)
    74         SREG    x20, (20 * CPU_SIZEOF_POINTER)(sp)
    75         SREG    x21, (21 * CPU_SIZEOF_POINTER)(sp)
    76         SREG    x22, (22 * CPU_SIZEOF_POINTER)(sp)
    77         SREG    x23, (23 * CPU_SIZEOF_POINTER)(sp)
    78         SREG    x24, (24 * CPU_SIZEOF_POINTER)(sp)
    79         SREG    x25, (25 * CPU_SIZEOF_POINTER)(sp)
    80         SREG    x26, (26 * CPU_SIZEOF_POINTER)(sp)
    81         SREG    x27, (27 * CPU_SIZEOF_POINTER)(sp)
    82         SREG    x28, (28 * CPU_SIZEOF_POINTER)(sp)
    83         SREG    x29, (29 * CPU_SIZEOF_POINTER)(sp)
    84         SREG    x30, (30 * CPU_SIZEOF_POINTER)(sp)
    85         SREG    x31, (31 * CPU_SIZEOF_POINTER)(sp)
    86 
    87         /* Exception level related registers */
    88         csrr    a0, mstatus
    89         SREG    a0, (32 * CPU_SIZEOF_POINTER)(sp)
     55        /* Save */
     56        SREG    a0, RISCV_INTERRUPT_FRAME_A0(sp)
     57        SREG    a1, RISCV_INTERRUPT_FRAME_A1(sp)
     58        SREG    a2, RISCV_INTERRUPT_FRAME_A2(sp)
     59        SREG    s0, RISCV_INTERRUPT_FRAME_S0(sp)
    9060        csrr    a0, mcause
    91         SREG    a0, (33 * CPU_SIZEOF_POINTER)(sp)
    92         csrr    a1, mepc
    93         SREG    a1, (34 * CPU_SIZEOF_POINTER)(sp)
     61        csrr    a1, mstatus
     62        csrr    a2, mepc
     63        GET_SELF_CPU_CONTROL    s0
     64        SREG    s1, RISCV_INTERRUPT_FRAME_S1(sp)
     65        SREG    ra, RISCV_INTERRUPT_FRAME_RA(sp)
     66        SREG    a3, RISCV_INTERRUPT_FRAME_A3(sp)
     67        SREG    a4, RISCV_INTERRUPT_FRAME_A4(sp)
     68        SREG    a5, RISCV_INTERRUPT_FRAME_A5(sp)
     69        SREG    a6, RISCV_INTERRUPT_FRAME_A6(sp)
     70        SREG    a7, RISCV_INTERRUPT_FRAME_A7(sp)
     71        SREG    t0, RISCV_INTERRUPT_FRAME_T0(sp)
     72        SREG    t1, RISCV_INTERRUPT_FRAME_T1(sp)
     73        SREG    t2, RISCV_INTERRUPT_FRAME_T2(sp)
     74        SREG    t3, RISCV_INTERRUPT_FRAME_T3(sp)
     75        SREG    t4, RISCV_INTERRUPT_FRAME_T4(sp)
     76        SREG    t5, RISCV_INTERRUPT_FRAME_T5(sp)
     77        SREG    t6, RISCV_INTERRUPT_FRAME_T6(sp)
     78        SREG    a1, RISCV_INTERRUPT_FRAME_MSTATUS(sp)
     79        SREG    a2, RISCV_INTERRUPT_FRAME_MEPC(sp)
    9480
    9581        /* FIXME Only handle interrupts for now (MSB = 1) */
    9682        andi    a0, a0, 0xf
    97 
    98         /* Get per-CPU control of current processor */
    99         GET_SELF_CPU_CONTROL    s0
    10083
    10184        /* Increment interrupt nest and thread dispatch disable level */
     
    10689        sw      t2, PER_CPU_ISR_NEST_LEVEL(s0)
    10790        sw      t1, PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL(s0)
    108 
    109         /* Save interrupted task stack pointer */
    110         addi    t4, sp, 36 * CPU_SIZEOF_POINTER
    111         SREG    t4, (2 * CPU_SIZEOF_POINTER)(sp)
    11291
    11392        /* Keep sp (Exception frame address) in s1 */
     
    192171.Lthread_dispatch_done:
    193172
    194         LREG    x1, (1 * CPU_SIZEOF_POINTER)(sp)
    195         /* Skip sp/x2 */
    196         LREG    x3, (3 * CPU_SIZEOF_POINTER)(sp)
    197         LREG    x4, (4 * CPU_SIZEOF_POINTER)(sp)
    198         LREG    x5, (5 * CPU_SIZEOF_POINTER)(sp)
    199         LREG    x6, (6 * CPU_SIZEOF_POINTER)(sp)
    200         LREG    x7, (7 * CPU_SIZEOF_POINTER)(sp)
    201         LREG    x8, (8 * CPU_SIZEOF_POINTER)(sp)
    202         LREG    x9, (9 * CPU_SIZEOF_POINTER)(sp)
    203         LREG    x10, (10 * CPU_SIZEOF_POINTER)(sp)
    204         LREG    x11, (11 * CPU_SIZEOF_POINTER)(sp)
    205         LREG    x12, (12 * CPU_SIZEOF_POINTER)(sp)
    206         LREG    x13, (13 * CPU_SIZEOF_POINTER)(sp)
    207         LREG    x14, (14 * CPU_SIZEOF_POINTER)(sp)
    208         LREG    x15, (15 * CPU_SIZEOF_POINTER)(sp)
    209         LREG    x16, (16 * CPU_SIZEOF_POINTER)(sp)
    210         LREG    x17, (17 * CPU_SIZEOF_POINTER)(sp)
    211         LREG    x18, (18 * CPU_SIZEOF_POINTER)(sp)
    212         LREG    x19, (19 * CPU_SIZEOF_POINTER)(sp)
    213         LREG    x20, (20 * CPU_SIZEOF_POINTER)(sp)
    214         LREG    x21, (21 * CPU_SIZEOF_POINTER)(sp)
    215         LREG    x22, (22 * CPU_SIZEOF_POINTER)(sp)
    216         LREG    x23, (23 * CPU_SIZEOF_POINTER)(sp)
    217         LREG    x24, (24 * CPU_SIZEOF_POINTER)(sp)
    218         LREG    x25, (25 * CPU_SIZEOF_POINTER)(sp)
    219         LREG    x26, (26 * CPU_SIZEOF_POINTER)(sp)
    220         LREG    x27, (27 * CPU_SIZEOF_POINTER)(sp)
    221         LREG    x28, (28 * CPU_SIZEOF_POINTER)(sp)
    222         LREG    x29, (29 * CPU_SIZEOF_POINTER)(sp)
    223         LREG    x30, (30 * CPU_SIZEOF_POINTER)(sp)
     173        /* Restore */
     174        LREG    a0, RISCV_INTERRUPT_FRAME_MSTATUS(sp)
     175        LREG    a1, RISCV_INTERRUPT_FRAME_MEPC(sp)
     176        LREG    a2, RISCV_INTERRUPT_FRAME_A2(sp)
     177        LREG    s0, RISCV_INTERRUPT_FRAME_S0(sp)
     178        LREG    s1, RISCV_INTERRUPT_FRAME_S1(sp)
     179        LREG    ra, RISCV_INTERRUPT_FRAME_RA(sp)
     180        LREG    a3, RISCV_INTERRUPT_FRAME_A3(sp)
     181        LREG    a4, RISCV_INTERRUPT_FRAME_A4(sp)
     182        LREG    a5, RISCV_INTERRUPT_FRAME_A5(sp)
     183        LREG    a6, RISCV_INTERRUPT_FRAME_A6(sp)
     184        LREG    a7, RISCV_INTERRUPT_FRAME_A7(sp)
     185        LREG    t0, RISCV_INTERRUPT_FRAME_T0(sp)
     186        LREG    t1, RISCV_INTERRUPT_FRAME_T1(sp)
     187        LREG    t2, RISCV_INTERRUPT_FRAME_T2(sp)
     188        LREG    t3, RISCV_INTERRUPT_FRAME_T3(sp)
     189        LREG    t4, RISCV_INTERRUPT_FRAME_T4(sp)
     190        LREG    t5, RISCV_INTERRUPT_FRAME_T5(sp)
     191        LREG    t6, RISCV_INTERRUPT_FRAME_T6(sp)
     192        csrw    mstatus, a0
     193        csrw    mepc, a1
     194        LREG    a0, RISCV_INTERRUPT_FRAME_A0(sp)
     195        LREG    a1, RISCV_INTERRUPT_FRAME_A1(sp)
    224196
    225         /* Load mstatus */
    226         LREG    x31, (32 * CPU_SIZEOF_POINTER)(sp)
    227         csrw    mstatus, x31
    228         /* Load mepc */
    229         LREG    x31, (34 * CPU_SIZEOF_POINTER)(sp)
    230         csrw    mepc, x31
    231 
    232         LREG    x31, (31 * CPU_SIZEOF_POINTER)(sp)
    233 
    234         /* Unwind exception frame */
    235         addi    sp, sp, 36 * CPU_SIZEOF_POINTER
     197        addi    sp, sp, CPU_INTERRUPT_FRAME_SIZE
    236198
    237199        mret
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