Ignore:
Timestamp:
Jun 27, 2018, 8:05:50 AM (2 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
5, master
Children:
afb60eb
Parents:
a8188730
git-author:
Sebastian Huber <sebastian.huber@…> (06/27/18 08:05:50)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/29/18 08:04:37)
Message:

riscv: Optimize context switch and interrupts

Save/restore non-volatile registers in _CPU_Context_switch().

Save/restore volatile registers in _ISR_Handler().

Update #3433.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/riscv/include/rtems/score/cpu.h

    ra8188730 re43994d  
    106106
    107107typedef struct {
    108   /* riscv has 32 xlen-bit (where xlen can be 32 or 64) general purpose registers (x0-x31)*/
    109   unsigned long x[32];
    110 
     108#ifdef RTEMS_SMP
     109  volatile uint32_t is_executing;
     110#else
     111  uint32_t reserved;
     112#endif
    111113  uint32_t isr_dispatch_disable;
    112 #ifdef RTEMS_SMP
    113   volatile bool is_executing;
    114 #endif
     114  uintptr_t ra;
     115  uintptr_t sp;
     116  uintptr_t tp;
     117  uintptr_t s0;
     118  uintptr_t s1;
     119  uintptr_t s2;
     120  uintptr_t s3;
     121  uintptr_t s4;
     122  uintptr_t s5;
     123  uintptr_t s6;
     124  uintptr_t s7;
     125  uintptr_t s8;
     126  uintptr_t s9;
     127  uintptr_t s10;
     128  uintptr_t s11;
    115129} Context_Control;
    116130
    117131#define _CPU_Context_Get_SP( _context ) \
    118   (_context)->x[2]
     132  (_context)->sp
    119133
    120134typedef struct {
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