- Timestamp:
- 06/07/11 13:32:31 (13 years ago)
- Branches:
- 4.11, 5, master
- Children:
- e5da4340
- Parents:
- b6027474
- Location:
- c/src/lib/libbsp/powerpc/mbx8xx
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
rb6027474 re3cb4aa 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac, startup/bspstart.c, include/coverhd.h: Use standard 4 cache BSP options. 5 1 6 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> 2 7 -
c/src/lib/libbsp/powerpc/mbx8xx/configure.ac
rb6027474 re3cb4aa 19 19 AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") 20 20 21 RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[mbx860_005b],[0]) 22 RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1]) 23 RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], 24 [If defined, then the PowerPC specific code in RTEMS will use 25 data cache instructions to optimize the context switch code. 26 This code can conflict with debuggers or emulators.]) 21 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([mbx860_005b],[]) 22 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1]) 23 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 27 24 28 RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1]) 29 RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE], 30 [If defined, the data cache will be enabled after address translation 31 is turned on.]) 32 33 RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1]) 34 RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], 35 [If defined, the instruction cache will be enabled after address translation 36 is turned on.]) 25 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1]) 26 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 37 27 38 28 RTEMS_BSPOPTS_SET([NVRAM_CONFIGURE],[mbx860_005b],[0]) -
c/src/lib/libbsp/powerpc/mbx8xx/include/coverhd.h
rb6027474 re3cb4aa 33 33 34 34 #if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) ) 35 #if defined( INSTRUCTION_CACHE_ENABLE )35 #if BSP_INSTRUCTION_CACHE_ENABLED 36 36 /* 37 37 * 50 MHz processor, cache enabled. … … 191 191 #define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 3 192 192 193 #endif /* defined( INSTRUCTION_CACHE_ENABLE )*/193 #endif /* BSP_INSTRUCTION_CACHE_ENABLED */ 194 194 195 195 #else 196 #if defined( INSTRUCTION_CACHE_ENABLE )196 #if BSP_INSTRUCTION_CACHE_ENABLED 197 197 /* 198 198 * 40 MHz processor, cache enabled. … … 352 352 #define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 3 353 353 354 #endif /* defined( INSTRUCTION_CACHE_ENABLE )*/354 #endif /* BSP_INSTRUCTION_CACHE_ENABLED */ 355 355 356 356 #endif -
c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
rb6027474 re3cb4aa 107 107 rtems_cache_enable_data(); 108 108 #else 109 #if def INSTRUCTION_CACHE_ENABLE109 #if BSP_INSTRUCTION_CACHE_ENABLED 110 110 rtems_cache_enable_instruction(); 111 111 #endif 112 #if def DATA_CACHE_ENABLE112 #if BSP_DATA_CACHE_ENABLED 113 113 rtems_cache_enable_data(); 114 114 #endif
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