Changeset e33be09 in rtems


Ignore:
Timestamp:
Feb 27, 2019, 2:10:53 PM (8 weeks ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
8e8e269
Parents:
feea03b6
git-author:
Sebastian Huber <sebastian.huber@…> (02/27/19 14:10:53)
git-committer:
Sebastian Huber <sebastian.huber@…> (02/28/19 10:50:18)
Message:

bsps/arm: Support GIC group 0/1

Location:
bsps/arm
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • bsps/arm/include/bsp/arm-gic-irq.h

    rfeea03b6 re33be09  
    88
    99/*
    10  * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2013, 2019 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
     
    5858  rtems_vector_number vector,
    5959  uint8_t *priority
     60);
     61
     62rtems_status_code arm_gic_irq_set_group(
     63  rtems_vector_number vector,
     64  gic_group group
     65);
     66
     67rtems_status_code arm_gic_irq_get_group(
     68  rtems_vector_number vector,
     69  gic_group *group
    6070);
    6171
  • bsps/arm/include/bsp/arm-gic-regs.h

    rfeea03b6 re33be09  
    88
    99/*
    10  * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2013, 2019 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
     
    2828typedef struct {
    2929  uint32_t iccicr;
     30#define GIC_CPUIF_ICCICR_CBPR BSP_BIT32(4)
     31#define GIC_CPUIF_ICCICR_FIQ_EN BSP_BIT32(3)
     32#define GIC_CPUIF_ICCICR_ACK_CTL BSP_BIT32(2)
     33#define GIC_CPUIF_ICCICR_ENABLE_GRP_1 BSP_BIT32(1)
    3034#define GIC_CPUIF_ICCICR_ENABLE BSP_BIT32(0)
    3135  uint32_t iccpmr;
     
    8488typedef struct {
    8589  uint32_t icddcr;
     90#define GIC_DIST_ICDDCR_ENABLE_GRP_1 BSP_BIT32(1)
    8691#define GIC_DIST_ICDDCR_ENABLE BSP_BIT32(0)
    8792  uint32_t icdictr;
     
    110115#define GIC_DIST_ICDIIDR_IMPLEMENTER_SET(reg, val) BSP_FLD32SET(reg, val, 0, 11)
    111116  uint32_t reserved_0c[29];
    112   uint32_t icdisr[32];
     117  uint32_t icdigr[32];
    113118  uint32_t icdiser[32];
    114119  uint32_t icdicer[32];
  • bsps/arm/include/bsp/arm-gic.h

    rfeea03b6 re33be09  
    88
    99/*
    10  * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2013, 2019 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
     
    102102}
    103103
     104typedef enum {
     105  GIC_GROUP_0,
     106  GIC_GROUP_1
     107} gic_group;
     108
     109static inline gic_group gic_id_get_group(
     110  volatile gic_dist *dist,
     111  uint32_t id
     112)
     113{
     114  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
     115  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
     116
     117  return (dist->icdigr[i] & bit) != 0 ?  GIC_GROUP_1 : GIC_GROUP_0;
     118}
     119
     120static inline void gic_id_set_group(
     121  volatile gic_dist *dist,
     122  uint32_t id,
     123  gic_group group
     124)
     125{
     126  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
     127  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
     128  uint32_t icdigr = dist->icdigr[i];
     129
     130  icdigr &= ~bit;
     131
     132  if (group == GIC_GROUP_1) {
     133    icdigr |= bit;
     134  }
     135
     136  dist->icdigr[i] = icdigr;
     137}
     138
    104139static inline void gic_id_set_priority(
    105140  volatile gic_dist *dist,
  • bsps/arm/shared/irq/irq-gic.c

    rfeea03b6 re33be09  
    11/*
    2  * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2013, 2019 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    158158}
    159159
     160rtems_status_code arm_gic_irq_set_group(
     161  rtems_vector_number vector,
     162  gic_group group
     163)
     164{
     165  rtems_status_code sc = RTEMS_SUCCESSFUL;
     166
     167  if (bsp_interrupt_is_valid_vector(vector)) {
     168    volatile gic_dist *dist = ARM_GIC_DIST;
     169
     170    gic_id_set_group(dist, vector, group);
     171  } else {
     172    sc = RTEMS_INVALID_ID;
     173  }
     174
     175  return sc;
     176}
     177
     178rtems_status_code arm_gic_irq_get_group(
     179  rtems_vector_number vector,
     180  gic_group *group
     181)
     182{
     183  rtems_status_code sc = RTEMS_SUCCESSFUL;
     184
     185  if (bsp_interrupt_is_valid_vector(vector)) {
     186    volatile gic_dist *dist = ARM_GIC_DIST;
     187
     188    *group = gic_id_get_group(dist, vector);
     189  } else {
     190    sc = RTEMS_INVALID_ID;
     191  }
     192
     193  return sc;
     194}
     195
    160196void bsp_interrupt_set_affinity(
    161197  rtems_vector_number vector,
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