Index: cpukit/score/cpu/m68k/ChangeLog
===================================================================
--- cpukit/score/cpu/m68k/ChangeLog	(revision 84fff68d095fc80d34608b360102c62684a6b945)
+++ cpukit/score/cpu/m68k/ChangeLog	(revision e339d8b718018d49b734d38e5496433cee5d097a)
@@ -1,2 +1,10 @@
+2008-06-10	Chris Johns <chrisj@rtems.org>
+
+	* cpu_asm.S: Add Coldfire FPU support.
+	* rtems/score/m68k.h: Change the Coldfire CPU defines to be based
+	on the instruction set. Add Tiny RTEMS support to the small memory
+	model RTEMS processors.
+	* rtems/score/cpu.h: Handle the new Tiny RTEMS support.
+
 2008-06-05	Joel Sherrill <joel.sherrill@OARcorp.com>
 
Index: cpukit/score/cpu/m68k/cpu_asm.S
===================================================================
--- cpukit/score/cpu/m68k/cpu_asm.S	(revision 84fff68d095fc80d34608b360102c62684a6b945)
+++ cpukit/score/cpu/m68k/cpu_asm.S	(revision e339d8b718018d49b734d38e5496433cee5d097a)
@@ -60,4 +60,6 @@
 
 .set FPCONTEXT_ARG,   4                   | save FP context argument
+.set FP_STATE_SAVED,  (4*4)               | FPU state is 4 longwords
+.set FP_REGS_SAVED,   (8*8)               | FPU regs is 8 64bit values
 
         .align  4
@@ -67,9 +69,22 @@
         moval    a7@(FPCONTEXT_ARG),a1    | a1 = &ptr to context area
         moval    a1@,a0                   | a0 = Save context area
+#if ( !defined(__mcoldfire__) && !__mc68060__ )
         fsave    a0@-                     | save 68881/68882 state frame
+#else
+        lea      a0@(-FP_STATE_SAVED),a0  | save the state of the FPU
+        fsave    a0@                      | on a Coldfire and 68060.
+#endif
         tstb     a0@                      | check for a null frame
         beq.b    nosv                     | Yes, skip save of user model
+#if ( !defined(__mcoldfire__) )
         fmovem   fp0-fp7,a0@-             | save data registers (fp0-fp7)
         fmovem   fpc/fps/fpi,a0@-         | and save control registers
+#else
+        lea      a0@(-FP_REGS_SAVED),a0
+        fmovem   fp0-fp7,a0@              | save data registers (fp0-fp7)
+        fmove.l  fpc,a0@-                 | and save control registers
+        fmove.l  fps,a0@-
+        fmove.l  fpi,a0@-
+#endif
         movl     #-1,a0@-                 | place not-null flag on stack
 nosv:   movl     a0,a1@                   | save pointer to saved context
@@ -86,7 +101,17 @@
         beq.b    norst                    | Yes, skip fp restore
         addql    #4,a0                    | throwaway non-null flag
+#if ( !defined(__mcoldfire__) )
         fmovem   a0@+,fpc/fps/fpi         | restore control registers
         fmovem   a0@+,fp0-fp7             | restore data regs (fp0-fp7)
 norst:  frestore a0@+                     | restore the fp state frame
+#else
+        fmove.l  a0@+,fpc                 | restore control registers
+        fmove.l  a0@+,fps    
+        fmove.l  a0@+,fpi
+        fmovem   a0@,fp0-fp7              | restore data regs (fp0-fp7)
+        lea      a0@(FP_REGS_SAVED),a0
+norst:	frestore a0@                      | restore the fp state frame
+        lea      a0@(FP_STATE_SAVED),a0
+#endif
         movl     a0,a1@                   | save pointer to saved context
 #endif
@@ -196,5 +221,5 @@
  * without the dispatch level being incremented.
  */
-  #if ( !defined(__mcoldfire__) && M68K_MC68060_ARCH == 0 )
+  #if ( !defined(__mcoldfire__) && !__mc68060__ )
         cmpl    #_ISR_Handler,a7@(SAVED+PC_OFFSET)
         beq.b   exit        
Index: cpukit/score/cpu/m68k/rtems/score/cpu.h
===================================================================
--- cpukit/score/cpu/m68k/rtems/score/cpu.h	(revision 84fff68d095fc80d34608b360102c62684a6b945)
+++ cpukit/score/cpu/m68k/rtems/score/cpu.h	(revision e339d8b718018d49b734d38e5496433cee5d097a)
@@ -277,5 +277,10 @@
  */
 
-#define CPU_STACK_MINIMUM_SIZE           4096
+#define CPU_STACK_MINIMUM_SIZE           M68K_CPU_STACK_MINIMUM_SIZE
+
+/*
+ *  Maximum priority of a thread. Note based from 0 which is the idle task.
+ */
+#define CPU_PRIORITY_MAXIMUM             M68K_CPU_PRIORITY_MAXIMUM
 
 /*
@@ -464,5 +469,5 @@
   asm volatile( "bfffo (%1),#0,#16,%0" : "=d" (_output) : "a" (&_value));
 
-#elif ( M68K_HAS_ISA_APLUS == 1 )
+#elif ( __mcfisaaplus__ )
   /* This is simplified by the fact that RTEMS never calls it with _value=0 */
 #define _CPU_Bitfield_Find_first_bit( _value, _output ) \
Index: cpukit/score/cpu/m68k/rtems/score/m68k.h
===================================================================
--- cpukit/score/cpu/m68k/rtems/score/m68k.h	(revision 84fff68d095fc80d34608b360102c62684a6b945)
+++ cpukit/score/cpu/m68k/rtems/score/m68k.h	(revision e339d8b718018d49b734d38e5496433cee5d097a)
@@ -85,4 +85,80 @@
 
 /*
+ * Handle the Coldfire family based on the instruction set.
+ */
+#if defined(__mcoldfire__)
+
+# define CPU_NAME "Motorola ColdFire"
+
+# if defined(__mcfisaa__)
+/* Motorola ColdFire ISA A */ 
+# define CPU_MODEL_NAME         "mcfisaa"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_BFFFO           0
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_PREINDEXING     0
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+
+# elif defined(__mcfisaaplus__)
+/* Motorola ColdFire ISA A+ */ 
+# define CPU_MODEL_NAME         "mcfisaaplus"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_BFFFO           0
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_PREINDEXING     0
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+
+# elif defined(__mcfisab__)
+/* Motorola ColdFire ISA B */ 
+# define CPU_MODEL_NAME         "mcfisab"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_BFFFO           0
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_PREINDEXING     0
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+
+# else
+# error "Unsupported Coldfire ISA -- Please notify RTEMS"
+# endif
+
+/*
+ * Assume the FPU support is independent. I think it is just the ISA B
+ * instruction set.
+ */
+# if defined (__mcffpu__)
+# define M68K_HAS_FPU            1
+# define M68K_HAS_FPSP_PACKAGE   0
+# else
+# define M68K_HAS_FPU            0
+# define M68K_HAS_FPSP_PACKAGE   0
+# endif
+
+/*
+ * Tiny RTEMS support. Small stack and limited priorities.
+ */
+# if (defined(__mcf_cpu_52221) || \
+      defined(__mcf_cpu_52223) || \
+      defined(__mcf_cpu_52230) || \
+      defined(__mcf_cpu_52231) || \
+      defined(__mcf_cpu_52232) || \
+      defined(__mcf_cpu_52233) || \
+      defined(__mcf_cpu_52234) || \
+      defined(__mcf_cpu_52235) || \
+      defined(__mcf_cpu_52225) || \
+      defined(__mcf_cpu_52235))
+# define M68K_CPU_STACK_MINIMUM_SIZE 2048
+/* Define the lowest priority. Based from 0 to this is 16 levels. */
+# define M68K_CPU_PRIORITY_MAXIMUM   15
+# else
+# define M68K_CPU_STACK_MINIMUM_SIZE 4096
+# define M68K_CPU_PRIORITY_MAXIMUM   255
+# endif
+
+#else
+
+/*
  *  Figure out all CPU Model Feature Flags based upon compiler 
  *  predefines.   Notice the only exception to this is that 
@@ -93,198 +169,144 @@
  */
 
-#if (defined(__mc68020__) && !defined(__mcpu32__))
- 
-#define CPU_MODEL_NAME          "m68020"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_SEPARATE_STACKS 1
-#define M68K_HAS_BFFFO           1
-#define M68K_HAS_PREINDEXING     1
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-# if defined (__HAVE_68881__)
-# define M68K_HAS_FPU            1
-# define M68K_HAS_FPSP_PACKAGE   0
+# define CPU_NAME "Motorola MC68xxx"
+
+/*
+ * One stack size fits all 68000 processors.
+ */ 
+# define M68K_CPU_STACK_MINIMUM_SIZE 4096
+
+# if (defined(__mc68020__) && !defined(__mcpu32__))
+
+# define CPU_MODEL_NAME          "m68020"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_SEPARATE_STACKS 1
+# define M68K_HAS_BFFFO           1
+# define M68K_HAS_PREINDEXING     1
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+#  if defined (__HAVE_68881__)
+#  define M68K_HAS_FPU            1
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  else
+#  define M68K_HAS_FPU            0
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  endif
+ 
+# elif defined(__mc68030__)
+ 
+# define CPU_MODEL_NAME          "m68030"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_SEPARATE_STACKS 1
+# define M68K_HAS_BFFFO           1
+# define M68K_HAS_PREINDEXING     1
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+#  if defined (__HAVE_68881__)
+#  define M68K_HAS_FPU            1
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  else
+#  define M68K_HAS_FPU            0
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  endif
+ 
+# elif defined(__mc68040__)
+
+# define CPU_MODEL_NAME          "m68040"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_SEPARATE_STACKS 1
+# define M68K_HAS_BFFFO           1
+# define M68K_HAS_PREINDEXING     1
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+#  if defined (__HAVE_68881__)
+#  define M68K_HAS_FPU            1
+#  define M68K_HAS_FPSP_PACKAGE   1
+#  else
+#  define M68K_HAS_FPU            0
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  endif
+ 
+# elif defined(__mc68060__)
+
+# define CPU_MODEL_NAME          "m68060"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_BFFFO           1
+# define M68K_HAS_PREINDEXING     1
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+#  if defined (__HAVE_68881__)
+#  define M68K_HAS_FPU            1
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  else
+#  define M68K_HAS_FPU            0
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  endif
+ 
+# elif defined(__mc68302__)
+
+# define CPU_MODEL_NAME          "m68302"
+# define M68K_HAS_VBR             0
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_BFFFO           0
+# define M68K_HAS_PREINDEXING     0
+# define M68K_HAS_EXTB_L          0
+# define M68K_HAS_MISALIGNED      0
+# define M68K_HAS_FPU             0
+# define M68K_HAS_FPSP_PACKAGE    0
+
+  /* gcc and egcs do not distinguish between CPU32 and CPU32+ */
+# elif defined(RTEMS__mcpu32p__)
+ 
+# define CPU_MODEL_NAME          "mcpu32+"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_BFFFO           0
+# define M68K_HAS_PREINDEXING     1
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      1
+# define M68K_HAS_FPU             0
+# define M68K_HAS_FPSP_PACKAGE    0
+
+# elif defined(__mcpu32__)
+ 
+# define CPU_MODEL_NAME          "mcpu32"
+# define M68K_HAS_VBR             1
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_BFFFO           0
+# define M68K_HAS_PREINDEXING     1
+# define M68K_HAS_EXTB_L          1
+# define M68K_HAS_MISALIGNED      0
+# define M68K_HAS_FPU             0
+# define M68K_HAS_FPSP_PACKAGE    0
+
+# elif defined(__mc68000__)
+ 
+# define CPU_MODEL_NAME          "m68000"
+# define M68K_HAS_VBR             0
+# define M68K_HAS_SEPARATE_STACKS 0
+# define M68K_HAS_BFFFO           0
+# define M68K_HAS_PREINDEXING     0
+# define M68K_HAS_EXTB_L          0
+# define M68K_HAS_MISALIGNED      0
+#  if defined (__HAVE_68881__)
+#  define M68K_HAS_FPU            1
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  else
+#  define M68K_HAS_FPU            0
+#  define M68K_HAS_FPSP_PACKAGE   0
+#  endif
+
 # else
-# define M68K_HAS_FPU            0
-# define M68K_HAS_FPSP_PACKAGE   0
+
+# error "Unsupported 68000 CPU model -- are you sure you're running a 68k compiler?"
+
 # endif
- 
-#elif defined(__mc68030__)
- 
-#define CPU_MODEL_NAME          "m68030"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_SEPARATE_STACKS 1
-#define M68K_HAS_BFFFO           1
-#define M68K_HAS_PREINDEXING     1
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-# if defined (__HAVE_68881__)
-# define M68K_HAS_FPU            1
-# define M68K_HAS_FPSP_PACKAGE   0
-# else
-# define M68K_HAS_FPU            0
-# define M68K_HAS_FPSP_PACKAGE   0
-# endif
- 
-#elif defined(__mc68040__)
-
-#define CPU_MODEL_NAME          "m68040"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_SEPARATE_STACKS 1
-#define M68K_HAS_BFFFO           1
-#define M68K_HAS_PREINDEXING     1
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-# if defined (__HAVE_68881__)
-# define M68K_HAS_FPU            1
-# define M68K_HAS_FPSP_PACKAGE   1
-# else
-# define M68K_HAS_FPU            0
-# define M68K_HAS_FPSP_PACKAGE   0
-# endif
- 
-#elif defined(__mc68060__)
-
-#define CPU_MODEL_NAME          "m68060"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_BFFFO           1
-#define M68K_HAS_PREINDEXING     1
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-# if defined (__HAVE_68881__)
-# define M68K_HAS_FPU            1
-# define M68K_HAS_FPSP_PACKAGE   0
-# else
-# define M68K_HAS_FPU            0
-# define M68K_HAS_FPSP_PACKAGE   0
-# endif
- 
-#elif defined(__mc68302__)
-
-#define CPU_MODEL_NAME          "m68302"
-#define M68K_HAS_VBR             0
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_PREINDEXING     0
-#define M68K_HAS_EXTB_L          0
-#define M68K_HAS_MISALIGNED      0
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-
-  /* gcc and egcs do not distinguish between CPU32 and CPU32+ */
-#elif defined(RTEMS__mcpu32p__)
- 
-#define CPU_MODEL_NAME          "mcpu32+"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_PREINDEXING     1
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-
-#elif defined(__mcpu32__)
- 
-#define CPU_MODEL_NAME          "mcpu32"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_PREINDEXING     1
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      0
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-
-#elif defined(__mcf528x__)
-/* Motorola ColdFire ISA A+ - RISC/68020 hybrid */ 
-#define CPU_MODEL_NAME         "m528x"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_PREINDEXING     0
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-#define M68K_HAS_ISA_APLUS       1
-
-#elif defined(__mcf5200__)
-/* Motorola ColdFire V2 core - RISC/68020 hybrid */ 
-#define CPU_MODEL_NAME         "m5200"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_PREINDEXING     0
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-#define M68K_HAS_ISA_APLUS       0
-
-#elif defined(__mcf5307__)
-/* UNCHECKED */
-/* Motorola ColdFire 5307 */ 
-#define CPU_MODEL_NAME         "m5307"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_PREINDEXING     0
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-#define M68K_HAS_ISA_APLUS       0
-
-#elif defined(__mcf5407__)
-#if defined(__mcfv4e__)
-/* UNCHECKED */
-/* Motorola ColdFire V4e */ 
-#define CPU_MODEL_NAME         "mcfv4e"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_PREINDEXING     0
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-#define M68K_HAS_ISA_APLUS       0
-#else
-/* UNCHECKED */
-/* Motorola ColdFire 5407 */ 
-#define CPU_MODEL_NAME         "m5407"
-#define M68K_HAS_VBR             1
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_PREINDEXING     0
-#define M68K_HAS_EXTB_L          1
-#define M68K_HAS_MISALIGNED      1
-#define M68K_HAS_FPU             0
-#define M68K_HAS_FPSP_PACKAGE    0
-#define M68K_HAS_ISA_APLUS       0
-#endif
-
-#elif defined(__mc68000__)
- 
-#define CPU_MODEL_NAME          "m68000"
-#define M68K_HAS_VBR             0
-#define M68K_HAS_SEPARATE_STACKS 0
-#define M68K_HAS_BFFFO           0
-#define M68K_HAS_PREINDEXING     0
-#define M68K_HAS_EXTB_L          0
-#define M68K_HAS_MISALIGNED      0
-# if defined (__HAVE_68881__)
-# define M68K_HAS_FPU            1
-# define M68K_HAS_FPSP_PACKAGE   0
-# else
-# define M68K_HAS_FPU            0
-# define M68K_HAS_FPSP_PACKAGE   0
-# endif
-
-#else
-
-#error "Unsupported CPU model -- are you sure you're running a 68k compiler?"
+
+/*
+ * No Tiny RTEMS support on the standard 68000 family.
+ */
+# define M68K_CPU_STACK_MINIMUM_SIZE 4096
+# define M68K_CPU_PRIORITY_MAXIMUM   255
 
 #endif
@@ -300,17 +322,7 @@
  */
 #if defined(__mcoldfire__)
-#define M68K_COLDFIRE_ARCH      1
+#define M68K_COLDFIRE_ARCH  1
 #else
 #define M68K_COLDFIRE_ARCH	0
-#endif
-
-/*
- *  Define the name of the CPU family.
- */
-
-#if ( defined(__mcoldfire__) )
-  #define CPU_NAME "Motorola ColdFire"
-#else
-  #define CPU_NAME "Motorola MC68xxx"
 #endif
 
