Index: c/src/lib/libbsp/arm/acinclude.m4
===================================================================
--- c/src/lib/libbsp/arm/acinclude.m4	(revision d8f05c837d41e9bf794f821b2e41ff8fd33b98e3)
+++ c/src/lib/libbsp/arm/acinclude.m4	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -29,4 +29,6 @@
   smdk2410 )
     AC_CONFIG_SUBDIRS([smdk2410]);;
+  stm32f4 )
+    AC_CONFIG_SUBDIRS([stm32f4]);;
   *)
     AC_MSG_ERROR([Invalid BSP]);;
Index: c/src/lib/libbsp/arm/stm32f4/Makefile.am
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/Makefile.am	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/Makefile.am	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,117 @@
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+
+include $(top_srcdir)/../../../../automake/compile.am
+
+include_bspdir = $(includedir)/bsp
+
+###############################################################################
+#                  Data                                                       #
+###############################################################################
+
+dist_project_lib_DATA = bsp_specs
+
+noinst_LIBRARIES = libbspstart.a
+
+libbspstart_a_SOURCES = ../shared/start/start.S
+
+project_lib_DATA =
+project_lib_DATA += start.$(OBJEXT)
+project_lib_DATA += startup/linkcmds
+
+EXTRA_DIST = startup/linkcmds.stm32f4
+
+###############################################################################
+#                  Header                                                     #
+###############################################################################
+
+include_HEADERS =
+include_HEADERS += ../../shared/include/tm27.h
+include_HEADERS += include/bsp.h
+
+nodist_include_HEADERS =
+nodist_include_HEADERS += ../../shared/include/coverhd.h
+nodist_include_HEADERS += include/bspopts.h
+
+nodist_include_bsp_HEADERS =
+nodist_include_bsp_HEADERS += ../../shared/include/bootcard.h
+
+include_bsp_HEADERS =
+include_bsp_HEADERS += ../../shared/include/utility.h
+include_bsp_HEADERS += ../../shared/include/irq-generic.h
+include_bsp_HEADERS += ../../shared/include/irq-info.h
+include_bsp_HEADERS += ../../shared/include/stackalloc.h
+include_bsp_HEADERS += ../../shared/tod.h
+include_bsp_HEADERS += ../shared/include/start.h
+include_bsp_HEADERS += ../shared/armv7m/include/armv7m-irq.h
+include_bsp_HEADERS += include/irq.h
+include_bsp_HEADERS += include/usart.h
+include_bsp_HEADERS += include/stm32f4.h
+
+###############################################################################
+#                  LibBSP                                                     #
+###############################################################################
+
+noinst_LIBRARIES += libbsp.a
+
+libbsp_a_SOURCES =
+libbsp_a_CPPFLAGS =
+libbsp_a_LIBADD =
+
+# Shared
+libbsp_a_SOURCES += ../../shared/bootcard.c
+libbsp_a_SOURCES += ../../shared/bspclean.c
+libbsp_a_SOURCES += ../../shared/bspgetworkarea.c
+libbsp_a_SOURCES += ../../shared/bsplibc.c
+libbsp_a_SOURCES += ../../shared/bsppost.c
+libbsp_a_SOURCES += ../../shared/bsppredriverhook.c
+libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
+libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c
+libbsp_a_SOURCES += ../../shared/sbrk.c
+libbsp_a_SOURCES += ../../shared/src/stackalloc.c
+
+# Startup
+libbsp_a_SOURCES += ../shared/startup/bsp-start-copy-sections.c
+libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
+libbsp_a_SOURCES += startup/bspstart.c
+libbsp_a_SOURCES += startup/bspstarthook.c
+libbsp_a_SOURCES += startup/bspreset.c
+
+# IRQ
+libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
+libbsp_a_SOURCES += ../../shared/src/irq-generic.c
+libbsp_a_SOURCES += ../../shared/src/irq-info.c
+libbsp_a_SOURCES += ../../shared/src/irq-legacy.c
+libbsp_a_SOURCES += ../../shared/src/irq-server.c
+libbsp_a_SOURCES += ../../shared/src/irq-shell.c
+libbsp_a_SOURCES += ../shared/armv7m/irq/armv7m-irq.c
+libbsp_a_SOURCES += ../shared/armv7m/irq/armv7m-irq-dispatch.c
+
+# Console
+libbsp_a_SOURCES += ../../shared/console.c
+libbsp_a_SOURCES += ../../shared/console_control.c
+libbsp_a_SOURCES += ../../shared/console_read.c
+libbsp_a_SOURCES += ../../shared/console_select.c
+libbsp_a_SOURCES += ../../shared/console_write.c
+libbsp_a_SOURCES += console/console-config.c
+libbsp_a_SOURCES += console/usart.c
+
+# Clock
+libbsp_a_SOURCES += ../../shared/clockdrv_shell.h
+libbsp_a_SOURCES += ../shared/armv7m/clock/armv7m-clock-config.c
+
+# Timer
+libbsp_a_SOURCES += ../../shared/timerstub.c
+
+# Cache
+libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
+libbsp_a_SOURCES += ../../../libcpu/arm/shared/cache/cache_.h
+libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
+
+###############################################################################
+#                  Special Rules                                              #
+###############################################################################
+
+DISTCLEANFILES = include/bspopts.h
+
+include $(srcdir)/preinstall.am
+include $(top_srcdir)/../../../../automake/local.am
Index: c/src/lib/libbsp/arm/stm32f4/README
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/README	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/README	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,5 @@
+Tested with STM32F4-Discovery evaluation board.
+
+For debugging on Linux use:
+
+https://github.com/texane/stlink
Index: c/src/lib/libbsp/arm/stm32f4/bsp_specs
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/bsp_specs	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/bsp_specs	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,13 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
+
+*endfile:
+%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }
Index: c/src/lib/libbsp/arm/stm32f4/configure.ac
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/configure.ac	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/configure.ac	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,60 @@
+AC_PREREQ([2.68])
+AC_INIT([rtems-c-src-lib-libbsp-arm-stm32f4],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
+AC_CONFIG_SRCDIR([bsp_specs])
+RTEMS_TOP(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.11.1])
+RTEMS_BSP_CONFIGURE
+
+RTEMS_PROG_CC_FOR_TARGET
+RTEMS_CANONICALIZE_TOOLS
+RTEMS_PROG_CCAS
+
+RTEMS_CHECK_NETWORKING
+AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
+
+RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[*],[])
+RTEMS_BSPOPTS_HELP([BSP_SMALL_MEMORY],[disable testsuite samples with high memory demands])
+
+RTEMS_BSPOPTS_SET([STM32F4_HSE_OSCILLATOR],[*],[8000000])
+RTEMS_BSPOPTS_HELP([STM32F4_HSE_OSCILLATOR],[HSE oscillator frequency in Hz])
+
+RTEMS_BSPOPTS_SET([STM32F4_SYSCLK],[*],[16000000])
+RTEMS_BSPOPTS_HELP([STM32F4_SYSCLK],[SYSCLK frequency in Hz])
+
+RTEMS_BSPOPTS_SET([STM32F4_HCLK],[*],[16000000])
+RTEMS_BSPOPTS_HELP([STM32F4_HCLK],[HCLK frequency in Hz])
+
+RTEMS_BSPOPTS_SET([STM32F4_PCLK1],[*],[16000000])
+RTEMS_BSPOPTS_HELP([STM32F4_PCLK1],[PCLK1 frequency in Hz])
+
+RTEMS_BSPOPTS_SET([STM32F4_PCLK2],[*],[16000000])
+RTEMS_BSPOPTS_HELP([STM32F4_PCLK2],[PCLK2 frequency in Hz])
+
+RTEMS_BSPOPTS_SET([STM32F4_USART_BAUD],[*],[115200])
+RTEMS_BSPOPTS_HELP([STM32F4_USART_BAUD],[baud for USARTs])
+
+RTEMS_BSPOPTS_SET([STM32F4_ENABLE_USART_1],[*],[1])
+RTEMS_BSPOPTS_HELP([STM32F4_ENABLE_USART_1],[enable USART 1])
+
+RTEMS_BSPOPTS_SET([STM32F4_ENABLE_USART_2],[*],[])
+RTEMS_BSPOPTS_HELP([STM32F4_ENABLE_USART_2],[enable USART 2])
+
+RTEMS_BSPOPTS_SET([STM32F4_ENABLE_USART_3],[*],[])
+RTEMS_BSPOPTS_HELP([STM32F4_ENABLE_USART_3],[enable USART 3])
+
+RTEMS_BSPOPTS_SET([STM32F4_ENABLE_UART_4],[*],[])
+RTEMS_BSPOPTS_HELP([STM32F4_ENABLE_UART_4],[enable UART 4])
+
+RTEMS_BSPOPTS_SET([STM32F4_ENABLE_UART_5],[*],[])
+RTEMS_BSPOPTS_HELP([STM32F4_ENABLE_UART_5],[enable UART 5])
+
+RTEMS_BSPOPTS_SET([STM32F4_ENABLE_USART_6],[*],[])
+RTEMS_BSPOPTS_HELP([STM32F4_ENABLE_USART_6],[enable USART 6])
+
+RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
+RTEMS_BSP_LINKCMDS
+
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT
Index: c/src/lib/libbsp/arm/stm32f4/console/console-config.c
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/console/console-config.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/console/console-config.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <rtems/bspIo.h>
+
+#include <libchip/serial.h>
+
+#include <bspopts.h>
+#include <bsp/irq.h>
+#include <bsp/usart.h>
+#include <bsp/stm32f4.h>
+
+console_tbl Console_Configuration_Ports [] = {
+  #ifdef STM32F4_ENABLE_USART_1
+    {
+      .sDeviceName = "/dev/ttyS0",
+      .deviceType = SERIAL_CUSTOM,
+      .pDeviceFns = &stm32f4_usart_fns,
+      .ulCtrlPort1 = (uint32_t) &STM32F4_USART_1,
+      .ulCtrlPort2 = 0,
+      .ulClock = STM32F4_USART_BAUD,
+      .ulIntVector = STM32F4_IRQ_USART1
+    },
+  #endif
+  #ifdef STM32F4_ENABLE_USART_2
+    {
+      .sDeviceName = "/dev/ttyS2",
+      .deviceType = SERIAL_CUSTOM,
+      .pDeviceFns = &stm32f4_usart_fns,
+      .ulCtrlPort1 = (uint32_t) &STM32F4_USART_2,
+      .ulCtrlPort2 = 1,
+      .ulClock = STM32F4_USART_BAUD,
+      .ulIntVector = STM32F4_IRQ_USART2
+    },
+  #endif
+  #ifdef STM32F4_ENABLE_USART_3
+    {
+      .sDeviceName = "/dev/ttyS2",
+      .deviceType = SERIAL_CUSTOM,
+      .pDeviceFns = &stm32f4_usart_fns,
+      .ulCtrlPort1 = (uint32_t) &STM32F4_USART_3,
+      .ulCtrlPort2 = 2,
+      .ulClock = STM32F4_USART_BAUD,
+      .ulIntVector = STM32F4_IRQ_USART3
+    },
+  #endif
+  #ifdef STM32F4_ENABLE_UART_4
+    {
+      .sDeviceName = "/dev/ttyS3",
+      .deviceType = SERIAL_CUSTOM,
+      .pDeviceFns = &stm32f4_usart_fns,
+      .ulCtrlPort1 = (uint32_t) &STM32F4_USART_4,
+      .ulCtrlPort2 = 3,
+      .ulClock = STM32F4_USART_BAUD,
+      .ulIntVector = STM32F4_IRQ_UART4
+    },
+  #endif
+  #ifdef STM32F4_ENABLE_UART_5
+    {
+      .sDeviceName = "/dev/ttyS4",
+      .deviceType = SERIAL_CUSTOM,
+      .pDeviceFns = &stm32f4_usart_fns,
+      .ulCtrlPort1 = (uint32_t) &STM32F4_USART_5,
+      .ulCtrlPort2 = 4,
+      .ulClock = STM32F4_USART_BAUD,
+      .ulIntVector = STM32F4_IRQ_UART5
+    },
+  #endif
+  #ifdef STM32F4_ENABLE_USART_6
+    {
+      .sDeviceName = "/dev/ttyS5",
+      .deviceType = SERIAL_CUSTOM,
+      .pDeviceFns = &stm32f4_usart_fns,
+      .ulCtrlPort1 = (uint32_t) &STM32F4_USART_6,
+      .ulCtrlPort2 = 5,
+      .ulClock = STM32F4_USART_BAUD,
+      .ulIntVector = STM32F4_IRQ_USART6
+    },
+  #endif
+};
+
+#define PORT_COUNT \
+  (sizeof(Console_Configuration_Ports) \
+    / sizeof(Console_Configuration_Ports [0]))
+
+unsigned long Console_Configuration_Count = PORT_COUNT;
+
+static void output_char(char c)
+{
+  const console_fns *con =
+    Console_Configuration_Ports [Console_Port_Minor].pDeviceFns;
+  
+  if (c == '\n') {
+    con->deviceWritePolled((int) Console_Port_Minor, '\r');
+  }
+  con->deviceWritePolled((int) Console_Port_Minor, c);
+}
+
+BSP_output_char_function_type BSP_output_char = output_char;
+
+BSP_polling_getchar_function_type BSP_poll_char = NULL;
Index: c/src/lib/libbsp/arm/stm32f4/console/usart.c
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/console/usart.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/console/usart.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <libchip/sersupp.h>
+
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/usart.h>
+#include <bsp/stm32f4.h>
+
+static volatile stm32f4_usart *usart_get_regs(const console_tbl *ct)
+{
+  return (stm32f4_usart *) ct->ulCtrlPort1;
+}
+
+#if 0
+static rtems_vector_number usart_get_irq_number(const console_tbl *ct)
+{
+  return ct->ulIntVector;
+}
+#endif
+
+static const uint8_t usart_pclk_index [] = { 1, 0, 0, 0, 0, 1 };
+
+static const uint32_t usart_pclk_by_index [] = {
+  STM32F4_PCLK1,
+  STM32F4_PCLK2
+};
+
+static uint32_t usart_get_pclk(const console_tbl *ct)
+{
+  return usart_pclk_by_index [usart_pclk_index [ct->ulCtrlPort2]];
+}
+
+static uint32_t usart_get_baud(const console_tbl *ct)
+{
+  return ct->ulClock;
+}
+
+/*
+ * a = 8 * (2 - CR1[OVER8])
+ *
+ * usartdiv = div_mantissa + div_fraction / a
+ *
+ * baud = pclk / (a * usartdiv)
+ *
+ * usartdiv = pclk / (a * baud)
+ *
+ * Calculation in integer arithmetic:
+ *
+ * 1. div_mantissa = pclk / (a * baud)
+ *
+ * 2. div_fraction = pclk / (baud - a * div_mantissa)
+ */
+static uint32_t usart_get_bbr(
+  volatile stm32f4_usart *usart,
+  uint32_t pclk,
+  uint32_t baud
+)
+{
+  uint32_t a = 8 * (2 - ((usart->cr1 & STM32F4_USART_CR1_OVER8) != 0));
+  uint32_t div_mantissa_low = pclk / (a * baud);
+  uint32_t div_fraction_low = pclk / (baud - a * div_mantissa_low);
+  uint32_t div_mantissa_high;
+  uint32_t div_fraction_high;
+  uint32_t high_err;
+  uint32_t low_err;
+  uint32_t div_mantissa;
+  uint32_t div_fraction;
+
+  if (div_fraction_low < a - 1) {
+    div_mantissa_high = div_fraction_low;
+    div_fraction_high = div_fraction_low + 1;
+  } else {
+    div_mantissa_high = div_fraction_low + 1;
+    div_fraction_high = 0;
+  }
+
+  high_err = pclk - baud * (a * div_mantissa_high + div_fraction_high);
+  low_err = baud * (a * div_mantissa_low + div_fraction_low) - pclk;
+
+  if (low_err < high_err) {
+    div_mantissa = div_mantissa_low;
+    div_fraction = div_fraction_low;
+  } else {
+    div_mantissa = div_mantissa_high;
+    div_fraction = div_fraction_high;
+  }
+
+  return STM32F4_USART_BBR_DIV_MANTISSA(div_mantissa)
+    | STM32F4_USART_BBR_DIV_FRACTION(div_fraction);
+}
+
+static void usart_initialize(int minor)
+{
+  const console_tbl *ct = Console_Port_Tbl [minor];
+  volatile stm32f4_usart *usart = usart_get_regs(ct);
+  uint32_t pclk = usart_get_pclk(ct);
+  uint32_t baud = usart_get_baud(ct);
+  volatile stm32f4_rcc *rcc = &STM32F4_RCC;
+
+  rcc->apb2enr |= STM32F4_RCC_APB2ENR_USART1_EN;
+
+  usart->cr1 = 0;
+  usart->cr2 = 0;
+  usart->cr3 = 0;
+  usart->bbr = usart_get_bbr(usart, pclk, baud);
+  usart->cr1 = STM32F4_USART_CR1_UE
+    | STM32F4_USART_CR1_TE
+    | STM32F4_USART_CR1_RE;
+}
+
+static int usart_first_open(int major, int minor, void *arg)
+{
+  rtems_libio_open_close_args_t *oc = (rtems_libio_open_close_args_t *) arg;
+  struct rtems_termios_tty *tty = (struct rtems_termios_tty *) oc->iop->data1;
+  const console_tbl *ct = Console_Port_Tbl [minor];
+  console_data *cd = &Console_Port_Data [minor];
+
+  cd->termios_data = tty;
+  rtems_termios_set_initial_baud(tty, ct->ulClock);
+
+  return 0;
+}
+
+static int usart_last_close(int major, int minor, void *arg)
+{
+  return 0;
+}
+
+static int usart_read_polled(int minor)
+{
+  const console_tbl *ct = Console_Port_Tbl [minor];
+  volatile stm32f4_usart *usart = usart_get_regs(ct);
+
+  if ((usart->sr & STM32F4_USART_SR_RXNE) != 0) {
+    return STM32F4_USART_DR_GET(usart->dr);
+  } else {
+    return -1;
+  }
+}
+
+static void usart_write_polled(int minor, char c)
+{
+  const console_tbl *ct = Console_Port_Tbl [minor];
+  volatile stm32f4_usart *usart = usart_get_regs(ct);
+
+  while ((usart->sr & STM32F4_USART_SR_TXE) == 0) {
+    /* Wait */
+  }
+
+  usart->dr = STM32F4_USART_DR(c);
+}
+
+static ssize_t usart_write_support_polled(
+  int minor,
+  const char *s,
+  size_t n
+)
+{
+  ssize_t i = 0;
+
+  for (i = 0; i < n; ++i) {
+    usart_write_polled(minor, s [i]);
+  }
+
+  return n;
+}
+
+static int usart_set_attributes(int minor, const struct termios *term)
+{
+  return -1;
+}
+
+console_fns stm32f4_usart_fns = {
+  .deviceProbe = libchip_serial_default_probe,
+  .deviceFirstOpen = usart_first_open,
+  .deviceLastClose = usart_last_close,
+  .deviceRead = usart_read_polled,
+  .deviceWrite = usart_write_support_polled,
+  .deviceInitialize = usart_initialize,
+  .deviceWritePolled = usart_write_polled,
+  .deviceSetAttributes = usart_set_attributes,
+  .deviceOutputUsesInterrupts = false
+};
Index: c/src/lib/libbsp/arm/stm32f4/include/bsp.h
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/include/bsp.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/include/bsp.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_STM32F4_BSP_H
+#define LIBBSP_ARM_STM32F4_BSP_H
+
+#include <bspopts.h>
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+#define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT (13 << 4)
+
+#define BSP_ARMV7M_SYSTICK_PRIORITY (14 << 4)
+
+#define BSP_ARMV7M_SYSTICK_FREQUENCY STM32F4_HCLK
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_STM32F4_BSP_H */
Index: c/src/lib/libbsp/arm/stm32f4/include/irq.h
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/include/irq.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/include/irq.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_STM32F4_IRQ_H
+#define LIBBSP_ARM_STM32F4_IRQ_H
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+#define STM32F4_IRQ_WWDG 0
+#define STM32F4_IRQ_PVD 1
+#define STM32F4_IRQ_TAMP_STAMP 2
+#define STM32F4_IRQ_RTC_WKUP 3
+#define STM32F4_IRQ_FLASH 4
+#define STM32F4_IRQ_RCC 5
+#define STM32F4_IRQ_EXTI0 6
+#define STM32F4_IRQ_EXTI1 7
+#define STM32F4_IRQ_EXTI2 8
+#define STM32F4_IRQ_EXTI3 9
+#define STM32F4_IRQ_EXTI4 10
+#define STM32F4_IRQ_DMA1_STREAM0 11
+#define STM32F4_IRQ_DMA1_STREAM1 12
+#define STM32F4_IRQ_DMA1_STREAM2 13
+#define STM32F4_IRQ_DMA1_STREAM3 14
+#define STM32F4_IRQ_DMA1_STREAM4 15
+#define STM32F4_IRQ_DMA1_STREAM5 16
+#define STM32F4_IRQ_DMA1_STREAM6 17
+#define STM32F4_IRQ_ADC 18
+#define STM32F4_IRQ_CAN1_TX 19
+#define STM32F4_IRQ_CAN1_RX0 20
+#define STM32F4_IRQ_CAN1_RX1 21
+#define STM32F4_IRQ_CAN1_SCE 22
+#define STM32F4_IRQ_EXTI9_5 23
+#define STM32F4_IRQ_TIM1_BRK_TIM9 24
+#define STM32F4_IRQ_TIM1_UP_TIM10 25
+#define STM32F4_IRQ_TIM1_TRG_COM_TIM11 26
+#define STM32F4_IRQ_TIM1_CC 27
+#define STM32F4_IRQ_TIM2 28
+#define STM32F4_IRQ_TIM3 29
+#define STM32F4_IRQ_TIM4 30
+#define STM32F4_IRQ_I2C1_EV 31
+#define STM32F4_IRQ_I2C1_ER 32
+#define STM32F4_IRQ_I2C2_EV 33
+#define STM32F4_IRQ_I2C2_ER 34
+#define STM32F4_IRQ_SPI1 35
+#define STM32F4_IRQ_SPI2 36
+#define STM32F4_IRQ_USART1 37
+#define STM32F4_IRQ_USART2 38
+#define STM32F4_IRQ_USART3 39
+#define STM32F4_IRQ_EXTI15_10 40
+#define STM32F4_IRQ_RTC_ALARM 41
+#define STM32F4_IRQ_OTG_FS_WKUP 42
+#define STM32F4_IRQ_TIM8_BRK_TIM12 43
+#define STM32F4_IRQ_TIM8_UP_TIM13 44
+#define STM32F4_IRQ_TIM8_TRG_COM_TIM14 45
+#define STM32F4_IRQ_TIM8_CC 46
+#define STM32F4_IRQ_DMA1_STREAM7 47
+#define STM32F4_IRQ_FSMC 48
+#define STM32F4_IRQ_SDIO 49
+#define STM32F4_IRQ_TIM5 50
+#define STM32F4_IRQ_SPI3 51
+#define STM32F4_IRQ_UART4 52
+#define STM32F4_IRQ_UART5 53
+#define STM32F4_IRQ_TIM6_DAC 54
+#define STM32F4_IRQ_TIM7 55
+#define STM32F4_IRQ_DMA2_STREAM0 56
+#define STM32F4_IRQ_DMA2_STREAM1 57
+#define STM32F4_IRQ_DMA2_STREAM2 58
+#define STM32F4_IRQ_DMA2_STREAM3 59
+#define STM32F4_IRQ_DMA2_STREAM4 60
+#define STM32F4_IRQ_ETH 61
+#define STM32F4_IRQ_ETH_WKUP 62
+#define STM32F4_IRQ_CAN2_TX 63
+#define STM32F4_IRQ_CAN2_RX0 64
+#define STM32F4_IRQ_CAN2_RX1 65
+#define STM32F4_IRQ_CAN2_SCE 66
+#define STM32F4_IRQ_OTG_FS 67
+#define STM32F4_IRQ_DMA2_STREAM5 68
+#define STM32F4_IRQ_DMA2_STREAM6 69
+#define STM32F4_IRQ_DMA2_STREAM7 70
+#define STM32F4_IRQ_USART6 71
+#define STM32F4_IRQ_I2C3_EV 72
+#define STM32F4_IRQ_I2C3_ER 73
+#define STM32F4_IRQ_OTG_HS_EP1_OUT 74
+#define STM32F4_IRQ_OTG_HS_EP1_IN 75
+#define STM32F4_IRQ_OTG_HS_WKUP 76
+#define STM32F4_IRQ_OTG_HS 77
+#define STM32F4_IRQ_DCMI 78
+#define STM32F4_IRQ_CRYP 79
+#define STM32F4_IRQ_HASH_RNG 80
+#define STM32F4_IRQ_FPU 81
+
+#define STM32F4_IRQ_PRIORITY_VALUE_MIN 0
+#define STM32F4_IRQ_PRIORITY_VALUE_MAX 15
+#define STM32F4_IRQ_PRIORITY_COUNT (STM32F4_IRQ_PRIORITY_VALUE_MAX + 1)
+#define STM32F4_IRQ_PRIORITY_HIGHEST STM32F4_IRQ_PRIORITY_VALUE_MIN
+#define STM32F4_IRQ_PRIORITY_LOWEST STM32F4_IRQ_PRIORITY_VALUE_MAX
+
+#define BSP_INTERRUPT_VECTOR_MIN 0
+#define BSP_INTERRUPT_VECTOR_MAX 81
+
+#endif /* LIBBSP_ARM_STM32F4_IRQ_H */
Index: c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_STM32F4_STM32F4_H
+#define LIBBSP_ARM_STM32F4_STM32F4_H
+
+#include <bsp/utility.h>
+
+#define STM32F4_BASE 0x00
+
+typedef struct {
+	uint32_t reserved_00 [16];
+	uint32_t apb1enr;
+#define STM32F4_RCC_APB1ENR_DAC_EN BSP_BIT32(29)
+#define STM32F4_RCC_APB1ENR_PWR_EN BSP_BIT32(28)
+#define STM32F4_RCC_APB1ENR_CAN2_EN BSP_BIT32(26)
+#define STM32F4_RCC_APB1ENR_CAN1_EN BSP_BIT32(25)
+#define STM32F4_RCC_APB1ENR_I2C3_EN BSP_BIT32(23)
+#define STM32F4_RCC_APB1ENR_I2C2_EN BSP_BIT32(22)
+#define STM32F4_RCC_APB1ENR_I2C1_EN BSP_BIT32(21)
+#define STM32F4_RCC_APB1ENR_UART5_EN BSP_BIT32(20)
+#define STM32F4_RCC_APB1ENR_UART4_EN BSP_BIT32(19)
+#define STM32F4_RCC_APB1ENR_USART3_EN BSP_BIT32(18)
+#define STM32F4_RCC_APB1ENR_USART2_EN BSP_BIT32(17)
+#define STM32F4_RCC_APB1ENR_SPI3_EN BSP_BIT32(15)
+#define STM32F4_RCC_APB1ENR_SPI2_EN BSP_BIT32(14)
+#define STM32F4_RCC_APB1ENR_WWDG_EN BSP_BIT32(11)
+#define STM32F4_RCC_APB1ENR_TIM14_EN BSP_BIT32(8)
+#define STM32F4_RCC_APB1ENR_TIM13_EN BSP_BIT32(7)
+#define STM32F4_RCC_APB1ENR_TIM12_EN BSP_BIT32(6)
+#define STM32F4_RCC_APB1ENR_TIM7_EN BSP_BIT32(5)
+#define STM32F4_RCC_APB1ENR_TIM6_EN BSP_BIT32(4)
+#define STM32F4_RCC_APB1ENR_TIM5_EN BSP_BIT32(3)
+#define STM32F4_RCC_APB1ENR_TIM4_EN BSP_BIT32(2)
+#define STM32F4_RCC_APB1ENR_TIM3_EN BSP_BIT32(1)
+#define STM32F4_RCC_APB1ENR_TIM2_EN BSP_BIT32(0)
+	uint32_t apb2enr;
+#define STM32F4_RCC_APB2ENR_TIM11 BSP_BIT32(18)
+#define STM32F4_RCC_APB2ENR_TIM10_EN BSP_BIT32(17)
+#define STM32F4_RCC_APB2ENR_TIM9_EN BSP_BIT32(16)
+#define STM32F4_RCC_APB2ENR_SYSCFG_EN BSP_BIT32(14)
+#define STM32F4_RCC_APB2ENR_SPI1_EN BSP_BIT32(12)
+#define STM32F4_RCC_APB2ENR_SDIO_EN BSP_BIT32(11)
+#define STM32F4_RCC_APB2ENR_ADC3_EN BSP_BIT32(10)
+#define STM32F4_RCC_APB2ENR_ADC2_EN BSP_BIT32(9)
+#define STM32F4_RCC_APB2ENR_ADC1_EN BSP_BIT32(8)
+#define STM32F4_RCC_APB2ENR_USART6_EN BSP_BIT32(5)
+#define STM32F4_RCC_APB2ENR_USART1_EN BSP_BIT32(4)
+#define STM32F4_RCC_APB2ENR_TIM8_EN BSP_BIT32(1)
+#define STM32F4_RCC_APB2ENR_TIM1_EN BSP_BIT32(0)
+} stm32f4_rcc;
+
+#define STM32F4_RCC (*(volatile stm32f4_rcc *) (STM32F4_BASE + 0x40023800))
+
+typedef struct {
+	uint32_t sr;
+#define STM32F4_USART_SR_CTS BSP_BIT32(9)
+#define STM32F4_USART_SR_LBD BSP_BIT32(8)
+#define STM32F4_USART_SR_TXE BSP_BIT32(7)
+#define STM32F4_USART_SR_TC BSP_BIT32(6)
+#define STM32F4_USART_SR_RXNE BSP_BIT32(5)
+#define STM32F4_USART_SR_IDLE BSP_BIT32(4)
+#define STM32F4_USART_SR_ORE BSP_BIT32(3)
+#define STM32F4_USART_SR_NF BSP_BIT32(2)
+#define STM32F4_USART_SR_FE BSP_BIT32(1)
+#define STM32F4_USART_SR_PE BSP_BIT32(0)
+	uint32_t dr;
+#define STM32F4_USART_DR(val) BSP_FLD32(val, 0, 7)
+#define STM32F4_USART_DR_GET(reg) BSP_FLD32GET(reg, 0, 7)
+#define STM32F4_USART_DR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
+	uint32_t bbr;
+#define STM32F4_USART_BBR_DIV_MANTISSA(val) BSP_FLD32(val, 4, 15)
+#define STM32F4_USART_BBR_DIV_MANTISSA_GET(reg) BSP_FLD32GET(reg, 4, 15)
+#define STM32F4_USART_BBR_DIV_MANTISSA_SET(reg, val) BSP_FLD32SET(reg, val, 4, 15)
+#define STM32F4_USART_BBR_DIV_FRACTION(val) BSP_FLD32(val, 0, 3)
+#define STM32F4_USART_BBR_DIV_FRACTION_GET(reg) BSP_FLD32GET(reg, 0, 3)
+#define STM32F4_USART_BBR_DIV_FRACTION_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
+	uint32_t cr1;
+#define STM32F4_USART_CR1_OVER8 BSP_BIT32(15)
+#define STM32F4_USART_CR1_UE BSP_BIT32(13)
+#define STM32F4_USART_CR1_M BSP_BIT32(12)
+#define STM32F4_USART_CR1_WAKE BSP_BIT32(11)
+#define STM32F4_USART_CR1_PCE BSP_BIT32(10)
+#define STM32F4_USART_CR1_PS BSP_BIT32(9)
+#define STM32F4_USART_CR1_PEIE BSP_BIT32(8)
+#define STM32F4_USART_CR1_TXEIE BSP_BIT32(7)
+#define STM32F4_USART_CR1_TCIE BSP_BIT32(6)
+#define STM32F4_USART_CR1_RXNEIE BSP_BIT32(5)
+#define STM32F4_USART_CR1_IDLEIE BSP_BIT32(4)
+#define STM32F4_USART_CR1_TE BSP_BIT32(3)
+#define STM32F4_USART_CR1_RE BSP_BIT32(2)
+#define STM32F4_USART_CR1_RWU BSP_BIT32(1)
+#define STM32F4_USART_CR1_SBK BSP_BIT32(0)
+	uint32_t cr2;
+#define STM32F4_USART_CR2_LINEN BSP_BIT32(14)
+#define STM32F4_USART_CR2_STOP(val) BSP_FLD32(val, 12, 13)
+#define STM32F4_USART_CR2_STOP_GET(reg) BSP_FLD32GET(reg, 12, 13)
+#define STM32F4_USART_CR2_STOP_SET(reg, val) BSP_FLD32SET(reg, val, 12, 13)
+#define STM32F4_USART_CR2_CLKEN BSP_BIT32(11)
+#define STM32F4_USART_CR2_CPOL BSP_BIT32(10)
+#define STM32F4_USART_CR2_CPHA BSP_BIT32(9)
+#define STM32F4_USART_CR2_LBCL BSP_BIT32(8)
+#define STM32F4_USART_CR2_LBDIE BSP_BIT32(6)
+#define STM32F4_USART_CR2_LBDL BSP_BIT32(5)
+#define STM32F4_USART_CR2_ADD(val) BSP_FLD32(val, 0, 3)
+#define STM32F4_USART_CR2_ADD_GET(reg) BSP_FLD32GET(reg, 0, 3)
+#define STM32F4_USART_CR2_ADD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
+	uint32_t cr3;
+#define STM32F4_USART_CR3_ONEBIT BSP_BIT32(11)
+#define STM32F4_USART_CR3_CTSIE BSP_BIT32(10)
+#define STM32F4_USART_CR3_CTSE BSP_BIT32(9)
+#define STM32F4_USART_CR3_RTSE BSP_BIT32(8)
+#define STM32F4_USART_CR3_DMAT BSP_BIT32(7)
+#define STM32F4_USART_CR3_DMAR BSP_BIT32(6)
+#define STM32F4_USART_CR3_SCEN BSP_BIT32(5)
+#define STM32F4_USART_CR3_NACK BSP_BIT32(4)
+#define STM32F4_USART_CR3_HDSEL BSP_BIT32(3)
+#define STM32F4_USART_CR3_IRLP BSP_BIT32(2)
+#define STM32F4_USART_CR3_IREN BSP_BIT32(1)
+#define STM32F4_USART_CR3_EIE BSP_BIT32(0)
+	uint32_t gtpr;
+#define STM32F4_USART_GTPR_GT(val) BSP_FLD32(val, 8, 15)
+#define STM32F4_USART_GTPR_GT_GET(reg) BSP_FLD32GET(reg, 8, 15)
+#define STM32F4_USART_GTPR_GT_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
+#define STM32F4_USART_GTPR_PSC(val) BSP_FLD32(val, 0, 7)
+#define STM32F4_USART_GTPR_PSC_GET(reg) BSP_FLD32GET(reg, 0, 7)
+#define STM32F4_USART_GTPR_PSC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
+} stm32f4_usart;
+
+#define STM32F4_USART_1 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40011000))
+#define STM32F4_USART_2 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40004400))
+#define STM32F4_USART_3 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40004800))
+#define STM32F4_USART_4 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40004c00))
+#define STM32F4_USART_5 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40005000))
+#define STM32F4_USART_6 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40011400))
+
+typedef struct {
+	uint32_t reserved_00 [268439808];
+	stm32f4_usart usart_2;
+	uint32_t reserved_4000441c [249];
+	stm32f4_usart usart_3;
+	uint32_t reserved_4000481c [249];
+	stm32f4_usart usart_4;
+	uint32_t reserved_40004c1c [249];
+	stm32f4_usart usart_5;
+	uint32_t reserved_4000501c [12281];
+	stm32f4_usart usart_1;
+	uint32_t reserved_4001101c [249];
+	stm32f4_usart usart_6;
+	uint32_t reserved_4001141c [18681];
+	stm32f4_rcc rcc;
+} stm32f4;
+
+#define STM32F4 (*(volatile stm32f4 *) (STM32F4_BASE))
+
+#endif /* LIBBSP_ARM_STM32F4_STM32F4_H */
Index: c/src/lib/libbsp/arm/stm32f4/include/usart.h
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/include/usart.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/include/usart.h	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_STM32F4_USART_H
+#define LIBBSP_ARM_STM32F4_USART_H
+
+#include <libchip/serial.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+extern console_fns stm32f4_usart_fns;
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_STM32F4_USART_H */
Index: c/src/lib/libbsp/arm/stm32f4/make/custom/stm32f4.cfg
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/make/custom/stm32f4.cfg	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/make/custom/stm32f4.cfg	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,7 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = arm
+
+CPU_CFLAGS = -march=armv7-m -mthumb
+
+CFLAGS_OPTIMIZE_V = -O2 -g
Index: c/src/lib/libbsp/arm/stm32f4/preinstall.am
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/preinstall.am	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/preinstall.am	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,107 @@
+## Automatically generated by ampolish3 - Do not edit
+
+if AMPOLISH3
+$(srcdir)/preinstall.am: Makefile.am
+	$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
+endif
+
+PREINSTALL_DIRS =
+DISTCLEANFILES += $(PREINSTALL_DIRS)
+
+all-local: $(TMPINSTALL_FILES)
+
+TMPINSTALL_FILES =
+CLEANFILES = $(TMPINSTALL_FILES)
+
+all-am: $(PREINSTALL_FILES)
+
+PREINSTALL_FILES =
+CLEANFILES += $(PREINSTALL_FILES)
+
+$(PROJECT_LIB)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_LIB)
+	@: > $(PROJECT_LIB)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)
+	@: > $(PROJECT_INCLUDE)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
+
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+
+$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
+
+$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h
+
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
+
+$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
+
+$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h
+
+$(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tod.h
+
+$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h
+
+$(PROJECT_INCLUDE)/bsp/armv7m-irq.h: ../shared/armv7m/include/armv7m-irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/armv7m-irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/armv7m-irq.h
+
+$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
+
+$(PROJECT_INCLUDE)/bsp/usart.h: include/usart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/usart.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/usart.h
+
+$(PROJECT_INCLUDE)/bsp/stm32f4.h: include/stm32f4.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stm32f4.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stm32f4.h
+
Index: c/src/lib/libbsp/arm/stm32f4/startup/bspreset.c
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/startup/bspreset.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/startup/bspreset.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <rtems.h>
+
+#include <bsp/bootcard.h>
+
+void bsp_reset(void)
+{
+  rtems_interrupt_level level;
+
+  rtems_interrupt_disable(level);
+
+  while (1);
+}
Index: c/src/lib/libbsp/arm/stm32f4/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/startup/bspstart.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/startup/bspstart.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/irq-generic.h>
+#include <bsp/irq.h>
+#include <bsp/linker-symbols.h>
+
+void bsp_start(void)
+{
+  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
+    _CPU_Fatal_halt(0xe);
+  }
+}
Index: c/src/lib/libbsp/arm/stm32f4/startup/bspstarthook.c
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/startup/bspstarthook.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/startup/bspstarthook.c	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/start.h>
+
+void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
+{
+  /* Do nothing */
+}
+
+void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
+{
+  bsp_start_copy_sections();
+
+  /* At this point we can use objects outside the .start section */
+}
Index: c/src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4	(revision e230fb44a63a27dae572e379094a6e499165f776)
+++ c/src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4	(revision e230fb44a63a27dae572e379094a6e499165f776)
@@ -0,0 +1,23 @@
+MEMORY {
+	RAM_INT : ORIGIN = 0x20000000, LENGTH = 128k
+	ROM_INT : ORIGIN = 0x00000000, LENGTH = 1M
+	NIRVANA : ORIGIN = 0, LENGTH = 0
+}
+
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_INT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_INT);
+REGION_ALIAS ("REGION_WORK", RAM_INT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
+INCLUDE linkcmds.armv7
