Ignore:
Timestamp:
May 22, 2001, 10:59:42 PM (19 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
a355e3ea
Parents:
baf22b9
Message:

2001-05-22 Greg Menke <gregory.menke@…>

  • rtems/score/cpu.h: Add the interrupt stack structure and enhance the context initialization to account for floating point tasks.
  • rtems/score/mips.h: Added the routines mips_set_cause(), mips_get_fcr31(), and mips_set_fcr31().
  • Assisted in design and debug by Joel Sherrill <joel@…>.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/mips/rtems/score/mips.h

    rbaf22b9 re2040ba  
    9191  } while (0)
    9292
     93
     94
     95
     96
     97#define mips_get_cause( _x ) \
     98  do { \
     99    asm volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
     100  } while (0)
     101
     102
     103#define mips_set_cause( _x ) \
     104  do { \
     105    register unsigned int __x = (_x); \
     106    asm volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
     107  } while (0)
     108
     109
     110
     111
     112
     113#define mips_get_fcr31( _x ) \
     114  do { \
     115    asm volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
     116  } while(0)
     117
     118
     119#define mips_set_fcr31( _x ) \
     120  do { \
     121    register unsigned int __x = (_x); \
     122    asm volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
     123  } while(0)
     124
     125
     126
     127
     128
    93129/*
    94130 *  Manipulate interrupt mask
Note: See TracChangeset for help on using the changeset viewer.