Changeset e160e41 in rtems


Ignore:
Timestamp:
Oct 9, 2014, 8:15:55 PM (5 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.11, master
Children:
ef4c461
Parents:
cc7c922
git-author:
Joel Sherrill <joel.sherrill@…> (10/09/14 20:15:55)
git-committer:
Joel Sherrill <joel.sherrill@…> (10/10/14 15:17:17)
Message:

powerpc/ep1a: Remove if 0 sections

There may be useful nuggets for debug and alternate configurations
in this code. There may be methods directly called by the application
which are beyond normal APIs. We have no way of knowing this based
on the comments in these files. There were no public prototypes
so the routines and code in question should have be unused private
methods.

These will always be in the source code control system as a deletion.
If some of the code is needed, justify it and provide a patch to restore
it along with a prototype in a public place if needed and a better name.

Location:
c/src/lib/libbsp/powerpc/ep1a
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/ep1a/console/m68360.h

    rcc7c922 re160e41  
    976976int mc68360_scc_create_chip( PPMCQ1BoardData BoardData, uint8_t int_vector );
    977977
    978 #if 0
    979 extern volatile m360_t *m360;
    980 #endif
    981 
    982978#endif /* __MC68360_h */
  • c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c

    rcc7c922 re160e41  
    2626#include <string.h>
    2727
    28 #if 0
    29 #define DEBUG_360
    30 #endif
     28/* #define DEBUG_360 */
    3129
    3230#if 1   /* XXX */
     
    3634int mc68360_length_array[ MC68360_LENGTH_SIZE ];
    3735int mc68360_length_count=0;
    38 
    39 #if 0
    40 /*
    41  * This is a debug method which is not currently used.
    42  */
    43 static void mc68360_Show_length_array(void)
    44 {
    45   int i;
    46   for (i=0; i<MC68360_LENGTH_SIZE; i++)
    47     printf(" %d", mc68360_length_array[i] );
    48   printf("\n\n");
    49 }
    50 #endif
    5136#endif
    5237
     
    5742#define mc68360_scc_Is_422( _minor ) \
    5843  (Console_Port_Tbl[minor]->sDeviceName[7] == '4' )
    59 
    60 #if 0
    61 /*
    62  * This method is included for completeness but not currently used.
    63  */
    64 static uint8_t scc_read8(
    65   const char       *name,
    66   volatile uint8_t *address
    67 )
    68 {
    69   uint8_t value;
    70 
    71 #ifdef DEBUG_360
    72   printk( "RD8 %s 0x%08x ", name, address );
    73 #endif
    74   value = *address;
    75 #ifdef DEBUG_360
    76   printk( "0x%02x\n", value );
    77 #endif
    78 
    79   return value;
    80 }
    81 #endif
    8244
    8345static void scc_write8(
     
    153115}
    154116
    155 #if 0
    156 /*
    157  * This is a debug method which is not currently used.
    158  */
    159 static void mc68360_sccShow_Regs(int minor)
    160 {
    161   M68360_serial_ports_t  ptr;
    162   ptr   = Console_Port_Tbl[minor]->pDeviceParams;
    163 
    164   printk( "scce 0x%08x", &ptr->pSCCR->scce );
    165   printk( " 0x%04x\n", ptr->pSCCR->scce );
    166 
    167 }
    168 #endif
    169 
    170117#define TX_BUFFER_ADDRESS( _ptr ) \
    171118  ((char *)ptr->txBuf - (char *)ptr->chip->board_data->baseaddr)
     
    195142mc68360_sccBRGC(int baud, int m360_clock_rate)
    196143{
    197    int data;
    198 #if 0
    199    int divisor;
    200    int div16;
    201 
    202    div16 = 0;
    203    divisor = ((m360_clock_rate / 16) + (baud / 2)) / baud;
    204    if (divisor > 4096)
    205    {
    206       div16   = 1;
    207       divisor = (divisor + 8) / 16;
    208    }
    209    return(M360_BRG_EN | M360_BRG_EXTC_BRGCLK |
    210           ((divisor - 1) << 1) | div16);
    211 #endif
     144  int data;
    212145
    213146  /*
  • c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c

    rcc7c922 re160e41  
    410410board_memory_map *ptr_mem_map = &mem_map;
    411411
    412 #if 0
    413 struct _console_global_data {
    414         console_log *log;
    415         int vacuum_sent;
    416         int lines;
    417         int cols;
    418         int orig_x;
    419         int orig_y;
    420         u_char shfts, ctls, alts, caps;
    421 } console_global_data = {NULL, 0, 25, 80, 0, 24, 0, 0, 0, 0};
    422 
    423 typedef struct console_io {
    424         void    (*putc) (const u_char);
    425         int     (*getc) (void);
    426         int     (*tstc) (void);
    427 }console_io;
    428 
    429 extern console_io* curIo;
    430 
    431 void debug_putc(const u_char c)
    432 {
    433   curIo->putc(c);
    434 }
    435 
    436 /* const char arg to be compatible with BSP_output_char decl. */
    437 void
    438 debug_putc_onlcr(const char c)
    439 {
    440         if ('\n'==c)
    441                 debug_putc('\r');
    442         debug_putc(c);
    443 }
    444 
    445 int debug_getc(void)
    446 {
    447   return curIo->getc();
    448 }
    449 
    450 int debug_tstc(void)
    451 {
    452   return curIo->tstc();
    453 }
    454 
    455 #define vidmem ((__io_ptr)(ptr_mem_map->isa_mem_base+0xb8000))
    456 
    457 void vacuum_putc(u_char c) {
    458         console_global_data.vacuum_sent++;
    459 }
    460 
    461 int vacuum_getc(void) {
    462         return -1;
    463 }
    464 
    465 int vacuum_tstc(void) {
    466         return 0;
    467 }
    468 
    469 /*
    470  * COM1 NS16550 support
    471  */
    472 
    473 #define rbr 0
    474 #define ier 1
    475 #define fcr 2
    476 #define lcr 3
    477 #define mcr 4
    478 #define lsr 5
    479 #define msr 6
    480 #define scr 7
    481 #define thr rbr
    482 #define iir fcr
    483 #define dll rbr
    484 #define dlm ier
    485 
    486 #define LSR_DR   0x01  /* Data ready */
    487 #define LSR_OE   0x02  /* Overrun */
    488 #define LSR_PE   0x04  /* Parity error */
    489 #define LSR_FE   0x08  /* Framing error */
    490 #define LSR_BI   0x10  /* Break */
    491 #define LSR_THRE 0x20  /* Xmit holding register empty */
    492 #define LSR_TEMT 0x40  /* Xmitter empty */
    493 #define LSR_ERR  0x80  /* Error */
    494 
    495 
    496 #ifdef STATIC_LOG_ALLOC
    497 static int global_index = 0;
    498 
    499 static void *__palloc(int s)
    500 {
    501   if (global_index ==( STATIC_LOG_DATA_PAGE_NB - 1) ) return (void*) 0;
    502   return  (void*) &(log_page_pool [PAGE_SIZE * global_index++]);
    503 }
    504 
    505 static void pfree(void* p)
    506 {
    507   --global_index;
    508 }
    509 #endif
    510 
    511 
    512412void log_putc(const u_char c) {
    513413        console_log *l;
  • c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c

    rcc7c922 re160e41  
    5353/* forward declarations */
    5454
    55 #if 0
    56 /* local Qspan II serial eeprom table */
    57 static unsigned char rsPMCQ1eeprom[] =
    58     {
    59     0x00,       /* Byte 0 - PCI_SID */
    60     0x00,       /* Byte 1 - PCI_SID */
    61     0x00,       /* Byte 2 - PCI_SID */
    62     0x00,       /* Byte 3 - PCI_SID */
    63     0x00,       /* Byte 4 - PBROM_CTL */
    64     0x00,       /* Byte 5 - PBROM_CTL */
    65     0x00,       /* Byte 6 - PBROM_CTL */
    66     0x2C,       /* Byte 7 - PBTI0_CTL */
    67     0xB0,       /* Byte 8 - PBTI1_CTL */
    68     0x00,       /* Byte 9 - QBSI0_AT */
    69     0x00,       /* Byte 10 - QBSI0_AT */
    70     0x02,       /* Byte 11 - QBSI0_AT */
    71     0x00,       /* Byte 12 - PCI_ID */
    72     0x07,       /* Byte 13 - PCI_ID */
    73     0x11,       /* Byte 14 - PCI_ID */
    74     0xB5,       /* Byte 15 - PCI_ID */
    75     0x06,       /* Byte 16 - PCI_CLASS */
    76     0x80,       /* Byte 17 - PCI_CLASS */
    77     0x00,       /* Byte 18 - PCI_CLASS */
    78     0x00,       /* Byte 19 - PCI_MISC1 */
    79     0x00,       /* Byte 20 - PCI_MISC1 */
    80     0xC0,       /* Byte 21 - PCI_PMC */
    81     0x00        /* Byte 22 - PCI_BST */
    82 };
    83 #endif
    84 
    8555static void MsDelay(void)
    8656{
     
    9969  out_be32((unsigned int *)addr, data );
    10070}
    101 
    102 #if 0
    103 static int read32( int addr){
    104   return in_be32((unsigned int *)addr);
    105 }
    106 #endif
    107 
    10871
    10972static void rsPMCQ1_scc_nullFunc(void) {}
     
    212175  return (status);
    213176}
    214 
    215 #if 0
    216 /* This method is apparently unused. --joel 9 Oct 2014 */
    217 /*******************************************************************************
    218 *
    219 * rsPMCQ1MaIntDisconnect - disconnect a MiniAce interrupt routine
    220 *
    221 * This routine is called to disconnect a MiniAce interrupt handler
    222 * from a PMCQ1. It also masks the interrupt source on the PMCQ1.
    223 *
    224 * RETURNS: OK if PMCQ1 found, ERROR if not.
    225 */
    226 static unsigned int rsPMCQ1MaIntDisconnect(
    227     unsigned long       busNo,  /* Pci Bus number of PMCQ1 */
    228     unsigned long       slotNo, /* Pci Slot number of PMCQ1 */
    229     unsigned long       funcNo  /* Pci Function number of PMCQ1 */
    230 )
    231 {
    232   PPMCQ1BoardData boardData;
    233   unsigned int status = RTEMS_IO_ERROR;
    234 
    235   for (boardData = pmcq1BoardData; boardData; boardData = boardData->pNext) {
    236     if ((boardData->busNo == busNo) && (boardData->slotNo == slotNo) &&
    237         (boardData->funcNo == funcNo))
    238     {
    239       boardData->maInt = NULL;
    240       *(unsigned long *)(boardData->baseaddr + PMCQ1_INT_MASK) |= PMCQ1_INT_MASK_MA;
    241       status = RTEMS_SUCCESSFUL;
    242       break;
    243     }
    244   }
    245 
    246   return (status);
    247 }
    248 #endif
    249177
    250178/*******************************************************************************
     
    281209  return (status);
    282210}
    283 
    284 #if 0
    285 /* This method is apparently unused. --joel 9 Oct 2014 */
    286 /*******************************************************************************
    287 *
    288 * rsPMCQ1QuiccIntDisconnect - disconnect a Quicc interrupt routine
    289 *
    290 * This routine is called to disconnect a Quicc interrupt handler
    291 * from a PMCQ1. It also masks the interrupt source on the PMCQ1.
    292 *
    293 * RETURNS: OK if PMCQ1 found, ERROR if not.
    294 */
    295 static unsigned int rsPMCQ1QuiccIntDisconnect(
    296     unsigned long       busNo,  /* Pci Bus number of PMCQ1 */
    297     unsigned long       slotNo, /* Pci Slot number of PMCQ1 */
    298     unsigned long       funcNo  /* Pci Function number of PMCQ1 */
    299 )
    300 {
    301   PPMCQ1BoardData boardData;
    302   unsigned int status = RTEMS_IO_ERROR;
    303 
    304   for (boardData = pmcq1BoardData; boardData; boardData = boardData->pNext)
    305   {
    306     if ((boardData->busNo == busNo) && (boardData->slotNo == slotNo) &&
    307         (boardData->funcNo == funcNo))
    308     {
    309       boardData->quiccInt = NULL;
    310       *(unsigned long *)(boardData->baseaddr + PMCQ1_INT_MASK) |= PMCQ1_INT_MASK_QUICC;
    311       status = RTEMS_SUCCESSFUL;
    312       break;
    313     }
    314   }
    315 
    316   return (status);
    317 }
    318 #endif
    319 /* This method is apparently unused. --joel 9 Oct 2014 */
    320 
    321211
    322212/*******************************************************************************
     
    492382}
    493383
    494 #if 0
    495 /* This method is apparently unused. --joel 9 Oct 2014 */
    496 /*******************************************************************************
    497 *
    498 * rsPMCQ1Commission - initialize the serial EEPROM on the QSPAN
    499 *
    500 * This routine is called to initialize the EEPROM attached to the QSPAN
    501 * on the PMCQ1 module. It will load standard settings into any QSPAN's
    502 * found with apparently uninitialised EEPROM's or PMCQ1's (to allow
    503 * EEPROM modifications to be performed).
    504 */
    505 static unsigned int rsPMCQ1Commission(
    506   unsigned long busNo,
    507   unsigned long slotNo
    508 )
    509 {
    510   unsigned int status = RTEMS_IO_ERROR;
    511   uint32_t     bridgeaddr = 0;
    512   unsigned long val;
    513   int i;
    514   uint32_t venId1;
    515   uint32_t venId2;
    516 
    517   pci_read_config_dword(busNo, slotNo, 0, PCI_VENDOR_ID, &venId1);
    518   pci_read_config_dword(busNo, slotNo, 0, PCI_VENDOR_ID, &venId2);
    519   if ((venId1 == 0x086210e3) ||
    520       (venId2 == PCI_ID(PCI_VEN_ID_RADSTONE, PCI_DEV_ID_PMCQ1)))
    521   {
    522     pci_read_config_dword(busNo, slotNo, 0, PCI_BASE_ADDRESS_0, &bridgeaddr);
    523     status = RTEMS_SUCCESSFUL;
    524 
    525     /*
    526      * The On board PMCQ1 on an EP1A has a subVendor ID of 0.
    527      * A real PMCQ1 also has the sub vendor ID set up.
    528      */
    529     if ((busNo == 0) && (slotNo == 1)) {
    530       *(unsigned long *)rsPMCQ1eeprom = 0;
    531     } else {
    532       *(unsigned long *)rsPMCQ1eeprom = PCI_ID(PCI_VEN_ID_RADSTONE, PCI_DEV_ID_PMCQ1);
    533     }
    534 
    535     for (i = 0; i < 23; i++) {
    536       /* Wait until interface not active */
    537       while(read32(bridgeaddr + 0x804) & 0x80000000) {
    538         rtems_bsp_delay(1);
    539       }
    540 
    541       /* Write value */
    542       write32(bridgeaddr + 0x804, (rsPMCQ1eeprom[i] << 8) | i);
    543 
    544       /* delay for > 31 usec to allow active bit to become set */
    545       rtems_bsp_delay(100);
    546 
    547       /* Wait until interface not active */
    548       while(read32(bridgeaddr + 0x804) & 0x80000000) {
    549         rtems_bsp_delay(1);
    550       }
    551 
    552       /* Re-read value */
    553       write32(bridgeaddr + 0x804, 0x40000000 | i);
    554 
    555       /* delay for > 31 usec to allow active bit to become set */
    556       rtems_bsp_delay(100);
    557 
    558       /* Wait until interface not active */
    559       while((val = read32(bridgeaddr + 0x804)) & 0x80000000) {
    560         rtems_bsp_delay(1);
    561       }
    562 
    563       if (((val >> 8) & 0xff) != rsPMCQ1eeprom[i]) {
    564         printk("Error writing byte %d expected 0x%02x got 0x%02x\n",
    565                i, rsPMCQ1eeprom[i], (unsigned char)(val >> 8));
    566         status = RTEMS_IO_ERROR;
    567         break;
    568       }
    569     }
    570   }
    571   return(status);
    572 }
    573 #endif
    574 
    575384uint32_t PMCQ1_Read_EPLD( uint32_t base, uint32_t reg )
    576385{
  • c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c

    rcc7c922 re160e41  
    149149    default_rtems_entry = config->defaultEntry;
    150150    rtems_hdl_tbl               = config->irqHdlTbl;
    151 
    152     /*
    153      * set up internal tables used by rtems interrupt prologue
    154      */
    155 #if 0
    156 #ifdef BSP_PCI_ISA_BRIDGE_IRQ
    157     /*
    158      * start with ISA IRQ
    159      */
    160     compute_i8259_masks_from_prio (config);
    161 
    162     for (i=BSP_ISA_IRQ_LOWEST_OFFSET; i < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; i++) {
    163       if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
    164          BSP_irq_enable_at_i8259s (i);
    165       }
    166       else {
    167          BSP_irq_disable_at_i8259s (i);
    168       }
    169     }
    170 
    171         if ( BSP_ISA_IRQ_NUMBER > 0 ) {
    172         /*
    173                  * must enable slave pic anyway
    174                  */
    175                 BSP_irq_enable_at_i8259s (2);
    176         }
    177 #endif
    178 #endif
    179151
    180152    /*
  • c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c

    rcc7c922 re160e41  
    6262}
    6363
    64 #if 0
    65 static void BSP_Fatal_Fault_Light(void)
    66 {
    67   uint8_t data;
    68 
    69   data = *GENERAL_REGISTER1;
    70   data &= 0xf0;
    71   data |= 0x7;
    72   while(1)
    73     *GENERAL_REGISTER1 = data;
    74 }
    75 #endif
    76 
    7764/*
    7865 * Vital Board data Start using DATA RESIDUAL
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