Changeset e029467 in rtems for c/src/lib/libcpu/i386/cpu.h


Ignore:
Timestamp:
Feb 18, 1999, 3:16:37 PM (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
df0ac0b
Parents:
edfb0eb
Message:

Patch from Emmanuel Raguet <raguet@…>:

You will find enclosed a patch which contains, for Intel PC386 target :

  • an Ethernet driver for DEC21140 device based boards.
  • a simple cache management with paging mechanism.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/i386/cpu.h

    redfb0eb re029467  
    132132
    133133  return segment;
     134}
     135
     136/*
     137 * Added for pagination management
     138 */
     139
     140static inline unsigned int i386_get_cr0()
     141{
     142  register unsigned int segment = 0;
     143
     144  asm volatile ( "movl %%cr0,%0" : "=r" (segment) : "0" (segment) );
     145
     146  return segment;
     147}
     148
     149static inline void i386_set_cr0(unsigned int segment)
     150{
     151  asm volatile ( "movl %0,%%cr0" : "=r" (segment) : "0" (segment) );
     152}
     153
     154static inline unsigned int i386_get_cr2()
     155{
     156  register unsigned int segment = 0;
     157
     158  asm volatile ( "movl %%cr2,%0" : "=r" (segment) : "0" (segment) );
     159
     160  return segment;
     161}
     162
     163static inline unsigned int i386_get_cr3()
     164{
     165  register unsigned int segment = 0;
     166
     167  asm volatile ( "movl %%cr3,%0" : "=r" (segment) : "0" (segment) );
     168
     169  return segment;
     170}
     171
     172static inline void i386_set_cr3(unsigned int segment)
     173{
     174  asm volatile ( "movl %0,%%cr3" : "=r" (segment) : "0" (segment) );
    134175}
    135176
     
    364405                                             unsigned limit);
    365406
     407/*
     408 * See page 11.18 Figure 11-12.
     409 *
     410 */
     411
     412typedef struct {
     413  unsigned int offset                   : 12;
     414  unsigned int page                     : 10;
     415  unsigned int directory                : 10;
     416}la_bits;
     417
     418typedef union {
     419  la_bits       bits;
     420  unsigned int  address;
     421}linear_address;
     422
     423
     424/*
     425 * See page 11.20 Figure 11-14.
     426 *
     427 */
     428
     429typedef struct {
     430  unsigned int present                  : 1;
     431  unsigned int writable                 : 1;
     432  unsigned int user                     : 1;
     433  unsigned int write_through            : 1;
     434  unsigned int cache_disable            : 1;
     435  unsigned int accessed                 : 1;
     436  unsigned int reserved1                : 1;
     437  unsigned int page_size                : 1;
     438  unsigned int reserved2                : 1;
     439  unsigned int available                : 3;
     440  unsigned int page_frame_address       : 20;
     441}page_dir_bits;
     442
     443typedef union {
     444  page_dir_bits bits;
     445  unsigned int  dir_entry;
     446}page_dir_entry;
     447
     448typedef struct {
     449  unsigned int present                  : 1;
     450  unsigned int writable                 : 1;
     451  unsigned int user                     : 1;
     452  unsigned int write_through            : 1;
     453  unsigned int cache_disable            : 1;
     454  unsigned int accessed                 : 1;
     455  unsigned int dirty                    : 1;
     456  unsigned int reserved2                : 2;
     457  unsigned int available                : 3;
     458  unsigned int page_frame_address       : 20;
     459}page_table_bits;
     460
     461typedef union {
     462  page_table_bits       bits;
     463  unsigned int          table_entry;
     464}page_table_entry;
     465 
     466/*
     467 * definitions related to page table entry
     468 */
     469#define PG_SIZE 0x1000
     470#define MASK_OFFSET 0xFFF
     471#define MAX_ENTRY (PG_SIZE/sizeof(page_dir_entry))
     472#define FOUR_MB       0x400000
     473#define MASK_FLAGS 0x1A
     474
     475#define PTE_PRESENT             0x01
     476#define PTE_WRITABLE            0x02
     477#define PTE_USER                0x04
     478#define PTE_WRITE_THROUGH       0x08
     479#define PTE_CACHE_DISABLE       0x10
     480
     481typedef struct {
     482  page_dir_entry pageDirEntry[MAX_ENTRY];
     483}page_directory;
     484
     485typedef struct {
     486  page_table_entry pageTableEntry[MAX_ENTRY];
     487}page_table;
     488
     489static inline void flush_cache(){
     490  asm volatile ("wbinvd");
     491}
     492
     493
     494/* C declaration for paging management */
     495
     496extern int      _CPU_is_cache_enabled();
     497extern int      _CPU_is_paging_enabled();
     498extern int      init_paging();
     499extern void     _CPU_enable_paging();
     500extern void     _CPU_disable_paging();
     501extern void     _CPU_disable_cache();
     502extern void     _CPU_enable_cache();
     503extern int      _CPU_map_phys_address
     504                      (void **mappedAddress, void *physAddress,
     505                       int size, int flag);
     506extern int      _CPU_unmap_virt_address (void *mappedAddress, int size);
     507extern int      _CPU_change_memory_mapping_attribute
     508                         (void **newAddress, void *mappedAddress,
     509                          unsigned int size, unsigned int flag);
     510extern int      _CPU_display_memory_attribute();
     511
    366512# endif /* ASM */
    367513
    368514#endif
     515
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