Ignore:
Timestamp:
Dec 3, 2014, 10:35:52 AM (5 years ago)
Author:
Daniel Hellstrom <daniel@…>
Branches:
4.11, master
Children:
adc1dbeb
Parents:
4081032
git-author:
Daniel Hellstrom <daniel@…> (12/03/14 10:35:52)
git-committer:
Daniel Hellstrom <daniel@…> (12/04/14 11:51:11)
Message:

SPARC: optimize IRQ enable & disable

  • Coding style cleanups.
  • Use OS reserved trap 0x89 for IRQ Disable
  • Use OS reserved trap 0x8A for IRQ Enable
  • Add to SPARC CPU supplement documentation

This will result in faster Disable/Enable? code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.

It was also possible to reduce the interrupt trap handler by
five instructions due to this.

File:
1 edited

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