Changeset df8a31d in rtems


Ignore:
Timestamp:
Mar 22, 2018, 1:50:02 PM (19 months ago)
Author:
Thomas Doerfler <thomas.doerfler@…>
Branches:
master
Children:
b1d3b0f
Parents:
7353422f
git-author:
Thomas Doerfler <thomas.doerfler@…> (03/22/18 13:50:02)
git-committer:
Sebastian Huber <sebastian.huber@…> (03/22/18 13:51:22)
Message:

bsp/tqm8xx: Fix network interface driver

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • bsps/powerpc/include/mpc8xx.h

    r7353422f rdf8a31d  
    290290#define M8xx_FEC_MII_DATA_WDATA(n) ((n) & 0xffff           )
    291291#define M8xx_FEC_MII_DATA_RDATA(reg) ((reg) & 0xffff       )
     292  /*
     293   * bits for FEC ECNTRL register
     294   */
     295#define M8xx_FEC_ECNTRL_FEC_PINMUX ( 1           << (31-29))
     296#define M8xx_FEC_ECNTRL_ETHER_EN   ( 1           << (31-30))
     297#define M8xx_FEC_ECNTRL_RESET      ( 1           << (31-31))
     298
     299  /*
     300   * bits for FEC R_CNTRL register
     301   */
     302#define M8xx_FEC_R_CNTRL_BC_REJ     ( 1           << (31-27))
     303#define M8xx_FEC_R_CNTRL_PROM       ( 1           << (31-28))
     304#define M8xx_FEC_R_CNTRL_MII_MODE   ( 1           << (31-29))
     305#define M8xx_FEC_R_CNTRL_DRT        ( 1           << (31-30))
     306#define M8xx_FEC_R_CNTRL_LOOP       ( 1           << (31-31))
     307
    292308  /*
    293309   * bits for FEC X_CNTRL register
  • c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c

    r7353422f rdf8a31d  
    375375   * Issue reset to FEC
    376376   */
    377   m8xx.fec.ecntrl=0x1;
     377  m8xx.fec.ecntrl = M8xx_FEC_ECNTRL_RESET;
    378378
    379379  /*
     
    386386   */
    387387  m8xx.pdpar = 0x1fff;
    388   m8xx.pddir = 0x1c58;
     388  m8xx.pddir = 0x1fff;
    389389
    390390  /*
     
    452452   *   No loopback
    453453   */
    454   m8xx.fec.r_cntrl = 0x00000006;
     454  m8xx.fec.r_cntrl = M8xx_FEC_R_CNTRL_MII_MODE | M8xx_FEC_R_CNTRL_DRT;
    455455
    456456  /*
     
    475475   *   RISC arbitration ID = 1 => U-bus arbitration = 5
    476476   */
    477   m8xx.sdcr = 1;
     477  m8xx.sdcr = M8xx_SDCR_RAID_5;
    478478
    479479  /*
     
    895895   */
    896896  if (ifp->if_flags & IFF_PROMISC)
    897     m8xx.fec.r_cntrl |= 0x8;
     897    m8xx.fec.r_cntrl |= M8xx_FEC_R_CNTRL_PROM;
    898898  else
    899     m8xx.fec.r_cntrl &= ~0x8;
     899    m8xx.fec.r_cntrl &= ~M8xx_FEC_R_CNTRL_PROM;
    900900
    901901  /*
     
    912912   * Enable receiver and transmitter
    913913   */
    914   m8xx.fec.ecntrl = 0x2;
     914  m8xx.fec.ecntrl = M8xx_FEC_ECNTRL_ETHER_EN | M8xx_FEC_ECNTRL_FEC_PINMUX;
    915915}
    916916
     
    11051105  if (0 == (IFM_FDX & IFM_OPTIONS(media))) {
    11061106    m8xx.fec.x_cntrl &= ~M8xx_FEC_X_CNTRL_FDEN;
     1107    m8xx.fec.r_cntrl |=  M8xx_FEC_R_CNTRL_DRT;
    11071108  }
    11081109  else {
    11091110    m8xx.fec.x_cntrl |=  M8xx_FEC_X_CNTRL_FDEN;
     1111    m8xx.fec.r_cntrl &= ~M8xx_FEC_R_CNTRL_DRT;
    11101112  }
    11111113  /*
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