Ignore:
Timestamp:
Jun 12, 2000, 3:00:15 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
edeed26
Parents:
0ab65474
Message:

Merged from 4.5.0-beta3a

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/sh/sh7045/sci/sci.c

    r0ab65474 rdf49c60  
    5252#include <sh/sh7_sci.h>
    5353#include <sh/sh7_pfc.h>
    54 /* #include <sh/io_types.h> */
     54
    5555#include <sh/sci.h>
    5656
     
    331331  }
    332332   
    333   /* enable I/O pins */
     333  /* set PFC registers to enable I/O pins */
    334334
    335335  if ((minor == 0) && (STANDALONE_EVB == 1)) {
    336     temp16 = read16(PFC_PACRL2) &          /* disable SCK0, Tx0, Rx0 */
    337       ~(PA2MD1 | PA2MD0 | PA1MD0 | PA0MD0);
    338     temp16 |= (PA_TXD0 | PA_RXD0);       /* assign pins for Tx0, Rx0 */
     336    temp16 = read16(PFC_PACRL2);         /* disable SCK0, DMA, IRQ */
     337    temp16 &= ~(PA2MD1 | PA2MD0);
     338    temp16 |= (PA_TXD0 | PA_RXD0);       /* enable pins for Tx0, Rx0 */
    339339    write16(temp16, PFC_PACRL2);
    340340   
    341341  } else if (minor == 1) { 
    342     temp16 = read16(PFC_PACRL2) &           /* disable SCK1, Tx1, Rx1 */
    343       ~(PA5MD1 | PA5MD0 | PA4MD0 | PA3MD0);
    344     temp16 |= (PA_TXD1 | PA_RXD1);        /* assign pins for Tx1, Rx1 */
     342    temp16 = read16(PFC_PACRL2);          /* disable SCK1, DMA, IRQ */
     343    temp16 &= ~(PA5MD1 | PA5MD0);
     344    temp16 |= (PA_TXD1 | PA_RXD1);        /* enable pins for Tx1, Rx1 */
    345345    write16(temp16, PFC_PACRL2);
    346346
     
    350350  if ((minor != 0) || (STANDALONE_EVB == 1)) {
    351351    write8(0x00, sci_device[minor].addr + SCI_SCR);      /* Clear SCR */
    352                                                    /* set SCR and BRR */
     352                                                   /* set SMR and BRR */
    353353    _sci_set_cflags( &sci_device[minor], sci_device[minor].cflags );
    354354
    355     for(a=0; a < 10000L; a++) {                      /* One-bit delay */
     355    for(a=0; a < 10000L; a++) {                      /* Delay */
    356356      asm volatile ("nop");
    357357    }
     
    360360           sci_device[minor].addr + SCI_SCR);
    361361    temp8 = read8(sci_device[minor].addr + SCI_RDR);   /* flush input */
     362    /* Clear RDRF flag */
     363    temp8= read8(sci_device[minor].addr + SCI_SSR) & ~SCI_RDRF;
     364    write8(temp8, sci_device[minor].addr + SCI_SSR);
     365    write8(0x00, sci_device[minor].addr + SCI_TDR);    /* force output */
     366     /* Clear the TDRE bit */
     367     temp8 = read8(sci_device[minor].addr + SCI_SSR) & ~SCI_TDRE;
     368     write8(temp8, sci_device[minor].addr + SCI_SSR);
    362369   
    363370    /* add interrupt setup if required */
Note: See TracChangeset for help on using the changeset viewer.