Changeset de7b174e in rtems


Ignore:
Timestamp:
Nov 15, 2016, 6:19:39 PM (4 years ago)
Author:
Joel Sherrill <joel@…>
Branches:
5, master
Children:
e629076
Parents:
a0d4e99
git-author:
Joel Sherrill <joel@…> (11/15/16 18:19:39)
git-committer:
Joel Sherrill <joel@…> (11/29/16 15:29:03)
Message:

Remove sparc/sis BSP.

closes #2810.

Location:
c/src/lib/libbsp/sparc
Files:
1 deleted
8 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/erc32/clock/ckinit.c

    ra0d4e99 rde7b174e  
    2828#include <rtems/timecounter.h>
    2929#include <rtems/score/sparcimpl.h>
    30 
    31 #if SIMSPARC_FAST_IDLE==1
    32 #define CLOCK_DRIVER_USE_FAST_IDLE 1
    33 #endif
    3430
    3531/*
  • c/src/lib/libbsp/sparc/erc32/configure.ac

    ra0d4e99 rde7b174e  
    3131to the uart.  Thus sis has no chance of getting the data out.])
    3232
    33 RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
    34 RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
    35 [If defined, speed up the clock ticks while the idle task is running so
    36  time spent in the idle task is minimized.  This significantly reduces
    37  the wall time required to execute the RTEMS test suites.])
    38 
    39 RTEMS_BSPOPTS_SET([ENABLE_SIS_QUIRKS],[sis],[1])
    40 RTEMS_BSPOPTS_SET([ENABLE_SIS_QUIRKS],[*],[0])
    41 RTEMS_BSPOPTS_HELP([ENABLE_SIS_QUIRKS],
    42 [If defined, then the SIS simulator specific code in the
    43  BSP will be enabled.  In particular, SIS requires special
    44  initialization not used on real ERC32 hardware.])
    45 
    4633RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
    4734RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
  • c/src/lib/libbsp/sparc/erc32/timer/timer.c

    ra0d4e99 rde7b174e  
    5353}
    5454
    55 #if ENABLE_SIS_QUIRKS
    56 #define AVG_OVERHEAD      8  /* It typically takes 3.0 microseconds */
    57                              /*     to start/stop the timer. */
    58 #define LEAST_VALID       9  /* Don't trust a value lower than this */
    59 #else
    6055#define AVG_OVERHEAD     12  /* It typically takes 3.0 microseconds */
    6156                             /*     to start/stop the timer. */
    6257#define LEAST_VALID      13  /* Don't trust a value lower than this */
    63 #endif
    6458
    6559benchmark_timer_t benchmark_timer_read(void)
  • c/src/lib/libbsp/sparc/leon2/clock/ckinit.c

    ra0d4e99 rde7b174e  
    2727#include <rtems/timecounter.h>
    2828#include <rtems/score/sparcimpl.h>
    29 
    30 #if SIMSPARC_FAST_IDLE==1
    31 #define CLOCK_DRIVER_USE_FAST_IDLE 1
    32 #endif
    3329
    3430static rtems_timecounter_simple leon2_tc;
  • c/src/lib/libbsp/sparc/leon2/configure.ac

    ra0d4e99 rde7b174e  
    3131to the uart.  Thus sis has no chance of getting the data out.])
    3232
    33 RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
    34 RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
    35 [If defined, speed up the clock ticks while the idle task is running so
    36  time spent in the idle task is minimized.  This significantly reduces
    37  the wall time required to execute the RTEMS test suites.])
    38 
    3933RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
    4034RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
  • c/src/lib/libbsp/sparc/leon3/clock/ckinit.c

    ra0d4e99 rde7b174e  
    3636 */
    3737#ifndef RTEMS_DRVMGR_STARTUP
    38 
    39 #if SIMSPARC_FAST_IDLE==1
    40 #define CLOCK_DRIVER_USE_FAST_IDLE 1
    41 #endif
    4238
    4339/* LEON3 Timer system interrupt number */
  • c/src/lib/libbsp/sparc/leon3/configure.ac

    ra0d4e99 rde7b174e  
    2828to operate better.])
    2929
    30 RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
    31 RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
    32 [If defined, speed up the clock ticks while the idle task is running so
    33  time spent in the idle task is minimized.  This significantly reduces
    34  the wall time required to execute the RTEMS test suites.])
    35 
    3630RTEMS_BSPOPTS_SET([BSP_LEON3_SMP],[*],[1])
    3731RTEMS_BSPOPTS_HELP([BSP_LEON3_SMP],
  • c/src/lib/libbsp/sparc/shared/start/start.S

    ra0d4e99 rde7b174e  
    306306        nop
    307307
    308 #if ENABLE_SIS_QUIRKS==1
    309 
    310 #include <erc32.h>
    311 
    312 /* Check if MEC is initialised. If not, this means that we are
    313    running on the simulator. Initiate some of the parameters
    314    that are done by the boot-prom otherwise.
    315 */
    316 
    317         set     SYM(ERC32_MEC), %g3  ! g3 = base address of peripherals
    318         ld      [%g3], %g2
    319         set     0xfe080000, %g1
    320         andcc   %g1, %g2, %g0
    321         bne     2f
    322 
    323  /* Set the correct memory size in MEC memory config register */
    324 
    325         set     SYM(PROM_SIZE), %l0
    326         set     0, %l1
    327         srl     %l0, 18, %l0
    328 1:
    329         tst     %l0
    330         srl     %l0, 1, %l0
    331         bne,a   1b
    332         inc     %l1
    333         sll     %l1, 8, %l1
    334 
    335         set     SYM(RAM_SIZE), %l0
    336         srl     %l0, 19, %l0
    337 1:
    338         tst     %l0
    339         srl     %l0, 1, %l0
    340         bne,a   1b
    341         inc     %l1
    342         sll     %l1, 10, %l1
    343 
    344         ! set the Memory Configuration
    345         st     %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
    346         !DISABLE THE HARDWARE WATCHDOG
    347         st     %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ]
    348         !Reduce the number of wait states to 0 for all memory areas.
    349         st     %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ]
    350 
    351         set     SYM(RAM_START), %l1  ! Cannot use RAM_END due to bug in linker
    352         set     SYM(RAM_SIZE), %l2
    353         add     %l1, %l2, %sp
    354         st      %sp, [%g5]
    355 
    356 
    357         set     SYM(CLOCK_SPEED), %g5   ! Use 14 MHz in simulator
    358         set     14, %g1
    359         st      %g1, [%g5]
    360 
    361 2:
    362 #endif
    363 
    364308        /*
    365309         *  Copy the initialized data to RAM
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