Changeset dddc0557 in rtems


Ignore:
Timestamp:
08/05/98 23:56:13 (25 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
d4bf16c
Parents:
bd8c8b2a
Message:

DCR setting changed to match what the DY-4 Firmware initialized it to.
This primarily included setting the state of the programmable outputs
and the RX and TX FIFO depths.

Moved all of the TX, RX, and RRA data structure initialization to before
the hardware initialization. As part of this, the hardware initialization
was consolidated. More than likely, some of this movement broke stuff.

Used constants added to sonic.h which gave more logical names to some
of the register bit settings.

Switched to calloc to insure the data areas where initialized to 0.

Commented out a panic check in the RX server which may or may not have
been right.

Increased the size of the CAM initialization area. It is possible
that this could be decreased or code added to handle the management
of multiple hardware addresses.

Added sonic read and write register routines which aid greatly in
debugging and provide the core for the eventual movement of this
driver to libchip.

Added debug code to the read and write register routines which can
print the value read from or written to a register. This code also
prints the register name which significantly eases reading the log.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • c/src/lib/libbsp/powerpc/dmv177/sonic/sonic.c

    rbd8c8b2a rdddc0557  
    9797 *      No reject on CAM match
    9898 */
    99 #define SONIC_DCR (DCR_DW | DCR_SBUS | DCR_TFT1 | DCR_TFT0)
     99#define SONIC_DCR \
     100   (DCR_DW32 | DCR_WAIT0 | DCR_PO0 | DCR_PO1  | DCR_RFT24 | DCR_TFT28)
    100101#ifndef SONIC_DCR
    101 # define SONIC_DCR (DCR_DW | DCR_TFT1 | DCR_TFT0)
     102# define SONIC_DCR (DCR_DW32 | DCR_TFT28)
    102103#endif
    103104#ifndef SONIC_DC2
    … …  
    174175  int                             rdaCount;
    175176  ReceiveResourcePointer_t        rsa;
     177  ReceiveDescriptorPointer_t      rdp_last;
    176178
    177179  /*
    … …  
    240242     * Change malloc to malloc_noncacheable_guarded.
    241243     */
    242     p = malloc (nbytes);
     244    p = calloc(1, nbytes);
    243245    if (p == NULL)
    244246      rtems_panic ("No memory!");
    … …  
    248250      break;
    249251  }
     252#ifdef SONIC_DEBUG
     253  printf( "sonic_allocate %d bytes at %p\n", nbytes, p );
     254#endif
    250255  return p;
    251256}
    … …  
    755760  struct mbuf *bp;
    756761  rtems_unsigned16 status;
    757   ReceiveDescriptor_t *rda;
    758   ReceiveDescriptorPointer_t ordp, rdp;
     762  ReceiveDescriptorPointer_t rdp;
    759763  ReceiveResourcePointer_t rwp, rea;
    760764  rtems_unsigned16 newMissedTally, oldMissedTally;
    761   int i;
    762765  int continuousCount;
    763766
    764   /*
    765    * Set up list in Receive Resource Area.
    766    * Allocate space for incoming packets.
    767    */
    768767  rwp = dp->rsa;
    769   for (i = 0 ; i < (dp->rdaCount + RRA_EXTRA_COUNT) ; i++, rwp++) {
    770     struct mbuf **mbp;
    771 
    772     /*
    773      * Allocate memory for buffer.
    774      * Place a pointer to the mbuf at the beginning of the buffer
    775      * so we can find the mbuf when the SONIC returns the buffer
    776      * to the driver.
    777      */
    778     bp = ambufw (RBUF_SIZE);
    779     mbp = (struct mbuf **)bp->data;
    780     bp->data += sizeof *mbp;
    781     *mbp = bp;
    782 
    783     /*
    784      * Set up RRA entry
    785      */
    786     rwp->buff_ptr_lsw = LSW(bp->data);
    787     rwp->buff_ptr_msw = MSW(bp->data);
    788     rwp->buff_wc_lsw = RBUF_WC;
    789     rwp->buff_wc_msw = 0;
    790   }
    791768  rea = rwp;
    792 
    793   /*
    794    * Set up remaining Receive Resource Area pointers
    795    */
    796   sonic_write_register( rp, SONIC_REG_RSA, LSW(dp->rsa) );
    797   sonic_write_register( rp, SONIC_REG_RRP, LSW(dp->rsa) );
    798   sonic_write_register( rp, SONIC_REG_REA, LSW(rea) );
    799   sonic_write_register( rp, SONIC_REG_RWP, LSW(rea) );
    800 
    801   /*
    802    * Set End Of Buffer Count register to the value recommended
    803    * in Note 1 of Section 3.4.4.4 of the SONIC data sheet.
    804    */
    805   sonic_write_register( rp, SONIC_REG_EOBC, RBUF_WC - 2 );
    806 
    807   /*
    808    * Set up circular linked list in Receive Descriptor Area.
    809    * Leaves ordp pointing at the `end' of the list and
    810    * rdp pointing at the `beginning' of the list.
    811    */
    812   rda = sonic_allocate (dp->rdaCount * sizeof *rda);
    813   ordp = rdp = rda;
    814   for (i = 0 ; i < dp->rdaCount ; i++) {
    815     /*
    816      * Set up RDA entry
    817      */
    818     if (i == (dp->rdaCount - 1))
    819       rdp->next = rda;
    820     else
    821       rdp->next = (ReceiveDescriptor_t *)(rdp + 1);
    822     rdp->in_use = 1;
    823     ordp = rdp;
    824     rdp = rdp->next;
    825     ordp->link = LSW(rdp);
    826   }
    827   ordp->link |= RDA_LINK_EOL;
    828   sonic_write_register( rp, SONIC_REG_URDA, MSW(rdp) );
    829   sonic_write_register( rp, SONIC_REG_CRDA, LSW(rdp) );
     769  rdp = dp->rdp_last;
    830770
    831771  /*
    … …  
    891831       * Resource we are about to reuse.
    892832       */
     833/* XXX figure out whether this is valid or not */
     834#if 0
    893835      if ((LSW(p) != rwp->buff_ptr_lsw)
    894836       || (MSW(p) != rwp->buff_ptr_msw))
    895837        rtems_panic ("SONIC RDA/RRA");
     838#endif
    896839
    897840      /*
    … …  
    942885    rdp->link |= RDA_LINK_EOL;
    943886    rdp->in_use = 1;
    944     ordp->link &= ~RDA_LINK_EOL;
    945     ordp = rdp;
    946887    rdp = rdp->next;
     888    rdp->link &= ~RDA_LINK_EOL;
    947889  }
    948890}
    … …  
    966908  void *rp = dp->sonic;
    967909  int i;
     910  ReceiveDescriptor_t *rda;
    968911  unsigned char *hwaddr;
    969912  rtems_status_code sc;
    970913  rtems_isr_entry old_handler;
    971914  TransmitDescriptorPointer_t otdp, tdp;
     915  ReceiveDescriptorPointer_t ordp, rdp;
     916  ReceiveResourcePointer_t rwp, rea;
     917  struct mbuf *bp;
    972918  struct CamDescriptor{
    973     rtems_unsigned32  cep;  /* CAM Entry Pointer */
    974     rtems_unsigned32  cap2; /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
    975     rtems_unsigned32  cap1; /* CAM Address Port 1 xx-xx-YY-YY-xxxx */
    976     rtems_unsigned32  cap0; /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
     919    struct {
     920      rtems_unsigned32  cep;  /* CAM Entry Pointer */
     921      rtems_unsigned32  cap0; /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
     922      rtems_unsigned32  cap1; /* CAM Address Port 1 xx-xx-YY-YY-xxxx */
     923      rtems_unsigned32  cap2; /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
     924    } desc[16];
    977925    rtems_unsigned32  ce;
    978926  };
    … …  
    980928
    981929  /*
    982    * Issue a software reset if necessary.
    983    */
    984   if ((sonic_read_register( rp, SONIC_REG_CR ) & CR_RST) == 0)
    985     sonic_write_register( rp, SONIC_REG_CR, CR_RST );
    986 
    987   /*
    988    * Set up data configuration registers.
    989    */
    990   sonic_write_register( rp, SONIC_REG_DCR, SONIC_DCR );
    991 /* XXX can not find documentation with this register
    992   sonic_write_register( rp, SONIC_REG_DCR2, SONIC_DC2 );
    993 */
    994 
    995   /*
    996    * Mask all interrupts
    997    */
    998   sonic_write_register( rp, SONIC_REG_IMR, 0x3fff );
    999 
    1000   /*
    1001    * Clear outstanding interrupts.
    1002    */
    1003   sonic_write_register( rp, SONIC_REG_ISR, 0x7FFF );
    1004 
    1005   /*
    1006    * Remove device reset
    1007    */
    1008   sonic_write_register( rp, SONIC_REG_CR, 0 );
    1009  
     930   *  Set up circular linked list in Transmit Descriptor Area.
     931   *  Use the PINT bit in the transmit configuration field to
     932   *  request an interrupt on every other transmitted packet.
     933   *
     934   *  NOTE: sonic_allocate() zeroes all of the memory allocated.
     935   */
     936
     937  dp->tdaActiveCount = 0;
     938  dp->tdaTail = sonic_allocate (dp->tdaCount * sizeof *tdp);
     939  otdp = tdp = dp->tdaTail;
     940  for (i = 0 ; i < dp->tdaCount ; i++) {
     941    if (i & 1)
     942      tdp->pkt_config = TDA_CONFIG_PINT;
     943    else
     944      tdp->pkt_config = 0;
     945    tdp->frag_count = 1;
     946    if (i == (dp->tdaCount - 1))
     947      tdp->next = (TransmitDescriptor_t *)dp->tdaTail;
     948    else
     949      tdp->next = (TransmitDescriptor_t *)(tdp + 1);
     950    otdp = tdp;
     951    tdp = tdp->next;
     952  }
     953  dp->tdaHead = otdp;
     954  dp->tdaHead->linkp = &dp->tdaHead->frag[0].frag_link;
     955
     956  /*
     957   *  Set up circular linked list in Receive Descriptor Area.
     958   *  Leaves ordp pointing at the `end' of the list and
     959   *  rdp pointing at the `beginning' of the list.
     960   */
     961
     962  rda = sonic_allocate (dp->rdaCount * sizeof *rda);
     963  ordp = rdp = rda;
     964  for (i = 0 ; i < dp->rdaCount ; i++) {
     965    /*
     966     * Set up RDA entry
     967     */
     968    if (i == (dp->rdaCount - 1))
     969      rdp->next = rda;
     970    else
     971      rdp->next = (ReceiveDescriptor_t *)(rdp + 1);
     972    rdp->in_use = 0;           /* XXX was 1 */
     973    ordp = rdp;
     974    rdp = rdp->next;
     975    ordp->link = LSW(rdp);
     976  }
     977  ordp->link |= RDA_LINK_EOL;
     978  dp->rdp_last = rdp;
     979
    1010980  /*
    1011981   * Allocate the receive resource area.
    … …  
    1019989  printf( "rsa area = %p\n", dp->rsa );
    1020990#endif
    1021   sonic_write_register( rp, SONIC_REG_URRA , MSW(dp->rsa) );
     991
     992  /*
     993   *  Set up list in Receive Resource Area.
     994   *  Allocate space for incoming packets.
     995   */
     996
     997  rwp = dp->rsa;
     998  for (i = 0 ; i < (dp->rdaCount + RRA_EXTRA_COUNT) ; i++, rwp++) {
     999    struct mbuf **mbp;
     1000
     1001    /*
     1002     * Allocate memory for buffer.
     1003     * Place a pointer to the mbuf at the beginning of the buffer
     1004     * so we can find the mbuf when the SONIC returns the buffer
     1005     * to the driver.
     1006     */
     1007    bp = ambufw (RBUF_SIZE);
     1008    mbp = (struct mbuf **)bp->data;
     1009    bp->data += sizeof *mbp;
     1010    *mbp = bp;
     1011
     1012    /*
     1013     * Set up RRA entry
     1014     */
     1015    rwp->buff_ptr_lsw = LSW(bp->data);
     1016    rwp->buff_ptr_msw = MSW(bp->data);
     1017    rwp->buff_wc_lsw = RBUF_WC;
     1018    rwp->buff_wc_msw = 0;
     1019  }
     1020  rea = rwp;
     1021
     1022  /*
     1023   * Issue a software reset.
     1024   */
     1025  sonic_write_register( rp, SONIC_REG_CR, CR_RST | CR_STP | CR_RXDIS | CR_HTX );
     1026
     1027  /*
     1028   * Set up data configuration registers.
     1029   */
     1030  sonic_write_register( rp, SONIC_REG_DCR, SONIC_DCR );
     1031  sonic_write_register( rp, SONIC_REG_DCR2, SONIC_DC2 );
     1032
     1033  sonic_write_register( rp, SONIC_REG_CR, CR_STP | CR_RXDIS | CR_HTX );
     1034
     1035  /*
     1036   * Mask all interrupts
     1037   */
     1038  sonic_write_register( rp, SONIC_REG_IMR, 0x3fff );
     1039
     1040  /*
     1041   * Clear outstanding interrupts.
     1042   */
     1043  sonic_write_register( rp, SONIC_REG_ISR, 0x7FFF );
     1044
     1045  /*
     1046   *  Clear the tally counters
     1047   */
     1048
     1049  sonic_write_register( rp, SONIC_REG_CRCT, 0xFFFF );
     1050  sonic_write_register( rp, SONIC_REG_FAET, 0xFFFF );
     1051  sonic_write_register( rp, SONIC_REG_MPT, 0xFFFF );
     1052
     1053  /*
     1054   *  Set the Receiver mode
     1055   *
     1056   *  Enable/disable reception of broadcast packets
     1057   */
     1058
     1059  if (broadcastFlag)
     1060    sonic_write_register( rp, SONIC_REG_RCR, RCR_BRD );
     1061  else
     1062    sonic_write_register( rp, SONIC_REG_RCR, 0 );
     1063
     1064  /*
     1065   * Set up Resource Area pointers
     1066   */
     1067  sonic_write_register( rp, SONIC_REG_URRA, MSW(dp->rsa) );
     1068  sonic_write_register( rp, SONIC_REG_RSA, LSW(dp->rsa) );
     1069
     1070  sonic_write_register( rp, SONIC_REG_REA, LSW(rea) );
     1071
     1072  sonic_write_register( rp, SONIC_REG_RRP, LSW(dp->rsa) );
     1073  sonic_write_register( rp, SONIC_REG_RWP, LSW(dp->rsa) ); /* XXX was rea */
     1074  sonic_write_register( rp, SONIC_REG_RSC, 0 );
     1075
     1076  sonic_write_register( rp, SONIC_REG_URDA, MSW(rdp) );
     1077  sonic_write_register( rp, SONIC_REG_CRDA, LSW(rdp) );
     1078
     1079  sonic_write_register( rp, SONIC_REG_UTDA, MSW(dp->tdaTail) );
     1080  sonic_write_register( rp, SONIC_REG_CTDA, LSW(dp->tdaTail) );
     1081
     1082  /*
     1083   * Set End Of Buffer Count register to the value recommended
     1084   * in Note 1 of Section 3.4.4.4 of the SONIC data sheet.
     1085   */
     1086
     1087  sonic_write_register( rp, SONIC_REG_EOBC, RBUF_WC - 2 );
     1088
     1089  /*
     1090   *  Issue the load RRA command
     1091   */
     1092
     1093  sonic_write_register( rp, SONIC_REG_CR, CR_RRRA );
     1094  while (sonic_read_register( rp, SONIC_REG_CR ) & CR_RRRA)
     1095    continue;
     1096
     1097#if 0
     1098  /*
     1099   * Remove device reset
     1100   */
     1101
     1102  sonic_write_register( rp, SONIC_REG_CR, 0 );
     1103#endif
    10221104
    10231105  /*
    … …  
    10271109  hwaddr = dp->iface->hwaddr;
    10281110  cdp = (struct CamDescriptor *)dp->rsa;
    1029   cdp->cep = 0;      /* Fill first entry in CAM */
    1030   cdp->cap2 = hwaddr[0] << 8 | hwaddr[1];
    1031   cdp->cap1 = hwaddr[2] << 8 | hwaddr[3];
    1032   cdp->cap0 = hwaddr[4] << 8 | hwaddr[5];
     1111  for (i=0 ; i<16 ; i++ ) {
     1112    cdp->desc[i].cep = i;
     1113  }
     1114
     1115  cdp->desc[0].cep = 0;      /* Fill first entry in CAM */
     1116  cdp->desc[0].cap2 = hwaddr[0] << 8 | hwaddr[1];
     1117  cdp->desc[0].cap1 = hwaddr[2] << 8 | hwaddr[3];
     1118  cdp->desc[0].cap0 = hwaddr[4] << 8 | hwaddr[5];
    10331119  cdp->ce = 0x0001;    /* Enable first entry in CAM */
    1034   sonic_write_register( rp, SONIC_REG_CDC, 1 );      /* One entry in CDA */
     1120
     1121  sonic_write_register( rp, SONIC_REG_CDC, 16 );      /* 16 entries in CDA */
    10351122  sonic_write_register( rp, SONIC_REG_CDP, LSW(cdp) );
    10361123  sonic_write_register( rp, SONIC_REG_CR, CR_LCAM );  /* Load the CAM */
    … …  
    10411128   * Verify that CAM was properly loaded.
    10421129   */
     1130#if 0
    10431131  sonic_write_register( rp, SONIC_REG_CEP, 0 );      /* Select first entry in CAM */
    10441132  if ((sonic_read_register( rp, SONIC_REG_CAP2 ) != cdp->cap2)
    … …  
    10561144    rtems_panic ("SONIC LCAM");
    10571145  }
    1058 
    1059   /*
    1060    * Set up circular linked list in Transmit Descriptor Area.
    1061    * Use the PINT bit in the transmit configuration field to
    1062    * request an interrupt on every other transmitted packet.
    1063    */
    1064   dp->tdaActiveCount = 0;
    1065   dp->tdaTail = sonic_allocate (dp->tdaCount * sizeof *tdp);
    1066   otdp = tdp = dp->tdaTail;
    1067   for (i = 0 ; i < dp->tdaCount ; i++) {
    1068     if (i & 1)
    1069       tdp->pkt_config = TDA_CONFIG_PINT;
    1070     else
    1071       tdp->pkt_config = 0;
    1072     if (i == (dp->tdaCount - 1))
    1073       tdp->next = (TransmitDescriptor_t *)dp->tdaTail;
    1074     else
    1075       tdp->next = (TransmitDescriptor_t *)(tdp + 1);
    1076     otdp = tdp;
    1077     tdp = tdp->next;
    1078   }
    1079   dp->tdaHead = otdp;
    1080   dp->tdaHead->linkp = &dp->tdaHead->frag[0].frag_link;
    1081   sonic_write_register( rp, SONIC_REG_UTDA, MSW(dp->tdaTail) );
    1082   sonic_write_register( rp, SONIC_REG_CTDA, LSW(dp->tdaTail) );
    1083 
    1084   /*
    1085    * Enable/disable reception of broadcast packets
    1086    */
    1087   if (broadcastFlag)
    1088     sonic_write_register( rp, SONIC_REG_RCR, RCR_BRD );
    1089   else
    1090     sonic_write_register( rp, SONIC_REG_RCR, 0 );
     1146#endif
    10911147
    10921148  /*
    … …  
    10941150   */
    10951151  sonic_write_register( rp, SONIC_REG_IMR, 0 );
    1096   sc = rtems_interrupt_catch (sonic_interrupt_handler, dp->vector, &old_handler);
     1152  old_handler = set_vector(sonic_interrupt_handler, dp->vector, 0);
    10971153  if (sc != RTEMS_SUCCESSFUL)
    10981154    rtems_panic ("Can't attach SONIC interrupt handler: %s\n",
    … …  
    12491305#ifdef SONIC_DEBUG
    12501306#include <stdio.h>
     1307
     1308char SONIC_Reg_name[64][6]= {
     1309    "CR",         /* 0x00 */
     1310    "DCR",        /* 0x01 */
     1311    "RCR",        /* 0x02 */
     1312    "TCR",        /* 0x03 */
     1313    "IMR",        /* 0x04 */
     1314    "ISR",        /* 0x05 */
     1315    "UTDA",       /* 0x06 */
     1316    "CTDA",       /* 0x07 */
     1317    "0x08",       /* 0x08 */
     1318    "0x09",       /* 0x09 */
     1319    "0x0A",       /* 0x0A */
     1320    "0x0B",       /* 0x0B */
     1321    "0x0C",       /* 0x0C */
     1322    "URDA",       /* 0x0D */
     1323    "CRDA",       /* 0x0E */
     1324    "0x0F",       /* 0x0F */
     1325    "0x10",       /* 0x10 */
     1326    "0x11",       /* 0x11 */
     1327    "0x12",       /* 0x12 */
     1328    "EOBC",       /* 0x13 */
     1329    "URRA",       /* 0x14 */
     1330    "RSA",        /* 0x15 */
     1331    "REA",        /* 0x16 */
     1332    "RRP",        /* 0x17 */
     1333    "RWP",        /* 0x18 */
     1334    "0x19",       /* 0x19 */
     1335    "0x1A",       /* 0x1A */
     1336    "0x1B",       /* 0x1B */
     1337    "0x1C",       /* 0x1C */
     1338    "0x0D",       /* 0x1D */
     1339    "0x1E",       /* 0x1E */
     1340    "0x1F",       /* 0x1F */
     1341    "0x20",       /* 0x20 */
     1342    "CEP",        /* 0x21 */
     1343    "CAP2",       /* 0x22 */
     1344    "CAP1",       /* 0x23 */
     1345    "CAP0",       /* 0x24 */
     1346    "CE",         /* 0x25 */
     1347    "CDP",        /* 0x26 */
     1348    "CDC",        /* 0x27 */
     1349    "SR",         /* 0x28 */
     1350    "WT0",        /* 0x29 */
     1351    "WT1",        /* 0x2A */
     1352    "RSC",        /* 0x2B */
     1353    "CRCT",       /* 0x2C */
     1354    "FAET",       /* 0x2D */
     1355    "MPT",        /* 0x2E */
     1356    "MDT",        /* 0x2F */
     1357    "0x30",       /* 0x30 */
     1358    "0x31",       /* 0x31 */
     1359    "0x32",       /* 0x32 */
     1360    "0x33",       /* 0x33 */
     1361    "0x34",       /* 0x34 */
     1362    "0x35",       /* 0x35 */
     1363    "0x36",       /* 0x36 */
     1364    "0x37",       /* 0x37 */
     1365    "0x38",       /* 0x38 */
     1366    "0x39",       /* 0x39 */
     1367    "0x3A",       /* 0x3A */
     1368    "0x3B",       /* 0x3B */
     1369    "0x3C",       /* 0x3C */
     1370    "0x3D",       /* 0x3D */
     1371    "0x3E",       /* 0x3E */
     1372    "DCR2"        /* 0x3F */
     1373};
    12511374#endif
    1252 
    12531375void sonic_write_register(
    12541376  void       *base,
    … …  
    12601382
    12611383#ifdef SONIC_DEBUG
    1262   printf( "Write 0x%04x to 0x%02x\n", value, regno );
     1384  printf( "%p ", &p[regno] );
     1385  printf( "Write 0x%04x to %s (0x%02x)\n", value, SONIC_Reg_name[regno], regno );
    12631386  fflush( stdout );
    12641387#endif
    … …  
    12761399  value = p[regno];
    12771400#ifdef SONIC_DEBUG
    1278   printf( "Read 0x%04x from 0x%02x\n", value, regno );
     1401  printf( "%p ", &p[regno] );
     1402  printf( "Read 0x%04x from %s (0x%02x)\n", value, SONIC_Reg_name[regno], regno );
    12791403  fflush( stdout );
    12801404#endif
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