Changeset ddbc3f8d in rtems for cpukit/score

Timestamp:
07/11/14 14:37:56 (10 years ago)
Author:
Daniel Cederman <cederman@…>
Branches:
4.11, 5, master
Children:
9a9ab85
Parents:
62f373fb
git-author:
Daniel Cederman <cederman@…> (07/11/14 14:37:56)
git-committer:
Daniel Hellstrom <daniel@…> (08/22/14 11:10:59)
Message:

score: Add SMP support to the cache manager

Adds functions that allows the user to specify which cores that should
perform the cache operation. SMP messages are sent to all the specified
cores and the caller waits until all cores have acknowledged that they
have flushed their cache. If CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING is
defined the instruction cache invalidation function will perform the
operation on all cores using the previous method.

(No files)

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