Changeset dc7271f in rtems


Ignore:
Timestamp:
Sep 12, 2007, 3:16:32 PM (12 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
ec1d0b9d
Parents:
47d88b7
Message:

2007-09-12 Joel Sherrill <joel.sherrill@…>

PR 1257/bsps

  • irq/GT64260Int.c, irq/irq.c: Code outside of cpukit should use the public API for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the public API and directly accessing _CPU_ISR_Disable and _CPU_ISR_Enable, they were bypassing the compiler memory barrier directive which could lead to problems. This patch also changes the type of the variable passed into these routines and addresses minor style issues.
Location:
c/src/lib/libbsp/powerpc/mvme5500
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mvme5500/ChangeLog

    r47d88b7 rdc7271f  
     12007-09-12      Joel Sherrill <joel.sherrill@OARcorp.com>
     2
     3        PR 1257/bsps
     4        * irq/GT64260Int.c, irq/irq.c: Code outside of cpukit should use the
     5        public API for rtems_interrupt_disable/rtems_interrupt_enable. By
     6        bypassing the public API and directly accessing _CPU_ISR_Disable and
     7        _CPU_ISR_Enable, they were bypassing the compiler memory barrier
     8        directive which could lead to problems. This patch also changes the
     9        type of the variable passed into these routines and addresses minor
     10        style issues.
     11
    1122007-07-23      Joel Sherrill <joel.sherrill@OARcorp.com>
    213
  • c/src/lib/libbsp/powerpc/mvme5500/irq/GT64260Int.c

    r47d88b7 rdc7271f  
    111111void BSP_enable_main_irq(const rtems_irq_number irqNum)
    112112{
    113   unsigned bitNum;
    114   unsigned int level;
     113  unsigned              bitNum;
     114  rtems_interrupt_level level;
    115115
    116116  bitNum = ((int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET;
    117117
    118   _CPU_ISR_Disable(level);
     118  rtems_interrupt_disable(level);
    119119
    120120#if DynamicIrqTbl
     
    130130     outl(GT_MAINirqHI_cache, GT_CPU_INT_MASK_HI);
    131131  }
    132   _CPU_ISR_Enable (level);
     132  rtems_interrupt_enable(level);
    133133}
    134134
     
    141141void BSP_disable_main_irq(const rtems_irq_number irqNum)
    142142{
    143   unsigned bitNum;
    144   unsigned int level;
     143  unsigned              bitNum;
     144  rtems_interrupt_level level;
    145145
    146146  bitNum = ((int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET;
    147147
    148   _CPU_ISR_Disable(level);
     148  rtems_interrupt_disable(level);
    149149
    150150#if DynamicIrqTbl
     
    160160     outl(GT_MAINirqHI_cache, GT_CPU_INT_MASK_HI);
    161161  }
    162   _CPU_ISR_Enable (level);
     162  rtems_interrupt_enable(level);
    163163}
    164164
     
    172172void BSP_enable_gpp_irq(const rtems_irq_number irqNum)
    173173{
    174   unsigned bitNum;
    175   unsigned int mask, level;
    176   int group, bit;
     174  unsigned              bitNum;
     175  unsigned int          mask;
     176  int                   group;
     177  int                   bit;
     178  rtems_interrupt_level level;
    177179
    178180  bitNum = ((int)irqNum) - BSP_GPP_IRQ_LOWEST_OFFSET;
    179181
    180   _CPU_ISR_Disable(level);
     182  rtems_interrupt_disable(level);
    181183
    182184#if DynamicIrqTbl
     
    196198#endif
    197199
    198   _CPU_ISR_Enable (level);
     200  rtems_interrupt_enable(level);
    199201}
    200202
     
    208210void BSP_disable_gpp_irq(const rtems_irq_number irqNum)
    209211{
    210   unsigned bitNum;
    211   unsigned int mask, level;
    212   int group, bit;
     212  unsigned              bitNum;
     213  unsigned int          mask;
     214  int                   group;
     215  int                   bit;
     216  rtems_interrupt_level level;
     217
    213218
    214219  bitNum = ((int)irqNum) - BSP_GPP_IRQ_LOWEST_OFFSET;
    215220
    216   _CPU_ISR_Disable(level);
     221  rtems_interrupt_disable(level);
    217222#if DynamicIrqTbl
    218223  group = bitNum/8;
     
    228233  GT_GPPirq_cache &= mask;
    229234  outl(GT_GPPirq_cache, GT_GPP_Interrupt_Mask);
    230   _CPU_ISR_Enable (level);
     235  rtems_interrupt_enable(level);
    231236}
    232237
  • c/src/lib/libbsp/powerpc/mvme5500/irq/irq.c

    r47d88b7 rdc7271f  
    248248int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
    249249{
    250     unsigned int level;
     250    rtems_interrupt_level      level;
    251251 
    252252    if (!isValidInterrupt(irq->name)) {
     
    261261     * to get the previous handler before accepting to disconnect.
    262262     */
    263     _CPU_ISR_Disable(level);
     263    rtems_interrupt_disable(level);
    264264    if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
    265       _CPU_ISR_Enable(level);
     265      rtems_interrupt_enable(level);
    266266      printk("IRQ vector %d already connected\n",irq->name);
    267267      return 0;
     
    300300    irq->on(irq);*/
    301301   
    302     _CPU_ISR_Enable(level);
     302    rtems_interrupt_enable(level);
    303303
    304304    return 1;
     
    317317int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
    318318{
    319     unsigned int level;
     319    rtems_interrupt_level      level;
    320320 
    321321    if (!isValidInterrupt(irq->name)) {
     
    332332      return 0;
    333333    }
    334     _CPU_ISR_Disable(level);
     334    rtems_interrupt_disable(level);
    335335
    336336    if (is_main_irq(irq->name)) {
     
    362362    rtems_hdl_tbl[irq->name] = default_rtems_entry;
    363363
    364     _CPU_ISR_Enable(level);
     364    rtems_interrupt_enable(level);
    365365
    366366    return 1;
     
    373373int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
    374374{
    375     int i;
    376     unsigned int level;
    377    /*
    378     * Store various code accelerators
    379     */
     375    int                    i;
     376    rtems_interrupt_level  level;
     377
     378    /*
     379     * Store various code accelerators
     380     */
    380381    internal_config             = config;
    381382    default_rtems_entry         = config->defaultEntry;
    382383    rtems_hdl_tbl               = config->irqHdlTbl;
    383384
    384     _CPU_ISR_Disable(level);
     385    rtems_interrupt_disable(level);
    385386    compute_GT64260int_masks_from_prio();
    386387
     
    426427      }
    427428    }
    428     _CPU_ISR_Enable(level);
     429    rtems_interrupt_enable(level);
    429430    return 1;
    430431}
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