Changeset dc0f6585 in rtems


Ignore:
Timestamp:
Nov 4, 2005, 3:20:29 AM (14 years ago)
Author:
Till Straumann <strauman@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
0de2f239
Parents:
8c9fffd
Message:

2005-11-03 <strauman@…>

  • shared/console/reboot.c, shared/start/start.S: Fixed PR#845;

!!enable MMU!! on mvme2100 - this is very important.
Otherwise, all accesses are write-back cached [incl. memory-mapped devices].
(Prerequisite were the changes to shared/startup/bspstart.c just
below.) Implemented rtemsReboot() for mvme2100.

Location:
c/src/lib/libbsp/powerpc/shared
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/shared/console/reboot.c

    r8c9fffd rdc0f6585  
    2020  kbd_outb(0x4, 0xFE);      /* use keyboard controler to do the job... */
    2121#endif
     22#if defined(mvme2100)
     23  *(unsigned char*)0xffe00000 |= 0x80;
     24#endif
    2225} /* rtemsReboot */
  • c/src/lib/libbsp/powerpc/shared/start/start.S

    r8c9fffd rdc0f6585  
    7575        li      r8,2                    /* R/W access */
    7676        isync
    77 #if defined(mvme2100)
    78         /* BSP_vme_config() wants to use BAT0, this board will use the
    79          * available BAT1 to map RAM.
    80          */
    81         mtspr   DBAT1L,r8               /* N.B. 6xx (not 601) have valid */
    82         mtspr   DBAT1U,r11              /* bit in upper BAT register */
    83         mtspr   IBAT1L,r8
    84         mtspr   IBAT1U,r11
    85 #else
    8677        mtspr   DBAT0L,r8               /* N.B. 6xx (not 601) have valid */
    8778        mtspr   DBAT0U,r11              /* bit in upper BAT register */
    8879        mtspr   IBAT0L,r8
    8980        mtspr   IBAT0U,r11
    90 #endif
    9181        isync
    9282
     
    135125        mfmsr   r0
    136126        ori     r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
    137 #if defined(mvme2100)
    138         /* Data addr translation is broken for the mvme2100, disable it here */
    139         xori    r0,r0, MSR_DR
    140 #endif
    141127#if (PPC_HAS_FPU == 0)
    142128        xori    r0, r0, MSR_EE | MSR_IP | MSR_FP
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