Changeset dac4208 in rtems
- Timestamp:
- 03/31/04 03:47:07 (20 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 2a832d8
- Parents:
- ffe6331
- Location:
- c/src/lib/libbsp/powerpc/score603e
- Files:
-
- 19 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/score603e/ChangeLog
rffe6331 rdac4208 1 2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, 4 clock/clock.c, console/85c30.c, console/console.c, 5 console/consolebsp.h, include/bsp.h, include/gen2.h, startup/FPGA.c, 6 startup/Hwr_init.c, startup/bspstart.c, startup/genpvec.c, 7 startup/spurious.c, startup/vmeintr.c, timer/timer.c, tod/tod.c: 8 Convert to using c99 fixed size types. 9 1 10 2004-02-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> 2 11 -
c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
rffe6331 rdac4208 36 36 */ 37 37 void PCI_bus_write( 38 volatile rtems_unsigned32* _addr, /* IN */39 rtems_unsigned32_data /* IN */38 volatile uint32_t * _addr, /* IN */ 39 uint32_t _data /* IN */ 40 40 ) 41 41 { … … 44 44 } 45 45 46 rtems_unsigned32PCI_bus_read(47 volatile rtems_unsigned32* _addr /* IN */46 uint32_t PCI_bus_read( 47 volatile uint32_t * _addr /* IN */ 48 48 ) 49 49 { 50 rtems_unsigned32data;50 uint32_t data; 51 51 52 52 data = *_addr; … … 59 59 */ 60 60 61 rtems_unsigned32Read_pci_device_register(62 rtems_unsigned32address61 uint32_t Read_pci_device_register( 62 uint32_t address 63 63 ) 64 64 { 65 rtems_unsigned32data;65 uint32_t data; 66 66 67 67 /* 68 68 * Write the PCI configuration address 69 69 */ 70 PCI_bus_write( (volatile rtems_unsigned32*)SCORE603E_PCI_IO_CFG_ADDR, address );70 PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_ADDR, address ); 71 71 72 72 /* … … 78 78 * read data 79 79 */ 80 data = PCI_bus_read( (volatile rtems_unsigned32*)SCORE603E_PCI_IO_CFG_DATA );80 data = PCI_bus_read( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_DATA ); 81 81 82 82 return data; … … 84 84 85 85 void Write_pci_device_register( 86 rtems_unsigned32address,87 rtems_unsigned32data86 uint32_t address, 87 uint32_t data 88 88 ) 89 89 { … … 91 91 * Write the PCI configuration address 92 92 */ 93 PCI_bus_write( (volatile rtems_unsigned32*)SCORE603E_PCI_IO_CFG_ADDR, address );93 PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_ADDR, address ); 94 94 95 95 /* … … 101 101 * write data 102 102 */ 103 PCI_bus_write( (volatile rtems_unsigned32*)SCORE603E_PCI_IO_CFG_DATA, data );103 PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_DATA, data ); 104 104 } 105 105 -
c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h
rffe6331 rdac4208 21 21 22 22 void PCI_bus_write( 23 volatile rtems_unsigned32* _addr,24 rtems_unsigned32_data23 volatile uint32_t * _addr, 24 uint32_t _data 25 25 ); 26 26 27 rtems_unsigned32PCI_bus_read(28 volatile rtems_unsigned32* _addr27 uint32_t PCI_bus_read( 28 volatile uint32_t * _addr 29 29 ); 30 30 31 rtems_unsigned32Read_pci_device_register(32 rtems_unsigned32address31 uint32_t Read_pci_device_register( 32 uint32_t address 33 33 ); 34 34 35 35 void Write_pci_device_register( 36 rtems_unsigned32address,37 rtems_unsigned32data36 uint32_t address, 37 uint32_t data 38 38 ); 39 39 -
c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
rffe6331 rdac4208 19 19 20 20 unsigned int SCORE603e_FLASH_Disable( 21 rtems_unsigned32area /* IN */21 uint32_t area /* IN */ 22 22 ) 23 23 { 24 rtems_unsigned8value;24 uint8_t value; 25 25 26 26 value = *SCORE603E_BOARD_CTRL_REG; … … 33 33 unsigned int SCORE603e_FLASH_verify_enable() 34 34 { 35 volatile rtems_unsigned8*Ctrl_Status_Register =35 volatile uint8_t *Ctrl_Status_Register = 36 36 (void *)SCORE603E_BOARD_CTRL_REG; 37 rtems_unsigned8ctrl_value;38 rtems_unsigned32pci_value;37 uint8_t ctrl_value; 38 uint32_t pci_value; 39 39 40 40 ctrl_value = *Ctrl_Status_Register; … … 60 60 61 61 unsigned int SCORE603e_FLASH_pci_reset_reg( 62 rtems_unsigned8reg,63 rtems_unsigned32cmask,64 rtems_unsigned32mask62 uint8_t reg, 63 uint32_t cmask, 64 uint32_t mask 65 65 ) 66 66 { 67 rtems_unsigned32pci_value;68 rtems_unsigned32value;67 uint32_t pci_value; 68 uint32_t value; 69 69 70 70 pci_value = Read_pci_device_register( reg ); … … 84 84 */ 85 85 unsigned int SCORE603e_FLASH_Enable_writes( 86 rtems_unsigned32area /* IN */86 uint32_t area /* IN */ 87 87 ) 88 88 { 89 rtems_unsigned8ctrl_value;90 rtems_unsigned32pci_value;89 uint8_t ctrl_value; 90 uint32_t pci_value; 91 91 92 92 ctrl_value = *SCORE603E_BOARD_CTRL_REG; -
c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
rffe6331 rdac4208 32 32 33 33 typedef struct { 34 rtems_unsigned32PCI_ID; /* 0x80030000 */35 rtems_unsigned32PCI_CSR; /* 0x80030004 */36 rtems_unsigned32PCI_CLASS; /* 0x80030008 */37 rtems_unsigned32PCI_MISC0; /* 0x8003000C */38 rtems_unsigned32PCI_BS; /* 0x80030010 */39 rtems_unsigned32Buf_0x80030014[ 0x0A ]; /* 0x80030014 */40 rtems_unsigned32PCI_MISC1; /* 0x8003003C */41 rtems_unsigned32Buf_0x80030040[ 0x30 ]; /* 0x80030040 */42 rtems_unsigned32LSI0_CTL; /* 0x80030100 */43 rtems_unsigned32LSI0_BS; /* 0x80030104 */44 rtems_unsigned32LSI0_BD; /* 0x80030108 */45 rtems_unsigned32LSI0_TO; /* 0x8003010C */46 rtems_unsigned32Buf_0x80030110; /* 0x80030110 */47 rtems_unsigned32LSI1_CTL; /* 0x80030114 */48 rtems_unsigned32LSI1_BS; /* 0x80030118 */49 rtems_unsigned32LSI1_BD; /* 0x8003011C */50 rtems_unsigned32LSI1_TO; /* 0x80030120 */51 rtems_unsigned32Buf_0x80030124; /* 0x80030124 */52 rtems_unsigned32LSI2_CTL; /* 0x80030128 */53 rtems_unsigned32LSI2_BS; /* 0x8003012C */54 rtems_unsigned32LSI2_BD; /* 0x80030130 */55 rtems_unsigned32LSI2_TO; /* 0x80030134 */56 rtems_unsigned32Buf_0x80030138; /* 0x80030138 */57 rtems_unsigned32LSI3_CTL; /* 0x8003013C */58 rtems_unsigned32LSI3_BS; /* 0x80030140 */59 rtems_unsigned32LSI3_BD; /* 0x80030144 */60 rtems_unsigned32LSI3_TO; /* 0x80030148 */61 rtems_unsigned32Buf_0x8003014C[ 0x09 ]; /* 0x8003014C */62 rtems_unsigned32SCYC_CTL; /* 0x80030170 */63 rtems_unsigned32SCYC_ADDR; /* 0x80030174 */64 rtems_unsigned32SCYC_EN; /* 0x80030178 */65 rtems_unsigned32SCYC_CMP; /* 0x8003017C */66 rtems_unsigned32SCYC_SWP; /* 0x80030180 */67 rtems_unsigned32LMISC; /* 0x80030184 */68 rtems_unsigned32SLSI; /* 0x80030188 */69 rtems_unsigned32L_CMDERR; /* 0x8003018C */70 rtems_unsigned32LAERR; /* 0x80030190 */71 rtems_unsigned32Buf_0x80030194[ 0x1B ]; /* 0x80030194 */72 rtems_unsigned32DCTL; /* 0x80030200 */73 rtems_unsigned32DTBC; /* 0x80030204 */74 rtems_unsigned32DLA; /* 0x80030208 */75 rtems_unsigned32Buf_0x8003020C; /* 0x8003020C */76 rtems_unsigned32DVA; /* 0x80030210 */77 rtems_unsigned32Buf_0x80030214; /* 0x80030214 */78 rtems_unsigned32DCPP; /* 0x80030218 */79 rtems_unsigned32Buf_0x8003021C; /* 0x8003021C */80 rtems_unsigned32DGCS; /* 0x80030220 */81 rtems_unsigned32D_LLUE; /* 0x80030224 */82 rtems_unsigned32Buf_0x80030228[ 0x36 ]; /* 0x80030228 */83 rtems_unsigned32LINT_EN; /* 0x80030300 */84 rtems_unsigned32LINT_STAT; /* 0x80030304 */85 rtems_unsigned32LINT_MAP0; /* 0x80030308 */86 rtems_unsigned32LINT_MAP1; /* 0x8003030C */87 rtems_unsigned32VINT_EN; /* 0x80030310 */88 rtems_unsigned32VINT_STAT; /* 0x80030314 */89 rtems_unsigned32VINT_MAP0; /* 0x80030318 */90 rtems_unsigned32VINT_MAP1; /* 0x8003031C */91 rtems_unsigned32STATID; /* 0x80030320 */92 rtems_unsigned32V1_STATID; /* 0x80030324 */93 rtems_unsigned32V2_STATID; /* 0x80030328 */94 rtems_unsigned32V3_STATID; /* 0x8003032C */95 rtems_unsigned32V4_STATID; /* 0x80030330 */96 rtems_unsigned32V5_STATID; /* 0x80030334 */97 rtems_unsigned32V6_STATID; /* 0x80030338 */98 rtems_unsigned32V7_STATID; /* 0x8003033C */99 rtems_unsigned32Buf_0x80030340[ 0x30 ]; /* 0x80030340 */100 rtems_unsigned32MAST_CTL; /* 0x80030400 */101 rtems_unsigned32MISC_CTL; /* 0x80030404 */102 rtems_unsigned32MISC_STAT; /* 0x80030408 */103 rtems_unsigned32USER_AM; /* 0x8003040C */104 rtems_unsigned32Buf_0x80030410[ 0x2bc ];/* 0x80030410 */105 rtems_unsigned32VSI0_CTL; /* 0x80030F00 */106 rtems_unsigned32VSI0_BS; /* 0x80030F04 */107 rtems_unsigned32VSI0_BD; /* 0x80030F08 */108 rtems_unsigned32VSI0_TO; /* 0x80030F0C */109 rtems_unsigned32Buf_0x80030f10; /* 0x80030F10 */110 rtems_unsigned32VSI1_CTL; /* 0x80030F14 */111 rtems_unsigned32VSI1_BS; /* 0x80030F18 */112 rtems_unsigned32VSI1_BD; /* 0x80030F1C */113 rtems_unsigned32VSI1_TO; /* 0x80030F20 */114 rtems_unsigned32Buf_0x80030F24; /* 0x80030F24 */115 rtems_unsigned32VSI2_CTL; /* 0x80030F28 */116 rtems_unsigned32VSI2_BS; /* 0x80030F2C */117 rtems_unsigned32VSI2_BD; /* 0x80030F30 */118 rtems_unsigned32VSI2_TO; /* 0x80030F34 */119 rtems_unsigned32Buf_0x80030F38; /* 0x80030F38 */120 rtems_unsigned32VSI3_CTL; /* 0x80030F3C */121 rtems_unsigned32VSI3_BS; /* 0x80030F40 */122 rtems_unsigned32VSI3_BD; /* 0x80030F44 */123 rtems_unsigned32VSI3_TO; /* 0x80030F48 */124 rtems_unsigned32Buf_0x80030F4C[ 0x9 ]; /* 0x80030F4C */125 rtems_unsigned32VRAI_CTL; /* 0x80030F70 */126 rtems_unsigned32VRAI_BS; /* 0x80030F74 */127 rtems_unsigned32Buf_0x80030F78[ 0x2 ]; /* 0x80030F78 */128 rtems_unsigned32VCSR_CTL; /* 0x80030F80 */129 rtems_unsigned32VCSR_TO; /* 0x80030F84 */130 rtems_unsigned32V_AMERR; /* 0x80030F88 */131 rtems_unsigned32VAERR; /* 0x80030F8C */132 rtems_unsigned32Buf_0x80030F90[ 0x19 ]; /* 0x80030F90 */133 rtems_unsigned32VCSR_CLR; /* 0x80030FF4 */134 rtems_unsigned32VCSR_SET; /* 0x80030FF8 */135 rtems_unsigned32VCSR_BS; /* 0x80030FFC */34 uint32_t PCI_ID; /* 0x80030000 */ 35 uint32_t PCI_CSR; /* 0x80030004 */ 36 uint32_t PCI_CLASS; /* 0x80030008 */ 37 uint32_t PCI_MISC0; /* 0x8003000C */ 38 uint32_t PCI_BS; /* 0x80030010 */ 39 uint32_t Buf_0x80030014[ 0x0A ]; /* 0x80030014 */ 40 uint32_t PCI_MISC1; /* 0x8003003C */ 41 uint32_t Buf_0x80030040[ 0x30 ]; /* 0x80030040 */ 42 uint32_t LSI0_CTL; /* 0x80030100 */ 43 uint32_t LSI0_BS; /* 0x80030104 */ 44 uint32_t LSI0_BD; /* 0x80030108 */ 45 uint32_t LSI0_TO; /* 0x8003010C */ 46 uint32_t Buf_0x80030110; /* 0x80030110 */ 47 uint32_t LSI1_CTL; /* 0x80030114 */ 48 uint32_t LSI1_BS; /* 0x80030118 */ 49 uint32_t LSI1_BD; /* 0x8003011C */ 50 uint32_t LSI1_TO; /* 0x80030120 */ 51 uint32_t Buf_0x80030124; /* 0x80030124 */ 52 uint32_t LSI2_CTL; /* 0x80030128 */ 53 uint32_t LSI2_BS; /* 0x8003012C */ 54 uint32_t LSI2_BD; /* 0x80030130 */ 55 uint32_t LSI2_TO; /* 0x80030134 */ 56 uint32_t Buf_0x80030138; /* 0x80030138 */ 57 uint32_t LSI3_CTL; /* 0x8003013C */ 58 uint32_t LSI3_BS; /* 0x80030140 */ 59 uint32_t LSI3_BD; /* 0x80030144 */ 60 uint32_t LSI3_TO; /* 0x80030148 */ 61 uint32_t Buf_0x8003014C[ 0x09 ]; /* 0x8003014C */ 62 uint32_t SCYC_CTL; /* 0x80030170 */ 63 uint32_t SCYC_ADDR; /* 0x80030174 */ 64 uint32_t SCYC_EN; /* 0x80030178 */ 65 uint32_t SCYC_CMP; /* 0x8003017C */ 66 uint32_t SCYC_SWP; /* 0x80030180 */ 67 uint32_t LMISC; /* 0x80030184 */ 68 uint32_t SLSI; /* 0x80030188 */ 69 uint32_t L_CMDERR; /* 0x8003018C */ 70 uint32_t LAERR; /* 0x80030190 */ 71 uint32_t Buf_0x80030194[ 0x1B ]; /* 0x80030194 */ 72 uint32_t DCTL; /* 0x80030200 */ 73 uint32_t DTBC; /* 0x80030204 */ 74 uint32_t DLA; /* 0x80030208 */ 75 uint32_t Buf_0x8003020C; /* 0x8003020C */ 76 uint32_t DVA; /* 0x80030210 */ 77 uint32_t Buf_0x80030214; /* 0x80030214 */ 78 uint32_t DCPP; /* 0x80030218 */ 79 uint32_t Buf_0x8003021C; /* 0x8003021C */ 80 uint32_t DGCS; /* 0x80030220 */ 81 uint32_t D_LLUE; /* 0x80030224 */ 82 uint32_t Buf_0x80030228[ 0x36 ]; /* 0x80030228 */ 83 uint32_t LINT_EN; /* 0x80030300 */ 84 uint32_t LINT_STAT; /* 0x80030304 */ 85 uint32_t LINT_MAP0; /* 0x80030308 */ 86 uint32_t LINT_MAP1; /* 0x8003030C */ 87 uint32_t VINT_EN; /* 0x80030310 */ 88 uint32_t VINT_STAT; /* 0x80030314 */ 89 uint32_t VINT_MAP0; /* 0x80030318 */ 90 uint32_t VINT_MAP1; /* 0x8003031C */ 91 uint32_t STATID; /* 0x80030320 */ 92 uint32_t V1_STATID; /* 0x80030324 */ 93 uint32_t V2_STATID; /* 0x80030328 */ 94 uint32_t V3_STATID; /* 0x8003032C */ 95 uint32_t V4_STATID; /* 0x80030330 */ 96 uint32_t V5_STATID; /* 0x80030334 */ 97 uint32_t V6_STATID; /* 0x80030338 */ 98 uint32_t V7_STATID; /* 0x8003033C */ 99 uint32_t Buf_0x80030340[ 0x30 ]; /* 0x80030340 */ 100 uint32_t MAST_CTL; /* 0x80030400 */ 101 uint32_t MISC_CTL; /* 0x80030404 */ 102 uint32_t MISC_STAT; /* 0x80030408 */ 103 uint32_t USER_AM; /* 0x8003040C */ 104 uint32_t Buf_0x80030410[ 0x2bc ];/* 0x80030410 */ 105 uint32_t VSI0_CTL; /* 0x80030F00 */ 106 uint32_t VSI0_BS; /* 0x80030F04 */ 107 uint32_t VSI0_BD; /* 0x80030F08 */ 108 uint32_t VSI0_TO; /* 0x80030F0C */ 109 uint32_t Buf_0x80030f10; /* 0x80030F10 */ 110 uint32_t VSI1_CTL; /* 0x80030F14 */ 111 uint32_t VSI1_BS; /* 0x80030F18 */ 112 uint32_t VSI1_BD; /* 0x80030F1C */ 113 uint32_t VSI1_TO; /* 0x80030F20 */ 114 uint32_t Buf_0x80030F24; /* 0x80030F24 */ 115 uint32_t VSI2_CTL; /* 0x80030F28 */ 116 uint32_t VSI2_BS; /* 0x80030F2C */ 117 uint32_t VSI2_BD; /* 0x80030F30 */ 118 uint32_t VSI2_TO; /* 0x80030F34 */ 119 uint32_t Buf_0x80030F38; /* 0x80030F38 */ 120 uint32_t VSI3_CTL; /* 0x80030F3C */ 121 uint32_t VSI3_BS; /* 0x80030F40 */ 122 uint32_t VSI3_BD; /* 0x80030F44 */ 123 uint32_t VSI3_TO; /* 0x80030F48 */ 124 uint32_t Buf_0x80030F4C[ 0x9 ]; /* 0x80030F4C */ 125 uint32_t VRAI_CTL; /* 0x80030F70 */ 126 uint32_t VRAI_BS; /* 0x80030F74 */ 127 uint32_t Buf_0x80030F78[ 0x2 ]; /* 0x80030F78 */ 128 uint32_t VCSR_CTL; /* 0x80030F80 */ 129 uint32_t VCSR_TO; /* 0x80030F84 */ 130 uint32_t V_AMERR; /* 0x80030F88 */ 131 uint32_t VAERR; /* 0x80030F8C */ 132 uint32_t Buf_0x80030F90[ 0x19 ]; /* 0x80030F90 */ 133 uint32_t VCSR_CLR; /* 0x80030FF4 */ 134 uint32_t VCSR_SET; /* 0x80030FF8 */ 135 uint32_t VCSR_BS; /* 0x80030FFC */ 136 136 } Universe_Memory; 137 137 … … 156 156 void initialize_universe() 157 157 { 158 rtems_unsigned32jumper_selection;159 rtems_unsigned32pci_id;158 uint32_t jumper_selection; 159 uint32_t pci_id; 160 160 #if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE) 161 volatile rtems_unsigned32universe_temp_value;161 volatile uint32_t universe_temp_value; 162 162 #endif 163 163 … … 166 166 */ 167 167 jumper_selection = PCI_bus_read( 168 (volatile rtems_unsigned32*)SCORE603E_VME_JUMPER_ADDR );168 (volatile uint32_t*)SCORE603E_VME_JUMPER_ADDR ); 169 169 jumper_selection = (jumper_selection >> 3) & 0x1f; 170 170 … … 250 250 */ 251 251 void set_vme_base_address ( 252 rtems_unsigned32base_address252 uint32_t base_address 253 253 ) 254 254 { 255 volatile rtems_unsigned32temp;255 volatile uint32_t temp; 256 256 257 257 /* … … 282 282 * Gets the VME base address 283 283 */ 284 rtems_unsigned32get_vme_base_address ()284 uint32_t get_vme_base_address () 285 285 { 286 volatile rtems_unsigned32temp;286 volatile uint32_t temp; 287 287 288 288 temp = PCI_bus_read( &UNIVERSE->VSI0_BS ); … … 291 291 } 292 292 293 rtems_unsigned32get_vme_slave_size()293 uint32_t get_vme_slave_size() 294 294 { 295 volatile rtems_unsigned32temp;295 volatile uint32_t temp; 296 296 temp = PCI_bus_read( &UNIVERSE->VSI0_BD); 297 297 temp &= 0xFFFFF000; … … 304 304 * Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF) 305 305 */ 306 void set_vme_slave_size ( rtems_unsigned32size)306 void set_vme_slave_size (uint32_t size) 307 307 { 308 volatile rtems_unsigned32temp;308 volatile uint32_t temp; 309 309 310 310 if (size<0) -
c/src/lib/libbsp/powerpc/score603e/clock/clock.c
rffe6331 rdac4208 33 33 */ 34 34 35 volatile rtems_unsigned32Clock_driver_ticks;35 volatile uint32_t Clock_driver_ticks; 36 36 37 37 /* … … 39 39 */ 40 40 41 rtems_unsigned32Clock_Decrementer_value;41 uint32_t Clock_Decrementer_value; 42 42 43 43 rtems_isr_entry Old_ticker; … … 204 204 ) 205 205 { 206 rtems_unsigned32isrlevel;206 uint32_t isrlevel; 207 207 rtems_libio_ioctl_args_t *args = pargp; 208 208 -
c/src/lib/libbsp/powerpc/score603e/console/85c30.c
rffe6331 rdac4208 131 131 ) 132 132 { 133 rtems_unsigned16value;133 uint16_t value; 134 134 volatile unsigned char *ctrl; 135 135 Console_Protocol *Setup; 136 rtems_unsigned16baud_constant;136 uint16_t baud_constant; 137 137 138 138 Setup = Port->Protocol; … … 311 311 { 312 312 unsigned char z8530_status; 313 rtems_unsigned32isrlevel;313 uint32_t isrlevel; 314 314 315 315 rtems_interrupt_disable( isrlevel ); … … 343 343 volatile unsigned char *csr; 344 344 unsigned char z8530_status; 345 rtems_unsigned8data;345 uint8_t data; 346 346 347 347 csr = Port->ctrl; … … 381 381 ) 382 382 { 383 rtems_unsigned16status;383 uint16_t status; 384 384 volatile Console_Protocol *Protocol; 385 385 unsigned char data; -
c/src/lib/libbsp/powerpc/score603e/console/console.c
rffe6331 rdac4208 82 82 char *s; 83 83 int console; 84 volatile rtems_unsigned8*csr;84 volatile uint8_t *csr; 85 85 86 86 console = USE_FOR_CONSOLE; … … 188 188 int i; 189 189 volatile Ring_buffer_t *buffer; 190 rtems_unsigned32ch;190 uint32_t ch; 191 191 192 192 for ( i=0 ; i < NUM_Z85C30_PORTS ; i++ ) { … … 333 333 { 334 334 int nwrite = 0; 335 volatile rtems_unsigned8*csr;335 volatile uint8_t *csr; 336 336 int port = minor; 337 337 … … 451 451 { 452 452 Console_Protocol *protocol; 453 rtems_unsigned32isrlevel;453 uint32_t isrlevel; 454 454 455 455 protocol = Port->Protocol; -
c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h
rffe6331 rdac4208 72 72 73 73 typedef struct { 74 rtems_unsigned32baud_rate; /* baud rate value */74 uint32_t baud_rate; /* baud rate value */ 75 75 CONSOLE_Stop_bits stop_bits; 76 76 CONSOLE_Parity parity; … … 91 91 */ 92 92 typedef struct { 93 rtems_unsigned32vector;94 rtems_unsigned32clock_frequency;95 rtems_unsigned16clock_x;93 uint32_t vector; 94 uint32_t clock_frequency; 95 uint16_t clock_x; 96 96 CONSOLE_Clock_speed clock_speed; 97 97 } Chip_85C30_info; -
c/src/lib/libbsp/powerpc/score603e/include/bsp.h
rffe6331 rdac4208 94 94 #define Cause_tm27_intr() \ 95 95 do { \ 96 u nsigned32_clicks = 8; \96 uint32_t _clicks = 8; \ 97 97 asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ 98 98 } while (0) … … 101 101 #define Clear_tm27_intr() \ 102 102 do { \ 103 u nsigned32_clicks = 0xffffffff; \103 uint32_t _clicks = 0xffffffff; \ 104 104 asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ 105 105 } while (0) … … 107 107 #define Lower_tm27_intr() \ 108 108 do { \ 109 u nsigned32_msr = 0; \109 uint32_t _msr = 0; \ 110 110 _ISR_Set_level( 0 ); \ 111 111 asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ … … 201 201 202 202 void initialize_PCI_bridge (); 203 rtems_unsigned16read_and_clear_irq ();203 uint16_t read_and_clear_irq (); 204 204 void set_irq_mask( 205 rtems_unsigned16value206 ); 207 rtems_unsigned16get_irq_mask();205 uint16_t value 206 ); 207 uint16_t get_irq_mask(); 208 208 209 209 /* … … 213 213 214 214 void set_irq_mask( 215 rtems_unsigned16value216 ); 217 218 rtems_unsigned16get_irq_mask();215 uint16_t value 216 ); 217 218 uint16_t get_irq_mask(); 219 219 220 220 void unmask_irq( 221 rtems_unsigned16irq_idx221 uint16_t irq_idx 222 222 ); 223 223 224 224 void init_irq_data_register(); 225 225 226 rtems_unsigned16read_and_clear_PMC_irq(227 rtems_unsigned16irq226 uint16_t read_and_clear_PMC_irq( 227 uint16_t irq 228 228 ); 229 229 230 230 rtems_boolean Is_PMC_IRQ( 231 rtems_unsigned32pmc_irq,232 rtems_unsigned16status_word233 ); 234 235 rtems_unsigned16read_and_clear_irq();231 uint32_t pmc_irq, 232 uint16_t status_word 233 ); 234 235 uint16_t read_and_clear_irq(); 236 236 237 237 /* … … 243 243 244 244 unsigned int SCORE603e_FLASH_Disable( 245 rtems_unsigned32unused245 uint32_t unused 246 246 ); 247 247 unsigned int SCORE603e_FLASH_verify_enable(); 248 248 unsigned int SCORE603e_FLASH_Enable_writes( 249 rtems_unsigned32area /* Unused */249 uint32_t area /* Unused */ 250 250 ); 251 251 … … 259 259 extern rtems_configuration_table BSP_Configuration; /* owned by BSP */ 260 260 extern rtems_cpu_table Cpu_table; /* owned by BSP */ 261 extern rtems_unsigned32bsp_isr_level;261 extern uint32_t bsp_isr_level; 262 262 263 263 #endif /* ASM */ -
c/src/lib/libbsp/powerpc/score603e/include/gen2.h
rffe6331 rdac4208 33 33 #define SCORE603E_TIMER_PORT_A 0xfd000004 34 34 35 #define SCORE603E_BOARD_CTRL_REG ((volatile rtems_unsigned8*)0xfd00002c)35 #define SCORE603E_BOARD_CTRL_REG ((volatile uint8_t*)0xfd00002c) 36 36 #define SCORE603E_BRD_FLASH_DISABLE_MASK 0x40 37 37 38 #define SCORE603E_85C30_CTRL_0 ((volatile rtems_unsigned8*)0xfe200020)39 #define SCORE603E_85C30_DATA_0 ((volatile rtems_unsigned8*)0xfe200024)40 #define SCORE603E_85C30_CTRL_1 ((volatile rtems_unsigned8*)0xfe200028)41 #define SCORE603E_85C30_DATA_1 ((volatile rtems_unsigned8*)0xfe20002c)42 #define SCORE603E_85C30_CTRL_2 ((volatile rtems_unsigned8*)0xfe200000)43 #define SCORE603E_85C30_DATA_2 ((volatile rtems_unsigned8*)0xfe200004)44 #define SCORE603E_85C30_CTRL_3 ((volatile rtems_unsigned8*)0xfe200008)45 #define SCORE603E_85C30_DATA_3 ((volatile rtems_unsigned8*)0xfe20000c)38 #define SCORE603E_85C30_CTRL_0 ((volatile uint8_t*)0xfe200020) 39 #define SCORE603E_85C30_DATA_0 ((volatile uint8_t*)0xfe200024) 40 #define SCORE603E_85C30_CTRL_1 ((volatile uint8_t*)0xfe200028) 41 #define SCORE603E_85C30_DATA_1 ((volatile uint8_t*)0xfe20002c) 42 #define SCORE603E_85C30_CTRL_2 ((volatile uint8_t*)0xfe200000) 43 #define SCORE603E_85C30_DATA_2 ((volatile uint8_t*)0xfe200004) 44 #define SCORE603E_85C30_CTRL_3 ((volatile uint8_t*)0xfe200008) 45 #define SCORE603E_85C30_DATA_3 ((volatile uint8_t*)0xfe20000c) 46 46 47 47 /* … … 55 55 56 56 #define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \ 57 ((volatile rtems_unsigned32*)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))57 ((volatile uint32_t*)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset )) 58 58 59 59 60 60 #define SCORE603E_PMC_SERIAL_ADDRESS( _offset ) \ 61 ((volatile rtems_unsigned8*)(SCORE603E_PCI_REGISTER_BASE + _offset))61 ((volatile uint8_t*)(SCORE603E_PCI_REGISTER_BASE + _offset)) 62 62 63 63 /* … … 151 151 * FPGA Interupt Address Definations. 152 152 */ 153 #define SCORE603E_FPGA_VECT_DATA ((volatile rtems_unsigned16*)0xfd000040)154 #define SCORE603E_FPGA_BIT1_15_0 ((volatile rtems_unsigned16*)0xfd000044)155 #define SCORE603E_FPGA_MASK_DATA ((volatile rtems_unsigned16*)0xfd000048)156 #define SCORE603E_FPGA_IRQ_INPUT ((volatile rtems_unsigned16*)0xfd00004c)153 #define SCORE603E_FPGA_VECT_DATA ((volatile uint16_t*)0xfd000040) 154 #define SCORE603E_FPGA_BIT1_15_0 ((volatile uint16_t*)0xfd000044) 155 #define SCORE603E_FPGA_MASK_DATA ((volatile uint16_t*)0xfd000048) 156 #define SCORE603E_FPGA_IRQ_INPUT ((volatile uint16_t*)0xfd00004c) 157 157 158 158 /* -
c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c
rffe6331 rdac4208 25 25 { 26 26 #if (!SCORE603E_USE_DINK) 27 rtems_unsigned16mask, shift, data;27 uint16_t mask, shift, data; 28 28 29 29 shift = SCORE603E_85C30_0_IRQ - Score_IRQ_First; … … 42 42 43 43 void set_irq_mask( 44 rtems_unsigned16value44 uint16_t value 45 45 ) 46 46 { 47 rtems_unsigned16*loc;47 uint16_t *loc; 48 48 49 loc = ( rtems_unsigned16*)SCORE603E_FPGA_MASK_DATA;49 loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA; 50 50 51 51 *loc = value; 52 52 } 53 53 54 rtems_unsigned16get_irq_mask()54 uint16_t get_irq_mask() 55 55 { 56 rtems_unsigned16*loc;57 rtems_unsigned16value;56 uint16_t *loc; 57 uint16_t value; 58 58 59 loc = ( rtems_unsigned16*)SCORE603E_FPGA_MASK_DATA;59 loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA; 60 60 61 61 value = *loc; … … 65 65 66 66 void unmask_irq( 67 rtems_unsigned16irq_idx67 uint16_t irq_idx 68 68 ) 69 69 { 70 rtems_unsigned16value;71 rtems_unsigned32mask_idx = irq_idx;70 uint16_t value; 71 uint32_t mask_idx = irq_idx; 72 72 73 73 value = get_irq_mask(); … … 93 93 void init_irq_data_register() 94 94 { 95 rtems_unsigned32index;96 rtems_unsigned32i;95 uint32_t index; 96 uint32_t i; 97 97 98 98 #if (SCORE603E_USE_DINK) … … 110 110 } 111 111 112 rtems_unsigned16read_and_clear_PMC_irq(113 rtems_unsigned16irq112 uint16_t read_and_clear_PMC_irq( 113 uint16_t irq 114 114 ) 115 115 { 116 rtems_unsigned16status_word = irq;116 uint16_t status_word = irq; 117 117 118 118 status_word = (*SCORE603E_PMC_STATUS_ADDRESS); … … 122 122 123 123 rtems_boolean Is_PMC_IRQ( 124 rtems_unsigned32pmc_irq,125 rtems_unsigned16status_word124 uint32_t pmc_irq, 125 uint16_t status_word 126 126 ) 127 127 { … … 149 149 } 150 150 151 rtems_unsigned16read_and_clear_irq()151 uint16_t read_and_clear_irq() 152 152 { 153 rtems_unsigned16irq;153 uint16_t irq; 154 154 155 155 irq = (*SCORE603E_FPGA_VECT_DATA); -
c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
rffe6331 rdac4208 53 53 54 54 typedef struct { 55 rtems_unsigned32counter_1_100;56 rtems_unsigned32counter_hours;57 rtems_unsigned32counter_min;58 rtems_unsigned32counter_sec;59 rtems_unsigned32counter_month;60 rtems_unsigned32counter_date;61 rtems_unsigned32counter_year;62 rtems_unsigned32counter_day_of_week;63 64 rtems_unsigned32RAM_1_100;65 rtems_unsigned32RAM_hours;66 rtems_unsigned32RAM_month;67 rtems_unsigned32RAM_date;68 rtems_unsigned32RAM_year;69 rtems_unsigned32RAM_day_of_week;70 71 rtems_unsigned32interupt_status_mask;72 rtems_unsigned32command_register;55 uint32_t counter_1_100; 56 uint32_t counter_hours; 57 uint32_t counter_min; 58 uint32_t counter_sec; 59 uint32_t counter_month; 60 uint32_t counter_date; 61 uint32_t counter_year; 62 uint32_t counter_day_of_week; 63 64 uint32_t RAM_1_100; 65 uint32_t RAM_hours; 66 uint32_t RAM_month; 67 uint32_t RAM_date; 68 uint32_t RAM_year; 69 uint32_t RAM_day_of_week; 70 71 uint32_t interupt_status_mask; 72 uint32_t command_register; 73 73 }Harris_RTC; 74 74 … … 85 85 { 86 86 #if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE) 87 rtems_unsigned32value;87 uint32_t value; 88 88 89 89 /* … … 175 175 void instruction_cache_enable () 176 176 { 177 rtems_unsigned32value;177 uint32_t value; 178 178 179 179 /* … … 190 190 void data_cache_enable () 191 191 { 192 rtems_unsigned32value;192 uint32_t value; 193 193 194 194 /* -
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
rffe6331 rdac4208 30 30 rtems_configuration_table BSP_Configuration; 31 31 rtems_cpu_table Cpu_table; 32 rtems_unsigned32bsp_isr_level;32 uint32_t bsp_isr_level; 33 33 34 34 /* … … 37 37 38 38 void bsp_postdriver_hook(void); 39 void bsp_libc_init( void *, u nsigned32, int );39 void bsp_libc_init( void *, uint32_t, int ); 40 40 41 41 /*PAGE … … 50 50 { 51 51 extern int end; 52 rtems_unsigned32heap_start;53 rtems_unsigned32heap_size;54 55 heap_start = ( rtems_unsigned32) &end;52 uint32_t heap_start; 53 uint32_t heap_size; 54 55 heap_start = (uint32_t) &end; 56 56 if (heap_start & (CPU_ALIGNMENT-1)) 57 57 heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); … … 110 110 111 111 void initialize_PMC() { 112 volatile rtems_unsigned32*PMC_addr;113 rtems_unsigned8data;112 volatile uint32_t *PMC_addr; 113 uint8_t data; 114 114 115 115 #if (0) /* First Values sent */ … … 129 129 * Bit 0 and 1 HI cause Medium Loopback to occur. 130 130 */ 131 PMC_addr = (volatile rtems_unsigned32*)131 PMC_addr = (volatile uint32_t*) 132 132 SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 ); 133 133 data = *PMC_addr; … … 152 152 *PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f; 153 153 154 PMC_addr = (volatile rtems_unsigned32*)154 PMC_addr = (volatile uint32_t*) 155 155 SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 ); 156 156 data = *PMC_addr; … … 191 191 unsigned char *work_space_start; 192 192 unsigned int msr_value = 0x0000; 193 volatile rtems_unsigned32*ptr;193 volatile uint32_t *ptr; 194 194 195 195 rtems_bsp_delay( 1000 ); … … 216 216 Code = 0x4bf00002; 217 217 for (Address = 0x100; Address <= 0xe00; Address += 0x100) { 218 A_Vector = (u nsigned32*)Address;218 A_Vector = (uint32_t*)Address; 219 219 Code = 0x4bf00002 + Address; 220 220 *A_Vector = Code; … … 222 222 223 223 for (Address = 0x1000; Address <= 0x1400; Address += 0x100) { 224 A_Vector = (u nsigned32*)Address;224 A_Vector = (uint32_t*)Address; 225 225 Code = 0x4bf00002 + Address; 226 226 *A_Vector = Code; … … 249 249 */ 250 250 /* org dec_vector - rfi */ 251 ptr = ( rtems_unsigned32*)0x900;251 ptr = (uint32_t*)0x900; 252 252 *ptr = 0x4c000064; 253 253 -
c/src/lib/libbsp/powerpc/score603e/startup/genpvec.c
rffe6331 rdac4208 48 48 */ 49 49 EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS]; 50 rtems_unsigned16Nodes_Used;50 uint16_t Nodes_Used; 51 51 Chain_Control ISR_Array [NUM_LIRQ]; 52 52 … … 92 92 ) 93 93 { 94 rtems_unsigned16vec_idx = vector - Score_IRQ_First;95 rtems_unsigned32index;94 uint16_t vec_idx = vector - Score_IRQ_First; 95 uint32_t index; 96 96 97 97 assert (Nodes_Used < NUM_LIRQ_HANDLERS); … … 139 139 ) 140 140 { 141 rtems_unsigned16index;141 uint16_t index; 142 142 EE_ISR_Type *node; 143 rtems_unsigned16value;143 uint16_t value; 144 144 char err_msg[100]; 145 145 #if (HAS_PMC_PSC8) 146 rtems_unsigned16PMC_irq;147 rtems_unsigned16check_irq;148 rtems_unsigned16status_word;146 uint16_t PMC_irq; 147 uint16_t check_irq; 148 uint16_t status_word; 149 149 #endif 150 150 -
c/src/lib/libbsp/powerpc/score603e/startup/spurious.c
rffe6331 rdac4208 173 173 void bsp_spurious_initialize() 174 174 { 175 rtems_unsigned32trap;175 uint32_t trap; 176 176 177 177 for ( trap=0 ; trap < PPC_IRQ_LAST ; trap++ ) { … … 186 186 void bsp_set_trap_vectors( void ) 187 187 { 188 volatile rtems_unsigned32*ptr;188 volatile uint32_t *ptr; 189 189 190 190 /* reset_vector */ 191 ptr = ( rtems_unsigned32*)0x00100 ;191 ptr = (uint32_t*)0x00100 ; 192 192 *ptr = 0x48000000; 193 193 194 194 /* org mach_vector */ 195 ptr = ( rtems_unsigned32*)0x00200;195 ptr = (uint32_t*)0x00200; 196 196 *ptr = 0x48000000; 197 197 198 198 /* org prot_vector */ 199 ptr = ( rtems_unsigned32*)0x00300;199 ptr = (uint32_t*)0x00300; 200 200 *ptr = 0x48000000; 201 201 202 202 /* org isi_vector */ 203 ptr = ( rtems_unsigned32*)0x00400;203 ptr = (uint32_t*)0x00400; 204 204 *ptr = 0x48000000; 205 205 206 206 /* org ext_vector */ 207 ptr = ( rtems_unsigned32*)0x0500 ;207 ptr = (uint32_t*)0x0500 ; 208 208 *ptr = 0x48000000; 209 209 210 210 /* org align_vector */ 211 ptr = ( rtems_unsigned32*)0x00600 ;211 ptr = (uint32_t*)0x00600 ; 212 212 *ptr = 0x48000000; 213 213 214 214 /* org prog_vector */ 215 ptr = ( rtems_unsigned32*)0x00700 ;215 ptr = (uint32_t*)0x00700 ; 216 216 *ptr = 0x48000000; 217 217 218 218 /* org float_vector */ 219 ptr = ( rtems_unsigned32*)0x00800;219 ptr = (uint32_t*)0x00800; 220 220 *ptr = 0x48000000; 221 221 222 222 /* org dec_vector - rfi */ 223 ptr = ( rtems_unsigned32*)0x900;223 ptr = (uint32_t*)0x900; 224 224 *ptr = 0x4c000064; 225 225 226 226 /* org sys_vector */ 227 ptr = ( rtems_unsigned32*)0x0c00 ;227 ptr = (uint32_t*)0x0c00 ; 228 228 *ptr = 0x48000000; 229 229 230 230 /* org trace_vector */ 231 ptr = ( rtems_unsigned32*)0x0d00 ;231 ptr = (uint32_t*)0x0d00 ; 232 232 *ptr = 0x48000000; 233 233 234 234 /* org itm_vector */ 235 ptr = ( rtems_unsigned32*)0x01000 ;235 ptr = (uint32_t*)0x01000 ; 236 236 *ptr = 0x48000000; 237 237 238 238 /* org dltm_vector */ 239 ptr = ( rtems_unsigned32*)0x01100 ;239 ptr = (uint32_t*)0x01100 ; 240 240 *ptr = 0x48000000; 241 241 242 242 /* org dstm_vector */ 243 ptr = ( rtems_unsigned32*)0x1200 ;243 ptr = (uint32_t*)0x1200 ; 244 244 *ptr = 0x48000000; 245 245 246 246 /* org addr_vector */ 247 ptr = ( rtems_unsigned32*)0x1300 ;247 ptr = (uint32_t*)0x1300 ; 248 248 *ptr = 0x48000000; 249 249 250 250 /* org sysmgmt_vector */ 251 ptr = ( rtems_unsigned32*)0x1400 ;252 *ptr = 0x48000000; 253 254 } 255 256 257 258 259 251 ptr = (uint32_t*)0x1400 ; 252 *ptr = 0x48000000; 253 254 } 255 256 257 258 259 -
c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c
rffe6331 rdac4208 27 27 ) 28 28 { 29 volatile rtems_unsigned8*VME_interrupt_enable;30 rtems_unsigned8value;29 volatile uint8_t *VME_interrupt_enable; 30 uint8_t value; 31 31 32 32 #if 0 … … 52 52 ) 53 53 { 54 volatile rtems_unsigned8*VME_interrupt_enable;55 rtems_unsigned8value;54 volatile uint8_t *VME_interrupt_enable; 55 uint8_t value; 56 56 57 57 #if 0 -
c/src/lib/libbsp/powerpc/score603e/timer/timer.c
rffe6331 rdac4208 22 22 #include <bsp.h> 23 23 24 rtems_unsigned64Timer_driver_Start_time;24 uint64_t Timer_driver_Start_time; 25 25 26 26 rtems_boolean Timer_driver_Find_average_overhead; … … 46 46 int Read_timer() 47 47 { 48 rtems_unsigned64clicks;49 rtems_unsigned64total64;50 rtems_unsigned32total;48 uint64_t clicks; 49 uint64_t total64; 50 uint32_t total; 51 51 52 52 /* approximately CLOCK_SPEED clicks per microsecond */ … … 58 58 total64 = clicks - Timer_driver_Start_time; 59 59 60 assert( total64 <= 0xffffffff ); /* fits into a u nsigned32*/60 assert( total64 <= 0xffffffff ); /* fits into a uint32_t */ 61 61 62 total = ( rtems_unsigned32) total64;62 total = (uint32_t) total64; 63 63 64 64 if ( Timer_driver_Find_average_overhead == 1 ) -
c/src/lib/libbsp/powerpc/score603e/tod/tod.c
rffe6331 rdac4208 26 26 void ICM7170_GetTOD( 27 27 volatile unsigned char *imc1770_regs, 28 rtems_unsigned8icm1770_freq,28 uint8_t icm1770_freq, 29 29 rtems_time_of_day *rtc_tod 30 30 ); 31 31 void ICM7170_SetTOD( 32 32 volatile unsigned char *imc1770_regs, 33 rtems_unsigned8icm1770_freq,33 uint8_t icm1770_freq, 34 34 rtems_time_of_day *rtc_tod 35 35 ); … … 102 102 void ICM7170_GetTOD( 103 103 volatile unsigned char *imc1770_regs, 104 rtems_unsigned8icm1770_freq,104 uint8_t icm1770_freq, 105 105 rtems_time_of_day *rtc_tod 106 106 ) … … 138 138 void ICM7170_SetTOD( 139 139 volatile unsigned char *imc1770_regs, 140 rtems_unsigned8icm1770_freq,140 uint8_t icm1770_freq, 141 141 rtems_time_of_day *rtc_tod 142 142 )
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