- Timestamp:
- 05/19/11 12:30:00 (13 years ago)
- Branches:
- 4.11, 5, master
- Children:
- db56ac79
- Parents:
- 76134c5
- Location:
- c/src/lib/libbsp/arm/lpc24xx
- Files:
-
- 1 added
- 15 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/arm/lpc24xx/ChangeLog
r76134c5 rd74ed4a 1 2011-05-19 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * i2c/i2c-config.c: New file. 4 * include/lcd.h: Removed EMC definitions. 5 * misc/dma.c: Fixed initialization. 6 * include/i2c.h, include/io.h, include/lpc-ethernet-config.h, 7 include/lpc24xx.h, console/console-config.c, i2c/i2c.c, misc/io.c, 8 misc/lcd.c, startup/bspstart.c, startup/bspstarthooks.c: New pin 9 configuration API. 10 * Makefile.am, preinstall.am: Update. 11 1 12 2011-03-16 Joel Sherrill <joel.sherrill@oarcorp.com> 2 13 -
c/src/lib/libbsp/arm/lpc24xx/Makefile.am
r76134c5 rd74ed4a 38 38 include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h 39 39 include_bsp_HEADERS += ../shared/lpc/include/lpc-i2s.h 40 include_bsp_HEADERS += ../shared/lpc/include/lpc-emc.h 41 include_bsp_HEADERS += ../shared/lpc/include/lpc-dma.h 42 include_bsp_HEADERS += ../shared/lpc/include/lpc-lcd.h 40 43 include_bsp_HEADERS += include/irq.h 41 44 include_bsp_HEADERS += include/lpc24xx.h … … 132 135 133 136 # I2C 134 libbsp_a_SOURCES += i2c/i2c.c 137 libbsp_a_SOURCES += i2c/i2c.c \ 138 i2c/i2c-config.c 135 139 136 140 # Cache -
c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2008 11 * Embedded Brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * rtems@embedded-brains.de 10 * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be found in the file … … 25 26 #include <bsp/lpc24xx.h> 26 27 #include <bsp/irq.h> 28 #include <bsp/io.h> 27 29 28 static uint8_t lpc24xx_uart_ register(uint32_t addr, uint8_t i)30 static uint8_t lpc24xx_uart_get_register(uint32_t addr, uint8_t i) 29 31 { 30 32 volatile uint32_t *reg = (volatile uint32_t *) addr; … … 39 41 reg [i] = val; 40 42 } 43 44 #ifdef LPC24XX_CONFIG_UART_1 45 static bool lpc24xx_uart_probe_1(int minor) 46 { 47 static const lpc24xx_pin_range pins [] = { 48 LPC24XX_PIN_UART_1_TXD_P0_15, 49 LPC24XX_PIN_UART_1_RXD_P0_16, 50 LPC24XX_PIN_TERMINAL 51 }; 52 53 lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_CCLK); 54 lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); 55 56 return true; 57 } 58 #endif 59 60 #ifdef LPC24XX_CONFIG_UART_2 61 static bool lpc24xx_uart_probe_2(int minor) 62 { 63 static const lpc24xx_pin_range pins [] = { 64 LPC24XX_PIN_UART_2_TXD_P0_10, 65 LPC24XX_PIN_UART_2_RXD_P0_11, 66 LPC24XX_PIN_TERMINAL 67 }; 68 69 lpc24xx_module_enable(LPC24XX_MODULE_UART_2, LPC24XX_MODULE_CCLK); 70 lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); 71 72 return true; 73 } 74 #endif 75 76 #ifdef LPC24XX_CONFIG_UART_3 77 static bool lpc24xx_uart_probe_3(int minor) 78 { 79 static const lpc24xx_pin_range pins [] = { 80 LPC24XX_PIN_UART_3_TXD_P0_0, 81 LPC24XX_PIN_UART_3_RXD_P0_1, 82 LPC24XX_PIN_TERMINAL 83 }; 84 85 lpc24xx_module_enable(LPC24XX_MODULE_UART_3, LPC24XX_MODULE_CCLK); 86 lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); 87 88 return true; 89 } 90 #endif 41 91 42 92 rtems_device_minor_number Console_Port_Minor = 0; … … 56 106 .ulCtrlPort2 = 0, 57 107 .ulDataPort = UART0_BASE_ADDR, 58 .getRegister = lpc24xx_uart_ register,108 .getRegister = lpc24xx_uart_get_register, 59 109 .setRegister = lpc24xx_uart_set_register, 60 110 .getData = NULL, … … 69 119 .deviceType = SERIAL_NS16550, 70 120 .pDeviceFns = &ns16550_fns, 71 .deviceProbe = NULL,121 .deviceProbe = lpc24xx_uart_probe_1, 72 122 .pDeviceFlow = NULL, 73 123 .ulMargin = 16, … … 77 127 .ulCtrlPort2 = 0, 78 128 .ulDataPort = UART1_BASE_ADDR, 79 .getRegister = lpc24xx_uart_ register,129 .getRegister = lpc24xx_uart_get_register, 80 130 .setRegister = lpc24xx_uart_set_register, 81 131 .getData = NULL, … … 90 140 .deviceType = SERIAL_NS16550, 91 141 .pDeviceFns = &ns16550_fns, 92 .deviceProbe = NULL,142 .deviceProbe = lpc24xx_uart_probe_2, 93 143 .pDeviceFlow = NULL, 94 144 .ulMargin = 16, … … 98 148 .ulCtrlPort2 = 0, 99 149 .ulDataPort = UART2_BASE_ADDR, 100 .getRegister = lpc24xx_uart_ register,150 .getRegister = lpc24xx_uart_get_register, 101 151 .setRegister = lpc24xx_uart_set_register, 102 152 .getData = NULL, … … 111 161 .deviceType = SERIAL_NS16550, 112 162 .pDeviceFns = &ns16550_fns, 113 .deviceProbe = NULL,163 .deviceProbe = lpc24xx_uart_probe_3, 114 164 .pDeviceFlow = NULL, 115 165 .ulMargin = 16, … … 119 169 .ulCtrlPort2 = 0, 120 170 .ulDataPort = UART3_BASE_ADDR, 121 .getRegister = lpc24xx_uart_ register,171 .getRegister = lpc24xx_uart_get_register, 122 172 .setRegister = lpc24xx_uart_set_register, 123 173 .getData = NULL, … … 129 179 }; 130 180 131 #define LPC24XX_UART_ NUMBER\181 #define LPC24XX_UART_COUNT \ 132 182 (sizeof(Console_Port_Tbl) / sizeof(Console_Port_Tbl [0])) 133 183 134 unsigned long Console_Port_Count = LPC24XX_UART_ NUMBER;184 unsigned long Console_Port_Count = LPC24XX_UART_COUNT; 135 185 136 console_data Console_Port_Data [LPC24XX_UART_ NUMBER];186 console_data Console_Port_Data [LPC24XX_UART_COUNT]; -
c/src/lib/libbsp/arm/lpc24xx/i2c/i2c.c
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2009 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 20 21 */ 21 22 22 #include <rtems.h>23 24 23 #include <bsp.h> 25 24 #include <bsp/i2c.h> 26 #include <bsp/io.h>27 25 #include <bsp/irq.h> 28 26 #include <bsp/irq-generic.h> 29 #include <bsp/lpc24xx.h>30 27 #include <bsp/system-clocks.h> 31 28 … … 33 30 34 31 #include <rtems/status-checks.h> 35 36 typedef struct {37 rtems_libi2c_bus_t bus;38 volatile lpc24xx_i2c *regs;39 unsigned index;40 unsigned config;41 rtems_vector_number vector;42 rtems_id state_update;43 uint8_t * volatile data;44 uint8_t * volatile end;45 } lpc24xx_i2c_bus_entry;46 32 47 33 static void lpc24xx_i2c_handler(void *arg) … … 132 118 RTEMS_CHECK_SC(sc, "enable module"); 133 119 134 /* IOconfiguration */135 sc = lpc24xx_ io_config(LPC24XX_MODULE_I2C_0 + e->index, e->config);136 RTEMS_CHECK_SC(sc, " IOconfiguration");120 /* Pin configuration */ 121 sc = lpc24xx_pin_config(e->pins, LPC24XX_PIN_SET_FUNCTION); 122 RTEMS_CHECK_SC(sc, "pin configuration"); 137 123 138 124 /* Clock high and low duty cycles */ … … 328 314 } 329 315 330 staticconst rtems_libi2c_bus_ops_t lpc24xx_i2c_ops = {316 const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops = { 331 317 .init = lpc24xx_i2c_init, 332 318 .send_start = lpc24xx_i2c_send_start, … … 337 323 .ioctl = lpc24xx_i2c_ioctl 338 324 }; 339 340 #ifdef LPC24XX_CONFIG_I2C_0341 static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_0 = {342 .bus = {343 .ops = &lpc24xx_i2c_ops,344 .size = sizeof(lpc24xx_i2c_bus_entry)345 },346 .regs = (volatile lpc24xx_i2c *) I2C0_BASE_ADDR,347 .index = 0,348 .config = LPC24XX_CONFIG_I2C_0,349 .vector = LPC24XX_IRQ_I2C_0350 };351 352 rtems_libi2c_bus_t * const lpc24xx_i2c_0 =353 (rtems_libi2c_bus_t *) &lpc24xx_i2c_entry_0;354 #endif355 356 #ifdef LPC24XX_CONFIG_I2C_1357 static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_1 = {358 .bus = {359 .ops = &lpc24xx_i2c_ops,360 .size = sizeof(lpc24xx_i2c_bus_entry)361 },362 .regs = (volatile lpc24xx_i2c *) I2C1_BASE_ADDR,363 .index = 1,364 .config = LPC24XX_CONFIG_I2C_1,365 .vector = LPC24XX_IRQ_I2C_1366 };367 368 rtems_libi2c_bus_t * const lpc24xx_i2c_1 =369 (rtems_libi2c_bus_t *) &lpc24xx_i2c_entry_1;370 #endif371 372 #ifdef LPC24XX_CONFIG_I2C_2373 static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_2 = {374 .bus = {375 .ops = &lpc24xx_i2c_ops,376 .size = sizeof(lpc24xx_i2c_bus_entry)377 },378 .regs = (volatile lpc24xx_i2c *) I2C2_BASE_ADDR,379 .index = 2,380 .config = LPC24XX_CONFIG_I2C_2,381 .vector = LPC24XX_IRQ_I2C_2382 };383 384 rtems_libi2c_bus_t * const lpc24xx_i2c_2 =385 (rtems_libi2c_bus_t *) &lpc24xx_i2c_entry_2;386 #endif -
c/src/lib/libbsp/arm/lpc24xx/include/i2c.h
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2009 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 23 24 #define LIBBSP_ARM_LPC24XX_I2C_H 24 25 26 #include <rtems.h> 25 27 #include <rtems/libi2c.h> 28 29 #include <bsp/io.h> 30 #include <bsp/lpc24xx.h> 26 31 27 32 #ifdef __cplusplus … … 39 44 */ 40 45 41 extern rtems_libi2c_bus_t * const lpc24xx_i2c_0; 46 typedef struct { 47 rtems_libi2c_bus_t bus; 48 volatile lpc24xx_i2c *regs; 49 size_t index; 50 const lpc24xx_pin_range *pins; 51 rtems_vector_number vector; 52 rtems_id state_update; 53 uint8_t *volatile data; 54 uint8_t *volatile end; 55 } lpc24xx_i2c_bus_entry; 42 56 43 extern rtems_libi2c_bus_t * const lpc24xx_i2c_1;57 extern const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops; 44 58 45 extern rtems_libi2c_bus_t * const lpc24xx_i2c_2; 59 extern rtems_libi2c_bus_t *const lpc24xx_i2c_0; 60 61 extern rtems_libi2c_bus_t *const lpc24xx_i2c_1; 62 63 extern rtems_libi2c_bus_t *const lpc24xx_i2c_2; 46 64 47 65 /** @} */ -
c/src/lib/libbsp/arm/lpc24xx/include/io.h
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2009 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 37 38 * 38 39 * @brief Input and output module. 39 *40 * <table>41 * <tr><th>Module</th><th>Configuration</th><th>First Pin</th><th>Last Pin</th></tr>42 * <tr><td>UART 0</td><td>0</td><td>P0.2</td><td>P0.3</td></tr>43 * <tr><td rowspan=3>UART 1</td><td>0</td><td>P0.15</td><td>P0.16</td></tr>44 * <tr><td>1</td><td>P2.0</td><td>P2.1</td></tr>45 * <tr><td>2</td><td>P3.16</td><td>P3.17</td></tr>46 * <tr><td rowspan=3>UART 2</td><td>0</td><td>P0.10</td><td>P0.11</td></tr>47 * <tr><td>1</td><td>P2.8</td><td>P2.9</td></tr>48 * <tr><td>2</td><td>P4.22</td><td>P4.23</td></tr>49 * <tr><td rowspan=3>UART 3</td><td>0</td><td>P0.0</td><td>P0.1</td></tr>50 * <tr><td>1</td><td>P0.25</td><td>P0.26</td></tr>51 * <tr><td>2</td><td>P4.28</td><td>P4.29</td></tr>52 * <tr><td rowspan=5>ETHERNET</td><td>0</td><td>P1.0</td><td>P1.17</td></tr>53 * <tr><td rowspan=4>1</td><td>P1.0</td><td>P1.1</td></tr>54 * <tr><td>P1.4</td><td>P1.4</td></tr>55 * <tr><td>P1.8</td><td>P1.10</td></tr>56 * <tr><td>P1.14</td><td>P1.17</td></tr>57 * <tr><td rowspan=4>ADC</td><td>0</td><td>P0.12</td><td>P0.13</td></tr>58 * <tr><td>1</td><td>P0.23</td><td>P0.25</td></tr>59 * <tr><td rowspan=2>2</td><td>P0.26</td><td>P0.26</td></tr>60 * <tr><td>P1.30</td><td>P1.31</td></tr>61 * <tr><td>I2C 0</td><td>0</td><td>P0.27</td><td>P0.28</td></tr>62 * <tr><td rowspan=3>I2C 1</td><td>0</td><td>P0.0</td><td>P0.1</td></tr>63 * <tr><td>1</td><td>P0.19</td><td>P0.20</td></tr>64 * <tr><td>2</td><td>P2.14</td><td>P2.15</td></tr>65 * <tr><td rowspan=3>I2C 2</td><td>0</td><td>P0.10</td><td>P0.11</td></tr>66 * <tr><td>1</td><td>P2.30</td><td>P2.31</td></tr>67 * <tr><td>2</td><td>P4.20</td><td>P4.21</td></tr>68 * <tr><td rowspan=3>I2S</td><td>0</td><td>P0.4</td><td>P0.9</td></tr>69 * <tr><td rowspan=2>1</td><td>P0.23</td><td>P0.25</td></tr>70 * <tr><td>P2.11</td><td>P2.13</td></tr>71 * <tr><td rowspan=5>SSP 0</td><td>0</td><td>P0.15</td><td>P0.18</td></tr>72 * <tr><td rowspan=2>1</td><td>P1.20</td><td>P0.21</td></tr>73 * <tr><td>P1.23</td><td>P0.24</td></tr>74 * <tr><td rowspan=2>2</td><td>P2.22</td><td>P2.23</td></tr>75 * <tr><td>P2.26</td><td>P2.27</td></tr>76 * <tr><td rowspan=5>SSP 1</td><td>0</td><td>P0.6</td><td>P0.9</td></tr>77 * <tr><td rowspan=3>1</td><td>P0.12</td><td>P0.13</td></tr>78 * <tr><td>P0.14</td><td>P0.14</td></tr>79 * <tr><td>P1.31</td><td>P1.31</td></tr>80 * <tr><td>2</td><td>P4.20</td><td>P4.23</td></tr>81 * <tr><td rowspan=2>USB</td><td rowspan=2>0</td><td>P0.29</td><td>P0.30</td></tr>82 * <tr><td>P1.19</td><td>P1.19</td></tr>83 * <tr><td>SPI</td><td>0</td><td>P0.15</td><td>P0.18</td></tr>84 * <tr><td>PWM 1</td><td>0</td><td>P2.0</td><td>P2.0</td></tr>85 * <tr><td rowspan=11>LCD</td><td rowspan=6>0</td><td>P0.4</td><td>P0.9</td></tr>86 * <tr><td>P1.20</td><td>P1.29</td></tr>87 * <tr><td>P2.0</td><td>P2.3</td></tr>88 * <tr><td>P2.5</td><td>P2.9</td></tr>89 * <tr><td>P2.12</td><td>P2.13</td></tr>90 * <tr><td>P4.28</td><td>P4.29</td></tr>91 * <tr><td rowspan=5>1</td><td>P1.20</td><td>P1.29</td></tr>92 * <tr><td>P2.0</td><td>P2.3</td></tr>93 * <tr><td>P2.5</td><td>P2.9</td></tr>94 * <tr><td>P2.12</td><td>P2.13</td></tr>95 * <tr><td>P4.28</td><td>P4.29</td></tr>96 * <tr><td>DAC</td><td>0</td><td>P0.26</td><td>P0.26</td></tr>97 * </table>98 40 * 99 41 * @{ … … 183 125 ); 184 126 185 /**186 * @brief Applies the configuration with index @a config for the @a module.187 *188 * The pin mode will not be altered.189 *190 * @retval RTEMS_SUCCESSFUL Successful operation.191 * @retval RTEMS_INVALID_ID Invalid module or configuration.192 */193 rtems_status_code lpc24xx_io_config(194 lpc24xx_module module,195 unsigned config196 );197 198 /**199 * @brief Releases the configuration with index @a config for the @a module.200 *201 * The pins are set to general purpose IO function. The pin mode will not be202 * altered.203 *204 * @retval RTEMS_SUCCESSFUL Successful operation.205 * @retval RTEMS_INVALID_ID Invalid module or configuration.206 */207 rtems_status_code lpc24xx_io_release(208 lpc24xx_module module,209 unsigned config210 );211 212 127 rtems_status_code lpc24xx_gpio_config( 213 128 unsigned index, … … 256 171 } 257 172 173 typedef enum { 174 /** 175 * @brief Sets the pin function. 176 */ 177 LPC24XX_PIN_SET_FUNCTION = 0, 178 179 /** 180 * @brief Checks if all pins are configured with the specified function. 181 */ 182 LPC24XX_PIN_CHECK_FUNCTION, 183 184 /** 185 * @brief Configures the pins as input. 186 */ 187 LPC24XX_PIN_SET_INPUT, 188 189 /** 190 * @brief Checks if all pins are configured as input. 191 */ 192 LPC24XX_PIN_CHECK_INPUT 193 } lpc24xx_pin_action; 194 195 typedef union { 196 struct { 197 uint16_t port : 3; 198 uint16_t index_begin : 5; 199 uint16_t index_last : 5; 200 uint16_t function : 3; 201 } fields; 202 uint16_t value; 203 } lpc24xx_pin_range; 204 205 #define LPC24XX_PIN_FUNCTION_00 0x0 206 #define LPC24XX_PIN_FUNCTION_01 0x1 207 #define LPC24XX_PIN_FUNCTION_10 0x2 208 #define LPC24XX_PIN_FUNCTION_11 0x3 209 210 #define LPC24XX_PIN(p, i, f) { { p, i, i, f } } 211 212 #define LPC24XX_PIN_RANGE(p, i, j, f) { { p, i, j, f } } 213 214 #define LPC24XX_PIN_TERMINAL { { 0x3, 0x1f, 0x1f, 0x3 } } 215 216 /** 217 * @brief Performs the @a action with the @a pins 218 * 219 * @code 220 * #include <assert.h> 221 * #include <bsp/io.h> 222 * 223 * void example(void) 224 * { 225 * static const lpc24xx_pin_range pins [] = { 226 * LPC24XX_PIN_I2S_RX_CLK_P0_4, 227 * LPC24XX_PIN_I2S_RX_WS_P0_5, 228 * LPC24XX_PIN_I2S_RX_SDA_P0_6, 229 * LPC24XX_PIN_I2S_TX_CLK_P0_7, 230 * LPC24XX_PIN_I2S_TX_WS_P0_8, 231 * LPC24XX_PIN_I2S_TX_SDA_P0_9, 232 * LPC24XX_PIN_TERMINAL 233 * }; 234 * rtems_status_code sc = RTEMS_SUCCESSFUL; 235 * 236 * sc = lpc24xx_module_enable(LPC24XX_MODULE_I2S, LPC24XX_MODULE_CCLK_8); 237 * assert(sc == RTEMS_SUCCESSFUL); 238 * sc = lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); 239 * assert(sc == RTEMS_SUCCESSFUL); 240 * } 241 * @endcode 242 * 243 * @retval RTEMS_SUCCESSFUL Successful operation. 244 * @retval RTEMS_IO_ERROR Check failed. 245 * @retval RTEMS_NOT_DEFINED Invalid action. 246 */ 247 rtems_status_code lpc24xx_pin_config( 248 const lpc24xx_pin_range *pins, 249 lpc24xx_pin_action action 250 ); 251 252 /** 253 * @name ADC Pins 254 * 255 * @{ 256 */ 257 258 #define LPC24XX_PIN_ADC_CHANNEL_0 \ 259 LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_01) 260 #define LPC24XX_PIN_ADC_CHANNEL_1 \ 261 LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_01) 262 #define LPC24XX_PIN_ADC_CHANNEL_2 \ 263 LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_01) 264 #define LPC24XX_PIN_ADC_CHANNEL_3 \ 265 LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_01) 266 #define LPC24XX_PIN_ADC_CHANNEL_4 \ 267 LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_11) 268 #define LPC24XX_PIN_ADC_CHANNEL_5 \ 269 LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_11) 270 #define LPC24XX_PIN_ADC_CHANNEL_6 \ 271 LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_11) 272 #define LPC24XX_PIN_ADC_CHANNEL_7 \ 273 LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_11) 274 275 /** @} */ 276 277 /** 278 * @name DAC Pins 279 * 280 * @{ 281 */ 282 283 #define LPC24XX_PIN_DAC \ 284 LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_10) 285 286 /** @} */ 287 288 /** 289 * @name Ethernet Pins 290 * 291 * @{ 292 */ 293 294 #define LPC24XX_PIN_ETHERNET_MII \ 295 LPC24XX_PIN_RANGE(1, 0, 17, LPC24XX_PIN_FUNCTION_01) 296 297 #define LPC24XX_PIN_ETHERNET_RMII_0 \ 298 LPC24XX_PIN_RANGE(1, 0, 1, LPC24XX_PIN_FUNCTION_01) 299 #define LPC24XX_PIN_ETHERNET_RMII_1 \ 300 LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_01) 301 #define LPC24XX_PIN_ETHERNET_RMII_2 \ 302 LPC24XX_PIN_RANGE(1, 8, 10, LPC24XX_PIN_FUNCTION_01) 303 #define LPC24XX_PIN_ETHERNET_RMII_3 \ 304 LPC24XX_PIN_RANGE(1, 14, 17, LPC24XX_PIN_FUNCTION_01) 305 306 /** @} */ 307 308 /** 309 * @name I2C 0 Pins 310 * 311 * @{ 312 */ 313 314 #define LPC24XX_PIN_I2C_0_SDA \ 315 LPC24XX_PIN(0, 27, LPC24XX_PIN_FUNCTION_01) 316 #define LPC24XX_PIN_I2C_0_SCL \ 317 LPC24XX_PIN(0, 28, LPC24XX_PIN_FUNCTION_01) 318 319 /** @} */ 320 321 /** 322 * @name I2C 1 Pins 323 * 324 * @{ 325 */ 326 327 #define LPC24XX_PIN_I2C_1_SDA_P0_0 \ 328 LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_11) 329 #define LPC24XX_PIN_I2C_1_SDA_P0_19 \ 330 LPC24XX_PIN(0, 19, LPC24XX_PIN_FUNCTION_11) 331 #define LPC24XX_PIN_I2C_1_SDA_P2_14 \ 332 LPC24XX_PIN(2, 14, LPC24XX_PIN_FUNCTION_11) 333 334 #define LPC24XX_PIN_I2C_1_SCL_P0_20 \ 335 LPC24XX_PIN(0, 20, LPC24XX_PIN_FUNCTION_11) 336 #define LPC24XX_PIN_I2C_1_SCL_P0_1 \ 337 LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_11) 338 #define LPC24XX_PIN_I2C_1_SCL_P2_15 \ 339 LPC24XX_PIN(2, 15, LPC24XX_PIN_FUNCTION_11) 340 341 /** @} */ 342 343 /** 344 * @name I2C 2 Pins 345 * 346 * @{ 347 */ 348 349 #define LPC24XX_PIN_I2C_2_SDA_P0_10 \ 350 LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_10) 351 #define LPC24XX_PIN_I2C_2_SDA_P2_30 \ 352 LPC24XX_PIN(2, 30, LPC24XX_PIN_FUNCTION_11) 353 #define LPC24XX_PIN_I2C_2_SDA_P4_20 \ 354 LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_10) 355 356 #define LPC24XX_PIN_I2C_2_SCL_P2_31 \ 357 LPC24XX_PIN(2, 31, LPC24XX_PIN_FUNCTION_11) 358 #define LPC24XX_PIN_I2C_2_SCL_P0_11 \ 359 LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_10) 360 #define LPC24XX_PIN_I2C_2_SCL_P4_21 \ 361 LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_10) 362 363 /** @} */ 364 365 /** 366 * @name I2S Pins 367 * 368 * @{ 369 */ 370 371 #define LPC24XX_PIN_I2S_RX_CLK_P0_4 \ 372 LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01) 373 #define LPC24XX_PIN_I2S_RX_CLK_P0_23 \ 374 LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_10) 375 376 #define LPC24XX_PIN_I2S_RX_WS_P0_5 \ 377 LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01) 378 #define LPC24XX_PIN_I2S_RX_WS_P0_24 \ 379 LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_10) 380 381 #define LPC24XX_PIN_I2S_RX_SDA_P0_6 \ 382 LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01) 383 #define LPC24XX_PIN_I2S_RX_SDA_P0_25 \ 384 LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_10) 385 386 #define LPC24XX_PIN_I2S_TX_CLK_P0_7 \ 387 LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01) 388 #define LPC24XX_PIN_I2S_TX_CLK_P2_11 \ 389 LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_11) 390 391 #define LPC24XX_PIN_I2S_TX_WS_P0_8 \ 392 LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01) 393 #define LPC24XX_PIN_I2S_TX_WS_P2_12 \ 394 LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_11) 395 396 #define LPC24XX_PIN_I2S_TX_SDA_P0_9 \ 397 LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01) 398 #define LPC24XX_PIN_I2S_TX_SDA_P2_13 \ 399 LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_11) 400 401 /** @} */ 402 403 /** 404 * @name LCD Pins 405 * 406 * @{ 407 */ 408 409 #define LPC24XX_PIN_LCD_PWR \ 410 LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_11) 411 #define LPC24XX_PIN_LCD_LE \ 412 LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_11) 413 #define LPC24XX_PIN_LCD_DCLK \ 414 LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_11) 415 #define LPC24XX_PIN_LCD_FP \ 416 LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_11) 417 #define LPC24XX_PIN_LCD_ENAB_M \ 418 LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_11) 419 #define LPC24XX_PIN_LCD_LP \ 420 LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_11) 421 #define LPC24XX_PIN_LCD_CLKIN \ 422 LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01) 423 424 #define LPC24XX_PIN_LCD_VD_P0_4 \ 425 LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01) 426 #define LPC24XX_PIN_LCD_VD_P0_5 \ 427 LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01) 428 #define LPC24XX_PIN_LCD_VD_P0_6 \ 429 LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01) 430 #define LPC24XX_PIN_LCD_VD_P0_7 \ 431 LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01) 432 #define LPC24XX_PIN_LCD_VD_P0_8 \ 433 LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01) 434 #define LPC24XX_PIN_LCD_VD_P0_9 \ 435 LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01) 436 #define LPC24XX_PIN_LCD_VD_P1_20 \ 437 LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01) 438 #define LPC24XX_PIN_LCD_VD_P1_21 \ 439 LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01) 440 #define LPC24XX_PIN_LCD_VD_P1_22 \ 441 LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01) 442 #define LPC24XX_PIN_LCD_VD_P1_23 \ 443 LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01) 444 #define LPC24XX_PIN_LCD_VD_P1_24 \ 445 LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01) 446 #define LPC24XX_PIN_LCD_VD_P1_25 \ 447 LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01) 448 #define LPC24XX_PIN_LCD_VD_P1_26 \ 449 LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01) 450 #define LPC24XX_PIN_LCD_VD_P1_27 \ 451 LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01) 452 #define LPC24XX_PIN_LCD_VD_P1_28 \ 453 LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01) 454 #define LPC24XX_PIN_LCD_VD_P1_29 \ 455 LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01) 456 #define LPC24XX_PIN_LCD_VD_P2_6 \ 457 LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11) 458 #define LPC24XX_PIN_LCD_VD_P2_7 \ 459 LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11) 460 #define LPC24XX_PIN_LCD_VD_P2_8 \ 461 LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11) 462 #define LPC24XX_PIN_LCD_VD_P2_9 \ 463 LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11) 464 #define LPC24XX_PIN_LCD_VD_P2_12 \ 465 LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01) 466 #define LPC24XX_PIN_LCD_VD_P2_13 \ 467 LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01) 468 #define LPC24XX_PIN_LCD_VD_P4_28 \ 469 LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10) 470 #define LPC24XX_PIN_LCD_VD_P4_29 \ 471 LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10) 472 473 /** @} */ 474 475 /** 476 * @name PWM 0 Pins 477 * 478 * @{ 479 */ 480 481 #define LPC24XX_PIN_PWM_0_CHANNEL_1_P1_2 \ 482 LPC24XX_PIN(1, 2, LPC24XX_PIN_FUNCTION_11) 483 #define LPC24XX_PIN_PWM_0_CHANNEL_1_P3_16 \ 484 LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_10) 485 486 #define LPC24XX_PIN_PWM_0_CHANNEL_2_P1_3 \ 487 LPC24XX_PIN(1, 3, LPC24XX_PIN_FUNCTION_11) 488 #define LPC24XX_PIN_PWM_0_CHANNEL_2_P3_17 \ 489 LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_10) 490 491 #define LPC24XX_PIN_PWM_0_CHANNEL_3_P1_5 \ 492 LPC24XX_PIN(1, 5, LPC24XX_PIN_FUNCTION_11) 493 #define LPC24XX_PIN_PWM_0_CHANNEL_3_P3_18 \ 494 LPC24XX_PIN(3, 18, LPC24XX_PIN_FUNCTION_10) 495 496 #define LPC24XX_PIN_PWM_0_CHANNEL_4_P1_6 \ 497 LPC24XX_PIN(1, 6, LPC24XX_PIN_FUNCTION_11) 498 #define LPC24XX_PIN_PWM_0_CHANNEL_4_P3_19 \ 499 LPC24XX_PIN(3, 19, LPC24XX_PIN_FUNCTION_10) 500 501 #define LPC24XX_PIN_PWM_0_CHANNEL_5_P1_7 \ 502 LPC24XX_PIN(1, 7, LPC24XX_PIN_FUNCTION_11) 503 #define LPC24XX_PIN_PWM_0_CHANNEL_5_P3_20 \ 504 LPC24XX_PIN(3, 20, LPC24XX_PIN_FUNCTION_10) 505 506 #define LPC24XX_PIN_PWM_0_CHANNEL_6_P1_11 \ 507 LPC24XX_PIN(1, 11, LPC24XX_PIN_FUNCTION_11) 508 #define LPC24XX_PIN_PWM_0_CHANNEL_6_P3_21 \ 509 LPC24XX_PIN(3, 21, LPC24XX_PIN_FUNCTION_10) 510 511 #define LPC24XX_PIN_PWM_0_CAPTURE_0_P1_12 \ 512 LPC24XX_PIN(1, 12, LPC24XX_PIN_FUNCTION_11) 513 #define LPC24XX_PIN_PWM_0_CAPTURE_0_P3_22 \ 514 LPC24XX_PIN(3, 22, LPC24XX_PIN_FUNCTION_10) 515 516 /** @} */ 517 518 /** 519 * @name PWM 1 Pins 520 * 521 * @{ 522 */ 523 524 #define LPC24XX_PIN_PWM_1_CHANNEL_1_P1_18 \ 525 LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_10) 526 #define LPC24XX_PIN_PWM_1_CHANNEL_1_P2_0 \ 527 LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_01) 528 #define LPC24XX_PIN_PWM_1_CHANNEL_1_P3_24 \ 529 LPC24XX_PIN(3, 24, LPC24XX_PIN_FUNCTION_11) 530 531 #define LPC24XX_PIN_PWM_1_CHANNEL_2_P1_20 \ 532 LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_10) 533 #define LPC24XX_PIN_PWM_1_CHANNEL_2_P2_1 \ 534 LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_01) 535 #define LPC24XX_PIN_PWM_1_CHANNEL_2_P3_25 \ 536 LPC24XX_PIN(3, 25, LPC24XX_PIN_FUNCTION_11) 537 538 #define LPC24XX_PIN_PWM_1_CHANNEL_3_P1_21 \ 539 LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_10) 540 #define LPC24XX_PIN_PWM_1_CHANNEL_3_P2_2 \ 541 LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_01) 542 #define LPC24XX_PIN_PWM_1_CHANNEL_3_P3_26 \ 543 LPC24XX_PIN(3, 26, LPC24XX_PIN_FUNCTION_11) 544 545 #define LPC24XX_PIN_PWM_1_CHANNEL_4_P1_23 \ 546 LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_10) 547 #define LPC24XX_PIN_PWM_1_CHANNEL_4_P2_3 \ 548 LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_01) 549 #define LPC24XX_PIN_PWM_1_CHANNEL_4_P3_27 \ 550 LPC24XX_PIN(3, 27, LPC24XX_PIN_FUNCTION_11) 551 552 #define LPC24XX_PIN_PWM_1_CHANNEL_5_P1_24 \ 553 LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_10) 554 #define LPC24XX_PIN_PWM_1_CHANNEL_5_P2_4 \ 555 LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_01) 556 #define LPC24XX_PIN_PWM_1_CHANNEL_5_P3_28 \ 557 LPC24XX_PIN(3, 28, LPC24XX_PIN_FUNCTION_11) 558 559 #define LPC24XX_PIN_PWM_1_CHANNEL_6_P1_26 \ 560 LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_10) 561 #define LPC24XX_PIN_PWM_1_CHANNEL_6_P2_5 \ 562 LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_01) 563 #define LPC24XX_PIN_PWM_1_CHANNEL_6_P3_29 \ 564 LPC24XX_PIN(3, 29, LPC24XX_PIN_FUNCTIO9_11) 565 566 #define LPC24XX_PIN_PWM_1_CAPTURE_0_P1_28 \ 567 LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_10) 568 #define LPC24XX_PIN_PWM_1_CAPTURE_0_P2_7 \ 569 LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_01) 570 #define LPC24XX_PIN_PWM_1_CAPTURE_0_P3_23 \ 571 LPC24XX_PIN(3, 23, LPC24XX_PIN_FUNCTION_11) 572 573 #define LPC24XX_PIN_PWM_1_CAPTURE_1_P1_29 \ 574 LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_10) 575 576 /** @} */ 577 578 /** 579 * @name SPI Pins 580 * 581 * @{ 582 */ 583 584 #define LPC24XX_PIN_SPI_SCK \ 585 LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_11) 586 #define LPC24XX_PIN_SPI_SSEL \ 587 LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_11) 588 #define LPC24XX_PIN_SPI_MISO \ 589 LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_11) 590 #define LPC24XX_PIN_SPI_MOSI \ 591 LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_11) 592 593 /** @} */ 594 595 /** 596 * @name SSP 0 Pins 597 * 598 * @{ 599 */ 600 601 #define LPC24XX_PIN_SSP_0_SCK_P0_15 \ 602 LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_10) 603 #define LPC24XX_PIN_SSP_0_SCK_P1_20 \ 604 LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_11) 605 #define LPC24XX_PIN_SSP_0_SCK_P2_22 \ 606 LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_11) 607 608 #define LPC24XX_PIN_SSP_0_SSEL_P0_16 \ 609 LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_10) 610 #define LPC24XX_PIN_SSP_0_SSEL_P1_21 \ 611 LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_11) 612 #define LPC24XX_PIN_SSP_0_SSEL_P2_23 \ 613 LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_11) 614 615 #define LPC24XX_PIN_SSP_0_MISO_P0_17 \ 616 LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_10) 617 #define LPC24XX_PIN_SSP_0_MISO_P1_23 \ 618 LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_11) 619 #define LPC24XX_PIN_SSP_0_MISO_P2_26 \ 620 LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_11) 621 622 #define LPC24XX_PIN_SSP_0_MOSI_P0_18 \ 623 LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_10) 624 #define LPC24XX_PIN_SSP_0_MOSI_P1_24 \ 625 LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_11) 626 #define LPC24XX_PIN_SSP_0_MOSI_P2_27 \ 627 LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_11) 628 629 /** @} */ 630 631 /** 632 * @name SSP 1 Pins 633 * 634 * @{ 635 */ 636 637 #define LPC24XX_PIN_SSP_1_SCK_P0_6 \ 638 LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_10) 639 #define LPC24XX_PIN_SSP_1_SCK_P0_12 \ 640 LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_10) 641 #define LPC24XX_PIN_SSP_1_SCK_P4_20 \ 642 LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_11) 643 644 #define LPC24XX_PIN_SSP_1_SSEL_P0_7 \ 645 LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_10) 646 #define LPC24XX_PIN_SSP_1_SSEL_P0_13 \ 647 LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_10) 648 #define LPC24XX_PIN_SSP_1_SSEL_P4_21 \ 649 LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_11) 650 651 #define LPC24XX_PIN_SSP_1_MISO_P0_8 \ 652 LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_10) 653 #define LPC24XX_PIN_SSP_1_MISO_P0_14 \ 654 LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_11) 655 #define LPC24XX_PIN_SSP_1_MISO_P4_22 \ 656 LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_11) 657 658 #define LPC24XX_PIN_SSP_1_MOSI_P0_9 \ 659 LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_10) 660 #define LPC24XX_PIN_SSP_1_MOSI_P1_31 \ 661 LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_10) 662 #define LPC24XX_PIN_SSP_1_MOSI_P4_23 \ 663 LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_11) 664 665 /** @} */ 666 667 /** 668 * @name UART 0 Pins 669 * 670 * @{ 671 */ 672 673 #define LPC24XX_PIN_UART_0_TXD \ 674 LPC24XX_PIN(0, 2, LPC24XX_PIN_FUNCTION_01) 675 676 #define LPC24XX_PIN_UART_0_RXD \ 677 LPC24XX_PIN(0, 3, LPC24XX_PIN_FUNCTION_01) 678 679 /** @} */ 680 681 /** 682 * @name UART 1 Pins 683 * 684 * @{ 685 */ 686 687 #define LPC24XX_PIN_UART_1_TXD_P0_15 \ 688 LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_01) 689 #define LPC24XX_PIN_UART_1_TXD_P2_0 \ 690 LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_10) 691 #define LPC24XX_PIN_UART_1_TXD_P3_16 \ 692 LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_11) 693 694 #define LPC24XX_PIN_UART_1_RXD_P0_16 \ 695 LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_01) 696 #define LPC24XX_PIN_UART_1_RXD_P2_1 \ 697 LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_10) 698 #define LPC24XX_PIN_UART_1_RXD_P3_17 \ 699 LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_11) 700 701 /** @} */ 702 703 /** 704 * @name UART 2 Pins 705 * 706 * @{ 707 */ 708 709 #define LPC24XX_PIN_UART_2_TXD_P0_10 \ 710 LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_01) 711 #define LPC24XX_PIN_UART_2_TXD_P2_8 \ 712 LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_10) 713 #define LPC24XX_PIN_UART_2_TXD_P4_22 \ 714 LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_10) 715 716 #define LPC24XX_PIN_UART_2_RXD_P0_11 \ 717 LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_01) 718 #define LPC24XX_PIN_UART_2_RXD_P2_9 \ 719 LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_10) 720 #define LPC24XX_PIN_UART_2_RXD_P4_23 \ 721 LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_10) 722 723 /** @} */ 724 725 /** 726 * @name UART 3 Pins 727 * 728 * @{ 729 */ 730 731 #define LPC24XX_PIN_UART_3_TXD_P0_0 \ 732 LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_10) 733 #define LPC24XX_PIN_UART_3_TXD_P0_25 \ 734 LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_11) 735 #define LPC24XX_PIN_UART_3_TXD_P4_28 \ 736 LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_11) 737 738 #define LPC24XX_PIN_UART_3_RXD_P0_1 \ 739 LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_10) 740 #define LPC24XX_PIN_UART_3_RXD_P0_25 \ 741 LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_11) 742 #define LPC24XX_PIN_UART_3_RXD_P4_29 \ 743 LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_11) 744 745 /** @} */ 746 747 /** 748 * @name USB Port 1 Pins 749 * 750 * @{ 751 */ 752 753 #define LPC24XX_PIN_USB_D_PLUS_1\ 754 LPC24XX_PIN(0, 29, LPC24XX_PIN_FUNCTION_01) 755 #define LPC24XX_PIN_USB_D_MINUS_1\ 756 LPC24XX_PIN(0, 30, LPC24XX_PIN_FUNCTION_01) 757 #define LPC24XX_PIN_USB_UP_LED_1\ 758 LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_01) 759 #define LPC24XX_PIN_USB_TX_E_1\ 760 LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_01) 761 #define LPC24XX_PIN_USB_PPWR_1\ 762 LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_10) 763 #define LPC24XX_PIN_USB_TX_DP_1\ 764 LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01) 765 #define LPC24XX_PIN_USB_TX_DM_1\ 766 LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01) 767 #define LPC24XX_PIN_USB_RCV_1\ 768 LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01) 769 #define LPC24XX_PIN_USB_PWRD_1\ 770 LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_10) 771 #define LPC24XX_PIN_USB_RX_DP_1\ 772 LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01) 773 #define LPC24XX_PIN_USB_RX_DM_1\ 774 LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01) 775 #define LPC24XX_PIN_USB_LS_1\ 776 LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01) 777 #define LPC24XX_PIN_USB_HSTEN_1\ 778 LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_10) 779 #define LPC24XX_PIN_USB_SSPND_1\ 780 LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01) 781 #define LPC24XX_PIN_USB_INT_1\ 782 LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01) 783 #define LPC24XX_PIN_USB_OVRCR_1\ 784 LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_10) 785 #define LPC24XX_PIN_USB_SCL_1\ 786 LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01) 787 #define LPC24XX_PIN_USB_SDA_1\ 788 LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01) 789 #define LPC24XX_PIN_USB_CONNECT_1\ 790 LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_01) 791 792 /** @} */ 793 794 /** 795 * @name USB Port 2 Pins 796 * 797 * @{ 798 */ 799 800 #define LPC24XX_PIN_USB_PPWR_2\ 801 LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_01) 802 #define LPC24XX_PIN_USB_UP_LED_2\ 803 LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_01) 804 #define LPC24XX_PIN_USB_HSTEN_2\ 805 LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01) 806 #define LPC24XX_PIN_USB_CONNECT_2\ 807 LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01) 808 #define LPC24XX_PIN_USB_D_PLUS_2\ 809 LPC24XX_PIN(0, 31, LPC24XX_PIN_FUNCTION_10) 810 #define LPC24XX_PIN_USB_PWRD_2\ 811 LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_01) 812 #define LPC24XX_PIN_USB_OVRCR_2\ 813 LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_01) 814 815 /** @} */ 816 258 817 /** @} */ 259 818 -
c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
r76134c5 rd74ed4a 25 25 26 26 #include <rtems.h> 27 28 #include <bsp/io.h> 27 29 28 30 #ifdef __cplusplus … … 55 57 * @brief Set the LCD @a mode. 56 58 * 57 * The pins are configured according to the @a pin_config.59 * The pins are configured according to @a pins. 58 60 * 59 * @see lpc24xx_ io_config() and lpc24xx_io_release().61 * @see lpc24xx_pin_config(). 60 62 * 61 63 * @retval RTEMS_SUCCESSFUL Successful operation. … … 64 66 rtems_status_code lpc24xx_lcd_set_mode( 65 67 lpc24xx_lcd_mode mode, 66 unsigned pin_config68 const lpc24xx_pin_range *pins 67 69 ); 68 70 -
c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2009 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 48 49 static void lpc_eth_config_module_enable(void) 49 50 { 51 static const lpc24xx_pin_range pins [] = { 52 LPC24XX_PIN_ETHERNET_RMII_0, 53 LPC24XX_PIN_ETHERNET_RMII_1, 54 LPC24XX_PIN_ETHERNET_RMII_2, 55 LPC24XX_PIN_ETHERNET_RMII_3, 56 LPC24XX_PIN_TERMINAL 57 }; 58 50 59 lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT); 51 lpc24xx_ io_config(LPC24XX_MODULE_ETHERNET, 1);60 lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); 52 61 } 53 62 #else 54 63 static void lpc_eth_config_module_enable(void) 55 64 { 65 static const lpc24xx_pin_range pins [] = { 66 LPC24XX_PIN_ETHERNET_MII, 67 LPC24XX_PIN_TERMINAL 68 }; 69 56 70 lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT); 57 lpc24xx_ io_config(LPC24XX_MODULE_ETHERNET, 0);71 lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); 58 72 } 59 73 #endif -
c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
r76134c5 rd74ed4a 1914 1914 SET_FIELD(reg, val, AHBCFG_EP5_MASK, 28) 1915 1915 1916 /* EMC */1917 1918 #define EMC_DYN_CTRL_CE 0x00000001U1919 1920 #define EMC_DYN_CTRL_CS 0x00000002U1921 1922 #define EMC_DYN_CTRL_CMD_NORMAL 0x00000000U1923 1924 #define EMC_DYN_CTRL_CMD_MODE 0x00000080U1925 1926 #define EMC_DYN_CTRL_CMD_PALL 0x00000100U1927 1928 #define EMC_DYN_CTRL_CMD_NOP 0x00000180U1929 1930 typedef struct {1931 uint32_t cfg;1932 uint32_t waitwen;1933 uint32_t waitoen;1934 uint32_t waitrd;1935 uint32_t waitpage;1936 uint32_t waitwr;1937 uint32_t waitrun;1938 } lpc24xx_emc_static;1939 1940 1916 /* I2C */ 1941 1917 -
c/src/lib/libbsp/arm/lpc24xx/misc/dma.c
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2008, 2009 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 39 40 GPDMA_CONFIG = 0; 40 41 42 /* Reset registers */ 43 GPDMA_SOFT_SREQ = 0; 44 GPDMA_SOFT_BREQ = 0; 45 GPDMA_SOFT_LSREQ = 0; 46 GPDMA_SOFT_LBREQ = 0; 47 GPDMA_SYNC = 0; 48 GPDMA_CH0_CFG = 0; 49 GPDMA_CH1_CFG = 0; 50 41 51 /* Enable module */ 42 52 #if BYTE_ORDER == LITTLE_ENDIAN … … 45 55 GPDMA_CONFIG = GPDMA_CONFIG_EN | GPDMA_CONFIG_MODE; 46 56 #endif 47 48 /* Reset registers */49 GPDMA_SOFT_SREQ = 0;50 GPDMA_SOFT_BREQ = 0;51 GPDMA_SOFT_LSREQ = 0;52 GPDMA_SOFT_LBREQ = 0;53 GPDMA_SYNC = 0;54 57 } 55 58 -
c/src/lib/libbsp/arm/lpc24xx/misc/io.c
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2009, 2010 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 23 24 #include <bsp/system-clocks.h> 24 25 25 #define LPC24XX_IO_SELECT(pin) (pin >> 4U) 26 27 #define LPC24XX_IO_SELECT_SHIFT(pin) ((pin & 0xfU) << 1U) 28 29 #define LPC24XX_IO_SELECT_MASK 0x3U 30 31 #define LPC24XX_IO_PRIMARY 0x0U 32 33 #define LPC24XX_IO_ALTERNATE_0 0x1U 34 35 #define LPC24XX_IO_ALTERNATE_1 0x2U 36 37 #define LPC24XX_IO_ALTERNATE_2 0x3U 38 39 #define LPC24XX_IO_ENTRY(mod, cfg, begin_port, begin_index, last_port, last_index, function) \ 40 { \ 41 .module = mod, \ 42 .config = cfg, \ 43 .pin_begin = LPC24XX_IO_INDEX_BY_PORT(begin_port, begin_index), \ 44 .pin_last = LPC24XX_IO_INDEX_BY_PORT(last_port, last_index), \ 45 .pin_function = function \ 46 } 47 48 typedef struct { 49 unsigned module : 6; 50 unsigned config : 4; 51 unsigned pin_begin : 8; 52 unsigned pin_last : 8; 53 unsigned pin_function : 3; 54 } lpc24xx_io_entry; 55 56 typedef void (*lpc24xx_io_iterate_routine)(unsigned pin, unsigned function); 57 58 static const lpc24xx_io_entry lpc24xx_io_config_table [] = { 59 /* UART */ 60 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_0, 0, 0, 2, 0, 3, LPC24XX_IO_ALTERNATE_0), 61 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_1, 0, 0, 15, 0, 16, LPC24XX_IO_ALTERNATE_0), 62 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_1, 1, 2, 0, 2, 1, LPC24XX_IO_ALTERNATE_1), 63 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_1, 2, 3, 16, 3, 17, LPC24XX_IO_ALTERNATE_2), 64 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_2, 0, 0, 10, 0, 11, LPC24XX_IO_ALTERNATE_0), 65 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_2, 1, 2, 8, 2, 9, LPC24XX_IO_ALTERNATE_1), 66 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_2, 2, 4, 22, 4, 23, LPC24XX_IO_ALTERNATE_1), 67 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_3, 0, 0, 0, 0, 1, LPC24XX_IO_ALTERNATE_1), 68 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_3, 1, 0, 25, 0, 26, LPC24XX_IO_ALTERNATE_2), 69 LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_3, 2, 4, 28, 4, 29, LPC24XX_IO_ALTERNATE_2), 70 71 /* Ethernet */ 72 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 0, 1, 0, 1, 17, LPC24XX_IO_ALTERNATE_0), 73 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 0, 1, 1, LPC24XX_IO_ALTERNATE_0), 74 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 4, 1, 4, LPC24XX_IO_ALTERNATE_0), 75 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 8, 1, 10, LPC24XX_IO_ALTERNATE_0), 76 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 14, 1, 17, LPC24XX_IO_ALTERNATE_0), 77 78 /* ADC */ 79 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 0, 0, 12, 0, 13, LPC24XX_IO_ALTERNATE_2), 80 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 1, 0, 23, 0, 25, LPC24XX_IO_ALTERNATE_0), 81 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 2, 0, 26, 0, 26, LPC24XX_IO_ALTERNATE_0), 82 LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 2, 1, 30, 1, 31, LPC24XX_IO_ALTERNATE_2), 83 84 /* I2C */ 85 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_0, 0, 0, 27, 0, 28, LPC24XX_IO_ALTERNATE_0), 86 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_1, 0, 0, 0, 0, 1, LPC24XX_IO_ALTERNATE_2), 87 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_1, 1, 0, 19, 0, 20, LPC24XX_IO_ALTERNATE_2), 88 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_1, 2, 2, 14, 2, 15, LPC24XX_IO_ALTERNATE_2), 89 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_2, 0, 0, 10, 0, 11, LPC24XX_IO_ALTERNATE_1), 90 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_2, 1, 2, 30, 2, 31, LPC24XX_IO_ALTERNATE_2), 91 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_2, 2, 4, 20, 4, 21, LPC24XX_IO_ALTERNATE_1), 92 93 /* I2S */ 94 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2S, 0, 0, 4, 0, 9, LPC24XX_IO_ALTERNATE_0), 95 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2S, 1, 0, 23, 0, 25, LPC24XX_IO_ALTERNATE_1), 96 LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2S, 1, 2, 11, 2, 13, LPC24XX_IO_ALTERNATE_2), 97 98 /* SSP */ 99 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 0, 0, 15, 0, 18, LPC24XX_IO_ALTERNATE_1), 100 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 1, 1, 20, 0, 21, LPC24XX_IO_ALTERNATE_2), 101 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 1, 1, 23, 0, 24, LPC24XX_IO_ALTERNATE_2), 102 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 2, 2, 22, 2, 23, LPC24XX_IO_ALTERNATE_2), 103 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 2, 2, 26, 2, 27, LPC24XX_IO_ALTERNATE_2), 104 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 0, 0, 6, 0, 9, LPC24XX_IO_ALTERNATE_1), 105 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 1, 0, 12, 0, 13, LPC24XX_IO_ALTERNATE_1), 106 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 1, 0, 14, 0, 14, LPC24XX_IO_ALTERNATE_2), 107 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 1, 1, 31, 1, 31, LPC24XX_IO_ALTERNATE_1), 108 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 2, 4, 20, 4, 23, LPC24XX_IO_ALTERNATE_2), 109 110 /* USB */ 111 LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 0, 29, 0, 30, LPC24XX_IO_ALTERNATE_0), 112 LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 1, 19, 1, 19, LPC24XX_IO_ALTERNATE_1), 113 114 /* SPI */ 115 LPC24XX_IO_ENTRY(LPC24XX_MODULE_SPI, 0, 0, 15, 0, 18, LPC24XX_IO_ALTERNATE_2), 116 117 /* PWM */ 118 LPC24XX_IO_ENTRY(LPC24XX_MODULE_PWM_1, 0, 2, 0, 2, 0, LPC24XX_IO_ALTERNATE_0), 119 120 /* LCD */ 121 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 0, 4, 0, 9, LPC24XX_IO_ALTERNATE_0), 122 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 1, 20, 1, 29, LPC24XX_IO_ALTERNATE_0), 123 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 2, 0, 2, 3, LPC24XX_IO_ALTERNATE_2), 124 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 2, 5, 2, 9, LPC24XX_IO_ALTERNATE_2), 125 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 2, 12, 2, 13, LPC24XX_IO_ALTERNATE_0), 126 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 4, 28, 4, 29, LPC24XX_IO_ALTERNATE_1), 127 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 1, 20, 1, 29, LPC24XX_IO_ALTERNATE_0), 128 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 2, 0, 2, 3, LPC24XX_IO_ALTERNATE_2), 129 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 2, 5, 2, 9, LPC24XX_IO_ALTERNATE_2), 130 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 2, 12, 2, 13, LPC24XX_IO_ALTERNATE_0), 131 LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 4, 28, 4, 29, LPC24XX_IO_ALTERNATE_1), 132 133 /* DAC */ 134 LPC24XX_IO_ENTRY(LPC24XX_MODULE_DAC, 0, 0, 26, 0, 26, LPC24XX_IO_ALTERNATE_1), 135 136 /* Terminate */ 137 LPC24XX_IO_ENTRY(LPC24XX_MODULE_COUNT, 0, 0, 0, 0, 0, 0) 138 }; 139 140 static rtems_status_code lpc24xx_io_iterate( 141 lpc24xx_module module, 142 unsigned config, 143 lpc24xx_io_iterate_routine routine 144 ) 145 { 146 rtems_status_code sc = RTEMS_SUCCESSFUL; 147 const lpc24xx_io_entry *e = &lpc24xx_io_config_table [0]; 148 149 while (e->module != LPC24XX_MODULE_COUNT) { 150 if (e->module == module && e->config == config) { 151 unsigned pin = e->pin_begin; 152 unsigned last = e->pin_last; 153 unsigned function = e->pin_function; 154 155 while (pin <= last) { 156 (*routine)(pin, function); 157 158 ++pin; 159 } 160 161 sc = RTEMS_SUCCESSFUL; 162 } 163 ++e; 164 } 165 166 return sc; 167 } 168 169 static void lpc24xx_io_do_config(unsigned pin, unsigned function) 170 { 171 rtems_interrupt_level level; 172 unsigned select = LPC24XX_IO_SELECT(pin); 173 unsigned shift = LPC24XX_IO_SELECT_SHIFT(pin); 174 unsigned mask = LPC24XX_IO_SELECT_MASK << shift; 175 unsigned pinsel = 0; 176 177 rtems_interrupt_disable(level); 178 pinsel = LPC24XX_PINSEL [select]; 179 pinsel &= ~mask; 180 pinsel |= (function & LPC24XX_IO_SELECT_MASK) << shift; 181 LPC24XX_PINSEL [select] = pinsel; 182 rtems_interrupt_enable(level); 183 } 184 185 static void lpc24xx_io_do_release(unsigned pin, unsigned function) 186 { 187 rtems_interrupt_level level; 188 unsigned select = LPC24XX_IO_SELECT(pin); 189 unsigned shift = LPC24XX_IO_SELECT_SHIFT(pin); 190 unsigned mask = LPC24XX_IO_SELECT_MASK << shift; 191 192 rtems_interrupt_disable(level); 193 LPC24XX_PINSEL [select] &= ~mask; 194 rtems_interrupt_enable(level); 195 } 196 197 rtems_status_code lpc24xx_io_config( 198 lpc24xx_module module, 199 unsigned config 200 ) 201 { 202 return lpc24xx_io_iterate(module, config, lpc24xx_io_do_config); 203 } 204 205 rtems_status_code lpc24xx_io_release( 206 lpc24xx_module module, 207 unsigned config 208 ) 209 { 210 return lpc24xx_io_iterate(module, config, lpc24xx_io_do_release); 211 } 26 #define LPC24XX_PIN_SELECT(pin) (pin >> 4U) 27 28 #define LPC24XX_PIN_SELECT_SHIFT(pin) ((pin & 0xfU) << 1U) 29 30 #define LPC24XX_PIN_SELECT_MASK 0x3U 212 31 213 32 rtems_status_code lpc24xx_gpio_config( … … 220 39 unsigned port = LPC24XX_IO_PORT(pin); 221 40 unsigned bit = LPC24XX_IO_PORT_BIT(pin); 222 unsigned select = LPC24XX_ IO_SELECT(pin);223 unsigned shift = LPC24XX_ IO_SELECT_SHIFT(pin);41 unsigned select = LPC24XX_PIN_SELECT(pin); 42 unsigned shift = LPC24XX_PIN_SELECT_SHIFT(pin); 224 43 unsigned resistor = settings & LPC24XX_GPIO_RESISTOR_MASK; 225 44 unsigned output = (settings & LPC24XX_GPIO_OUTPUT) != 0 ? 1U : 0U; … … 245 64 /* Resistor */ 246 65 LPC24XX_PINMODE [select] = 247 (LPC24XX_PINMODE [select] & ~(LPC24XX_ IO_SELECT_MASK << shift))248 | ((resistor & LPC24XX_ IO_SELECT_MASK) << shift);66 (LPC24XX_PINMODE [select] & ~(LPC24XX_PIN_SELECT_MASK << shift)) 67 | ((resistor & LPC24XX_PIN_SELECT_MASK) << shift); 249 68 250 69 rtems_interrupt_flash(level); … … 393 212 return lpc24xx_module_do_enable(module, 0U, false); 394 213 } 214 215 typedef rtems_status_code (*lpc24xx_pin_visitor)( 216 volatile uint32_t *pinsel, 217 uint32_t pinsel_mask, 218 uint32_t pinsel_value, 219 volatile uint32_t *fio_dir, 220 uint32_t fio_bit 221 ); 222 223 static rtems_status_code lpc24xx_pin_set_function( 224 volatile uint32_t *pinsel, 225 uint32_t pinsel_mask, 226 uint32_t pinsel_value, 227 volatile uint32_t *fio_dir, 228 uint32_t fio_bit 229 ) 230 { 231 rtems_interrupt_level level; 232 233 rtems_interrupt_disable(level); 234 *pinsel = (*pinsel & ~pinsel_mask) | pinsel_value; 235 rtems_interrupt_enable(level); 236 237 return RTEMS_SUCCESSFUL; 238 } 239 240 static rtems_status_code lpc24xx_pin_check_function( 241 volatile uint32_t *pinsel, 242 uint32_t pinsel_mask, 243 uint32_t pinsel_value, 244 volatile uint32_t *fio_dir, 245 uint32_t fio_bit 246 ) 247 { 248 if ((*pinsel & pinsel_mask) == pinsel_value) { 249 return RTEMS_SUCCESSFUL; 250 } else { 251 return RTEMS_IO_ERROR; 252 } 253 } 254 255 static rtems_status_code lpc24xx_pin_set_input( 256 volatile uint32_t *pinsel, 257 uint32_t pinsel_mask, 258 uint32_t pinsel_value, 259 volatile uint32_t *fio_dir, 260 uint32_t fio_bit 261 ) 262 { 263 rtems_interrupt_level level; 264 265 rtems_interrupt_disable(level); 266 *fio_dir &= ~fio_bit; 267 *pinsel &= ~pinsel_mask; 268 rtems_interrupt_enable(level); 269 270 return RTEMS_SUCCESSFUL; 271 } 272 273 static rtems_status_code lpc24xx_pin_check_input( 274 volatile uint32_t *pinsel, 275 uint32_t pinsel_mask, 276 uint32_t pinsel_value, 277 volatile uint32_t *fio_dir, 278 uint32_t fio_bit 279 ) 280 { 281 if ((*pinsel & pinsel_mask) == 0 && (*fio_dir & fio_bit) == 0) { 282 return RTEMS_SUCCESSFUL; 283 } else { 284 return RTEMS_IO_ERROR; 285 } 286 } 287 288 static const lpc24xx_pin_visitor lpc24xx_pin_visitors [] = { 289 [LPC24XX_PIN_SET_FUNCTION] = lpc24xx_pin_set_function, 290 [LPC24XX_PIN_CHECK_FUNCTION] = lpc24xx_pin_check_function, 291 [LPC24XX_PIN_SET_INPUT] = lpc24xx_pin_set_input, 292 [LPC24XX_PIN_CHECK_INPUT] = lpc24xx_pin_check_input 293 }; 294 295 rtems_status_code lpc24xx_pin_config( 296 const lpc24xx_pin_range *pins, 297 lpc24xx_pin_action action 298 ) 299 { 300 rtems_status_code sc = RTEMS_SUCCESSFUL; 301 302 if ((unsigned) action <= LPC24XX_PIN_CHECK_INPUT) { 303 lpc24xx_pin_visitor visitor = lpc24xx_pin_visitors [action]; 304 lpc24xx_pin_range terminal = LPC24XX_PIN_TERMINAL; 305 306 while (sc == RTEMS_SUCCESSFUL && pins->value != terminal.value) { 307 uint32_t port = pins->fields.port; 308 uint32_t index = pins->fields.index_begin; 309 uint32_t last = pins->fields.index_last; 310 uint32_t function = pins->fields.function; 311 volatile uint32_t *fio_dir = &LPC24XX_FIO [port].dir; 312 313 while (sc == RTEMS_SUCCESSFUL && index <= last) { 314 uint32_t pin = LPC24XX_IO_INDEX_BY_PORT(port, index); 315 uint32_t select = LPC24XX_PIN_SELECT(pin); 316 uint32_t shift = LPC24XX_PIN_SELECT_SHIFT(pin); 317 volatile uint32_t *pinsel = &LPC24XX_PINSEL [select]; 318 uint32_t pinsel_mask = LPC24XX_PIN_SELECT_MASK << shift; 319 uint32_t pinsel_value = (function & LPC24XX_PIN_SELECT_MASK) << shift; 320 uint32_t fio_bit = 1U << index; 321 322 sc = (*visitor)(pinsel, pinsel_mask, pinsel_value, fio_dir, fio_bit); 323 324 ++index; 325 } 326 327 ++pins; 328 } 329 } else { 330 sc = RTEMS_NOT_DEFINED; 331 } 332 333 return sc; 334 } -
c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c
r76134c5 rd74ed4a 24 24 25 25 #include <bsp/lpc24xx.h> 26 #include <bsp/io.h>27 26 #include <bsp/lcd.h> 28 27 #include <bsp/utility.h> … … 31 30 #define LCD_ENABLE BSP_BIT32(0) 32 31 33 rtems_status_code lpc24xx_lcd_set_mode(lpc24xx_lcd_mode mode, unsigned pin_config) 32 rtems_status_code lpc24xx_lcd_set_mode( 33 lpc24xx_lcd_mode mode, 34 const lpc24xx_pin_range *pins 35 ) 34 36 { 35 37 rtems_status_code sc = RTEMS_SUCCESSFUL; … … 62 64 PINSEL11 = BSP_FLD32(mode, 1, 3) | LCD_ENABLE; 63 65 64 sc = lpc24xx_ io_config(LPC24XX_MODULE_LCD, pin_config);66 sc = lpc24xx_pin_config(pins, LPC24XX_PIN_SET_FUNCTION); 65 67 assert(sc == RTEMS_SUCCESSFUL); 66 68 } else { … … 79 81 } 80 82 81 sc = lpc24xx_ io_release(LPC24XX_MODULE_LCD, pin_config);83 sc = lpc24xx_pin_config(pins, LPC24XX_PIN_SET_INPUT); 82 84 assert(sc == RTEMS_SUCCESSFUL); 83 85 -
c/src/lib/libbsp/arm/lpc24xx/preinstall.am
r76134c5 rd74ed4a 95 95 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-i2s.h 96 96 97 $(PROJECT_INCLUDE)/bsp/lpc-emc.h: ../shared/lpc/include/lpc-emc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 98 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-emc.h 99 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-emc.h 100 101 $(PROJECT_INCLUDE)/bsp/lpc-dma.h: ../shared/lpc/include/lpc-dma.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 102 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-dma.h 103 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-dma.h 104 105 $(PROJECT_INCLUDE)/bsp/lpc-lcd.h: ../shared/lpc/include/lpc-lcd.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 106 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-lcd.h 107 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-lcd.h 108 97 109 $(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 98 110 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -
c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2008, 2009 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 62 63 } 63 64 65 static void initialize_console(void) 66 { 67 #ifdef LPC24XX_CONFIG_CONSOLE 68 static const lpc24xx_pin_range pins [] = { 69 LPC24XX_PIN_UART_0_TXD, 70 LPC24XX_PIN_UART_0_RXD, 71 LPC24XX_PIN_TERMINAL 72 }; 73 74 lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_CCLK); 75 lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); 76 BSP_CONSOLE_UART_INIT(lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD); 77 #endif 78 } 79 64 80 void bsp_start(void) 65 81 { … … 70 86 lpc24xx_timer_initialize(); 71 87 72 /* Initialize console */ 73 #ifdef LPC24XX_CONFIG_CONSOLE 74 lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_CCLK); 75 lpc24xx_io_config(LPC24XX_MODULE_UART_0, LPC24XX_CONFIG_CONSOLE); 76 BSP_CONSOLE_UART_INIT(lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD); 77 #endif 88 initialize_console(); 78 89 79 90 /* Interrupts */ … … 92 103 ); 93 104 #endif 94 95 /* UART configurations */96 #ifdef LPC24XX_CONFIG_UART_197 lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_CCLK);98 lpc24xx_io_config(LPC24XX_MODULE_UART_1, LPC24XX_CONFIG_UART_1);99 #endif100 #ifdef LPC24XX_CONFIG_UART_2101 lpc24xx_module_enable(LPC24XX_MODULE_UART_2, LPC24XX_MODULE_CCLK);102 lpc24xx_io_config(LPC24XX_MODULE_UART_2, LPC24XX_CONFIG_UART_2);103 #endif104 #ifdef LPC24XX_CONFIG_UART_3105 lpc24xx_module_enable(LPC24XX_MODULE_UART_3, LPC24XX_MODULE_CCLK);106 lpc24xx_io_config(LPC24XX_MODULE_UART_3, LPC24XX_CONFIG_UART_3);107 #endif108 105 } -
c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
r76134c5 rd74ed4a 8 8 9 9 /* 10 * Copyright (c) 2008, 2009 11 * embedded brains GmbH 12 * Obere Lagerstr. 30 13 * D-82178 Puchheim 14 * Germany 15 * <rtems@embedded-brains.de> 10 * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. 11 * 12 * embedded brains GmbH 13 * Obere Lagerstr. 30 14 * 82178 Puchheim 15 * Germany 16 * <rtems@embedded-brains.de> 16 17 * 17 18 * The license and distribution terms for this file may be … … 24 25 #include <bspopts.h> 25 26 #include <bsp/start.h> 27 #include <bsp/linker-symbols.h> 26 28 #include <bsp/lpc24xx.h> 27 #include <bsp/l inker-symbols.h>29 #include <bsp/lpc-emc.h> 28 30 29 31 #if defined(LPC24XX_EMC_MICRON) || defined(LPC24XX_EMC_NUMONYX) 30 32 #define LPC24XX_EMC_INIT 31 33 #endif 34 35 static volatile lpc_emc *const emc = (lpc_emc *) EMC_BASE_ADDR; 36 37 typedef struct { 38 uint32_t refresh; 39 uint32_t readconfig; 40 uint32_t trp; 41 uint32_t tras; 42 uint32_t tsrex; 43 uint32_t tapr; 44 uint32_t tdal; 45 uint32_t twr; 46 uint32_t trc; 47 uint32_t trfc; 48 uint32_t txsr; 49 uint32_t trrd; 50 uint32_t tmrd; 51 } lpc24xx_emc_dynamic_config; 52 53 typedef struct { 54 uint32_t config; 55 uint32_t rascas; 56 uint32_t mode; 57 } lpc24xx_emc_dynamic_chip_config; 58 59 typedef struct { 60 uint32_t config; 61 uint32_t waitwen; 62 uint32_t waitoen; 63 uint32_t waitrd; 64 uint32_t waitpage; 65 uint32_t waitwr; 66 uint32_t waitrun; 67 } lpc24xx_emc_static_chip_config; 32 68 33 69 #ifdef LPC24XX_EMC_MICRON … … 56 92 } 57 93 58 static void BSP_START_TEXT_SECTION lpc24xx_cpu_delay( 59 unsigned ticks 60 ) 94 static void BSP_START_TEXT_SECTION lpc24xx_cpu_delay(unsigned ticks) 61 95 { 62 96 unsigned i = 0; … … 69 103 } 70 104 } 105 106 static void BSP_START_TEXT_SECTION lpc24xx_udelay(unsigned us) 107 { 108 lpc24xx_cpu_delay(us * (LPC24XX_CCLK / 1000000)); 109 } 71 110 #endif 72 111 73 /** 74 * @brief EMC initialization hook 0. 75 */ 76 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_0(void) 112 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_pinsel(void) 113 { 114 #ifdef LPC24XX_EMC_INIT 115 static const BSP_START_DATA_SECTION uint32_t pinsel_5_9 [5] = { 116 0x05010115, 117 0x55555555, 118 0x0, 119 0x55555555, 120 0x40050155 121 }; 122 123 bsp_start_memcpy( 124 (int *) &PINSEL5, 125 (const int *) &pinsel_5_9, 126 sizeof(pinsel_5_9) 127 ); 128 #endif 129 } 130 131 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_static(void) 77 132 { 78 133 #ifdef LPC24XX_EMC_NUMONYX … … 81 136 * 82 137 * 1 clock cycle = 1/72MHz = 13.9ns 83 *84 * We cannot use an initializer since this will result in the usage of the85 * read-only data section which is not available here.86 138 */ 87 lpc24xx_emc_static numonyx; 88 89 /* 90 * 16 bit, page mode disabled, active LOW chip select, extended wait 91 * disabled, writes not protected, byte lane state LOW/LOW (!). 92 */ 93 numonyx.cfg = 0x81; 94 95 /* 1 clock cycles delay from the chip select 1 to the write enable */ 96 numonyx.waitwen = 0; 97 98 /* 99 * 0 clock cycles delay from the chip select 1 or address change 100 * (whichever is later) to the output enable 101 */ 102 numonyx.waitoen = 0; 103 104 /* 7 clock cycles delay from the chip select 1 to the read access */ 105 numonyx.waitrd = 0x6; 106 107 /* 108 * 32 clock cycles delay for asynchronous page mode sequential accesses 109 */ 110 numonyx.waitpage = 0x1f; 111 112 /* 5 clock cycles delay from the chip select 1 to the write access */ 113 numonyx.waitwr = 0x3; 114 115 /* 16 bus turnaround cycles */ 116 numonyx.waitrun = 0xf; 117 #endif 118 119 #ifdef LPC24XX_EMC_INIT 120 /* Set pin functions for EMC */ 121 PINSEL5 = (PINSEL5 & 0xf000f000) | 0x05550555; 122 PINSEL6 = 0x55555555; 123 PINSEL8 = 0x55555555; 124 PINSEL9 = (PINSEL9 & 0x0f000000) | 0x50555555; 125 #endif 126 127 #ifdef LPC24XX_EMC_NUMONYX 128 /* Static Memory 1 settings */ 139 static const BSP_START_DATA_SECTION lpc24xx_emc_static_chip_config chip_config = { 140 /* 141 * 16 bit, page mode disabled, active LOW chip select, extended wait 142 * disabled, writes not protected, byte lane state LOW/LOW (!). 143 */ 144 .config = 0x81, 145 146 /* 1 clock cycles delay from the chip select 1 to the write enable */ 147 .waitwen = 0, 148 149 /* 150 * 0 clock cycles delay from the chip select 1 or address change 151 * (whichever is later) to the output enable 152 */ 153 .waitoen = 0, 154 155 /* 7 clock cycles delay from the chip select 1 to the read access */ 156 .waitrd = 0x6, 157 158 /* 159 * 32 clock cycles delay for asynchronous page mode sequential accesses 160 */ 161 .waitpage = 0x1f, 162 163 /* 5 clock cycles delay from the chip select 1 to the write access */ 164 .waitwr = 0x3, 165 166 /* 16 bus turnaround cycles */ 167 .waitrun = 0xf 168 }; 169 lpc24xx_emc_static_chip_config chip_config_on_stack; 170 171 bsp_start_memcpy( 172 (int *) &chip_config_on_stack, 173 (const int *) &chip_config, 174 sizeof(chip_config_on_stack) 175 ); 129 176 bsp_start_memcpy( 130 177 (int *) EMC_STA_BASE_1, 131 (const int *) & numonyx,132 sizeof( numonyx)178 (const int *) &chip_config_on_stack, 179 sizeof(chip_config_on_stack) 133 180 ); 134 181 #endif 135 182 } 136 183 137 /** 138 * @brief EMC initialization hook 1. 139 */ 140 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_1(void) 184 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_memory_map(void) 141 185 { 142 186 #ifdef LPC24XX_EMC_INIT … … 144 188 EMC_CTRL &= ~0x2U; 145 189 #endif 146 190 } 191 192 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_dynamic(void) 193 { 147 194 #ifdef LPC24XX_EMC_MICRON 195 /* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */ 196 197 static const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_config dynamic_config = { 198 /* Auto-refresh command every 15.6 us */ 199 .refresh = 0x46, 200 201 /* Use command delayed strategy */ 202 .readconfig = 1, 203 204 /* Precharge command period 20 ns */ 205 .trp = 1, 206 207 /* Active to precharge command period 44 ns */ 208 .tras = 3, 209 210 /* FIXME */ 211 .tsrex = 5, 212 213 /* FIXME */ 214 .tapr = 2, 215 216 /* Data-in to active command period tWR + tRP */ 217 .tdal = 4, 218 219 /* Write recovery time 15 ns */ 220 .twr = 1, 221 222 /* Active to active command period 66 ns */ 223 .trc = 4, 224 225 /* Auto refresh period 66 ns */ 226 .trfc = 4, 227 228 /* Exit self refresh to active command period 75 ns */ 229 .txsr = 5, 230 231 /* Active bank a to active bank b command period 15 ns */ 232 .trrd = 1, 233 234 /* Load mode register to active or refresh command period 2 tCK */ 235 .tmrd = 1, 236 }; 237 static const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_chip_config chip_config = { 238 /* 239 * Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected writes 240 */ 241 .config = 0x280, 242 243 .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0), 244 .mode = 0xa0000000 | (0x23 << (1 + 2 + 8)) 245 }; 246 247 volatile lpc_emc_dynamic *chip = &emc->dynamic [0]; 248 uint32_t dynamiccontrol = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS; 249 148 250 /* Check if we need to initialize it */ 149 if (( EMC_DYN_CFG0 & 0x00080000) == 0) {251 if ((chip->config & EMC_DYN_CFG_B) == 0) { 150 252 /* 151 253 * The buffer enable bit is not set. Now we assume that the controller … … 154 256 155 257 /* Global dynamic settings */ 156 157 /* FIXME */ 158 EMC_DYN_APR = 2; 159 160 /* Data-in to active command period tWR + tRP */ 161 EMC_DYN_DAL = 4; 162 163 /* Load mode register to active or refresh command period 2 tCK */ 164 EMC_DYN_MRD = 1; 165 166 /* Active to precharge command period 44 ns */ 167 EMC_DYN_RAS = 3; 168 169 /* Active to active command period 66 ns */ 170 EMC_DYN_RC = 4; 171 172 /* Use command delayed strategy */ 173 EMC_DYN_RD_CFG = 1; 174 175 /* Auto refresh period 66 ns */ 176 EMC_DYN_RFC = 4; 177 178 /* Precharge command period 20 ns */ 179 EMC_DYN_RP = 1; 180 181 /* Active bank a to active bank b command period 15 ns */ 182 EMC_DYN_RRD = 1; 183 184 /* FIXME */ 185 EMC_DYN_SREX = 5; 186 187 /* Write recovery time 15 ns */ 188 EMC_DYN_WR = 1; 189 190 /* Exit self refresh to active command period 75 ns */ 191 EMC_DYN_XSR = 5; 192 193 /* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */ 258 emc->dynamicreadconfig = dynamic_config.readconfig; 259 emc->dynamictrp = dynamic_config.trp; 260 emc->dynamictras = dynamic_config.tras; 261 emc->dynamictsrex = dynamic_config.tsrex; 262 emc->dynamictapr = dynamic_config.tapr; 263 emc->dynamictdal = dynamic_config.tdal; 264 emc->dynamictwr = dynamic_config.twr; 265 emc->dynamictrc = dynamic_config.trc; 266 emc->dynamictrfc = dynamic_config.trfc; 267 emc->dynamictxsr = dynamic_config.txsr; 268 emc->dynamictrrd = dynamic_config.trrd; 269 emc->dynamictmrd = dynamic_config.tmrd; 270 271 /* Wait 100us after the power is applied and the clocks have stabilized */ 272 lpc24xx_udelay(100); 273 274 /* NOP period, disable self-refresh */ 275 emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_NOP; 276 lpc24xx_udelay(200); 277 278 /* Precharge all */ 279 emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_PALL; 194 280 195 281 /* 196 * Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected writes 282 * Perform several refresh cycles with a memory refresh every 16 AHB 283 * clock cycles. Wait until eight SDRAM refresh cycles have occurred 284 * (128 AHB clock cycles). 197 285 */ 198 EMC_DYN_CFG0 = 0x0280; 199 200 /* CAS and RAS latency */ 201 EMC_DYN_RASCAS0 = 0x0202; 202 203 /* Wait 50 micro seconds */ 204 lpc24xx_cpu_delay(3600); 205 206 /* Send command: NOP */ 207 EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_NOP; 208 209 /* Wait 50 micro seconds */ 210 lpc24xx_cpu_delay(3600); 211 212 /* Send command: PRECHARGE ALL */ 213 EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_PALL; 214 215 /* Shortest possible refresh period */ 216 EMC_DYN_RFSH = 0x01; 217 218 /* Wait at least 128 AHB clock cycles */ 286 emc->dynamicrefresh = 1; 219 287 lpc24xx_cpu_delay(128); 220 288 221 /* Wait 1 micro second */222 lpc24xx_cpu_delay(72);223 224 289 /* Set refresh period */ 225 EMC_DYN_RFSH = 0x46; 226 227 /* Send command: MODE */ 228 EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_MODE; 229 230 /* Set mode register in SDRAM */ 231 *((volatile uint32_t *) (0xa0000000 | (0x23 << (1 + 2 + 8)))); 232 233 /* Send command: NORMAL */ 234 EMC_DYN_CTRL = 0; 290 emc->dynamicrefresh = dynamic_config.refresh; 291 292 /* Operational values for the chip */ 293 chip->rascas = chip_config.rascas; 294 chip->config = chip_config.config; 295 296 /* Mode */ 297 emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE; 298 *((volatile uint32_t *) chip_config.mode); 299 300 /* Normal operation */ 301 emc->dynamiccontrol = 0; 235 302 236 303 /* Enable buffer */ 237 EMC_DYN_CFG0 |= 0x00080000;304 chip->config |= EMC_DYN_CFG_B; 238 305 239 306 /* Test RAM */ … … 356 423 void BSP_START_TEXT_SECTION bsp_start_hook_0(void) 357 424 { 358 /* Initialize PLL */359 425 lpc24xx_init_pll(); 360 361 /* Initialize EMC hook 0 */ 362 lpc24xx_init_emc_0(); 426 lpc24xx_init_emc_pinsel(); 427 lpc24xx_init_emc_static(); 363 428 } 364 429 … … 396 461 FIO4CLR = 0xffffffff; 397 462 398 /* Initialize EMC hook 1 */399 lpc24xx_init_emc_ 1();463 lpc24xx_init_emc_memory_map(); 464 lpc24xx_init_emc_dynamic(); 400 465 401 466 #ifdef LPC24XX_STOP_GPDMA
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