Changeset d5ff46bd in rtems


Ignore:
Timestamp:
Jun 30, 2016, 10:05:33 PM (3 years ago)
Author:
Pavel Pisa <pisa@…>
Branches:
4.11
Children:
9aaf8f2
Parents:
c6e0201
git-author:
Pavel Pisa <pisa@…> (06/30/16 22:05:33)
git-committer:
Pavel Pisa <pisa@…> (10/02/16 08:40:33)
Message:

arm/score and shared: define ARM hypervisor mode and alternate vector table base access.

The main reason for inclusion of minimum hypervisor related defines
is that current ARM boards firmware and loaders (U-boot for example)
start loaded operating system kernel in HYP mode to allow it take
control of virtualization (Linux/KVM for example).

Updates #2783

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/shared/include/arm-cp15.h

    rc6e0201 rd5ff46bd  
    13251325}
    13261326
     1327ARM_CP15_TEXT_SECTION static inline void
     1328*arm_cp15_get_hyp_vector_base_address(void)
     1329{
     1330  ARM_SWITCH_REGISTERS;
     1331  void *base;
     1332
     1333  __asm__ volatile (
     1334    ARM_SWITCH_TO_ARM
     1335    "mrc p15, 4, %[base], c12, c0, 0\n"
     1336    ARM_SWITCH_BACK
     1337    : [base] "=&r" (base) ARM_SWITCH_ADDITIONAL_OUTPUT
     1338  );
     1339
     1340  return base;
     1341}
     1342
     1343ARM_CP15_TEXT_SECTION static inline void
     1344arm_cp15_set_hyp_vector_base_address(void *base)
     1345{
     1346  ARM_SWITCH_REGISTERS;
     1347
     1348  __asm__ volatile (
     1349    ARM_SWITCH_TO_ARM
     1350    "mcr p15, 4, %[base], c12, c0, 0\n"
     1351    ARM_SWITCH_BACK
     1352    : ARM_SWITCH_OUTPUT
     1353    : [base] "r" (base)
     1354  );
     1355}
     1356
    13271357/**
    13281358 * @brief Sets the @a section_flags for the address range [@a begin, @a end).
  • cpukit/score/cpu/arm/rtems/score/cpu.h

    rc6e0201 rd5ff46bd  
    8383#define ARM_PSR_M_SVC 0x13
    8484#define ARM_PSR_M_ABT 0x17
     85#define ARM_PSR_M_HYP 0x1a
    8586#define ARM_PSR_M_UND 0x1b
    8687#define ARM_PSR_M_SYS 0x1f
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