Changeset d5fa273e in rtems

Timestamp:

07/23/03 18:07:04 (20 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Children:

c213219

Parents:

36e95a87

Message:

2003-07-18 Till Straumann <strauman@…>

PR 288/rtems

• support/new_exception_processing/cpu.c: _ISR_Nest_level is now properly maintained and does not reside in SPRG0.

Location:

c/src/lib/libbsp/powerpc

Files:

• ChangeLog (modified) (1 diff)
• support/new_exception_processing/cpu.c (modified) (2 diffs)

c/src/lib/libbsp/powerpc/ChangeLog

@@ +1 @@
+2003-07-18      Till Straumann <strauman@slac.stanford.edu>
+
+        PR 288/rtems
+        * support/new_exception_processing/cpu.c: _ISR_Nest_level is now
+        properly maintained and does not reside in SPRG0.
+
 2003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 

c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c

@@ -51 +51 @@
 {
   _CPU_Table = *cpu_table;
+
+  { unsigned hasFixed = 0;
+  /* assert that our BSP has fixed PR288 */
+  __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
+  if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
+    BSP_panic("This BSP needs to fix PR#288");
+  }
+  }
 }
 
@@ -144 +152 @@
 }
 
-/*PAGE
- *
- *  This is the PowerPC specific implementation of the routine which
- *  returns TRUE if an interrupt is in progress.
- */
-
-boolean _ISR_Is_in_progress( void )
-{
-  /* 
-   *  Until the patch on PR288 is in all new exception BSPs, this is
-   *  the safest thing to do.
-   */
-#ifdef mpc8260
-  return (_ISR_Nest_level != 0);
-#else
-  register unsigned int isr_nesting_level;
-  /*
-   * Move from special purpose register 0 (mfspr SPRG0, r3)
-   */
-  asm volatile ("mfspr  %0, 272" : "=r" (isr_nesting_level));
-  return isr_nesting_level;
-#endif
-}
-