Changeset d4a95940 in rtems


Ignore:
Timestamp:
Oct 21, 2011, 8:44:23 AM (10 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
5dd62f0
Parents:
488dc6b
Message:

2011-10-21 Sebastian Huber <sebastian.huber@…>

  • nios2-mpu-configuration.c, nios2-mpu-descriptor.c, nios2-mpu-disable-protected.c, nios2-mpu-reset.c: New files.
  • Makefile.am: Reflect changes above.
  • rtems/score/nios2-utility.h, nios2-context-initialize.c: Added support for the memory protection unit (MPU).
Location:
cpukit/score/cpu/nios2
Files:
4 added
4 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/nios2/ChangeLog

    r488dc6b rd4a95940  
     12011-10-21      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * nios2-mpu-configuration.c, nios2-mpu-descriptor.c,
     4        nios2-mpu-disable-protected.c, nios2-mpu-reset.c: New files.
     5        * Makefile.am: Reflect changes above.
     6        * rtems/score/nios2-utility.h, nios2-context-initialize.c: Added
     7        support for the memory protection unit (MPU).
     8
    192011-09-30      Sebastian Huber <sebastian.huber@embedded-brains.de>
    210
  • cpukit/score/cpu/nios2/Makefile.am

    r488dc6b rd4a95940  
    3838libscorecpu_a_SOURCES += nios2-isr-is-in-progress.c
    3939libscorecpu_a_SOURCES += nios2-isr-set-level.c
     40libscorecpu_a_SOURCES += nios2-mpu-configuration.c
     41libscorecpu_a_SOURCES += nios2-mpu-descriptor.c
     42libscorecpu_a_SOURCES += nios2-mpu-disable-protected.c
     43libscorecpu_a_SOURCES += nios2-mpu-reset.c
    4044libscorecpu_a_SOURCES += nios2-thread-dispatch-disabled.c
    4145
  • cpukit/score/cpu/nios2/nios2-context-initialize.c

    r488dc6b rd4a95940  
    2222#include <rtems/score/cpu.h>
    2323#include <rtems/score/nios2-utility.h>
     24#include <rtems/score/interr.h>
    2425
    2526void _CPU_Context_Initialize(
     
    3233)
    3334{
     35  const Nios2_MPU_Configuration *mpu_config = _Nios2_MPU_Get_configuration();
    3436  uint32_t stack = (uint32_t) stack_area_begin + stack_area_size - 4;
    3537
     
    4042  context->sp = stack;
    4143  context->ra = (uint32_t) entry_point;
     44
     45  if ( mpu_config != NULL ) {
     46    Nios2_MPU_Region_descriptor desc = {
     47      .index = mpu_config->data_index_for_stack_protection,
     48      /* FIXME: Brocken stack allocator */
     49      .base = (void *) ((int) stack_area_begin & ~((1 << mpu_config->data_region_size_log2) - 1)),
     50      .end = (char *) stack_area_begin + stack_area_size,
     51      .perm = NIOS2_MPU_DATA_PERM_SVR_READWRITE_USER_NONE,
     52      .data = true,
     53      .cacheable = mpu_config->enable_data_cache_for_stack,
     54      .read = false,
     55      .write = true
     56    };
     57    bool ok = _Nios2_MPU_Setup_region_registers(
     58      mpu_config,
     59      &desc,
     60      &context->stack_mpubase,
     61      &context->stack_mpuacc
     62    );
     63
     64    if ( !ok ) {
     65      /* The task stack allocator must ensure that the stack area is valid */
     66      _Internal_error_Occurred( INTERNAL_ERROR_CORE, false, 0xdeadbeef );
     67    }
     68  }
    4269}
  • cpukit/score/cpu/nios2/rtems/score/nios2-utility.h

    r488dc6b rd4a95940  
    103103#define NIOS2_CONFIG_PE (1 << 0)
    104104
    105 #define NIOS2_MPUBASE_BASE_OFFSET 5
     105#define NIOS2_MPUBASE_BASE_OFFSET 6
    106106#define NIOS2_MPUBASE_BASE_MASK (0x1ffffff << NIOS2_MPUBASE_BASE_OFFSET)
    107107#define NIOS2_MPUBASE_INDEX_OFFSET 1
     
    133133#ifndef ASM
    134134
     135#include <stddef.h>
    135136#include <stdint.h>
    136137#include <stdbool.h>
     
    169170extern char _Nios2_ISR_Status_bits [];
    170171
     172/**
     173 * @brief This global variable indicates that the Nios2 MPU is active
     174 *
     175 * This global variable is set to 1 when the board support package
     176 * initializes the MPU during startup.
     177 */
     178extern uint32_t _Nios2_Mpu_active;
     179
    171180static inline uint32_t _Nios2_Get_ctlreg_status( void )
    172181{
     
    306315uint32_t _Nios2_ISR_Set_level( uint32_t new_level, uint32_t status );
    307316
     317typedef struct {
     318  int data_address_width;
     319  int instruction_address_width;
     320  int data_region_size_log2;
     321  int instruction_region_size_log2;
     322  int data_region_count;
     323  int instruction_region_count;
     324  int data_index_for_stack_protection;
     325  bool region_uses_limit;
     326  bool enable_data_cache_for_stack;
     327} Nios2_MPU_Configuration;
     328
     329void _Nios2_MPU_Set_configuration( const Nios2_MPU_Configuration *config );
     330
     331const Nios2_MPU_Configuration *_Nios2_MPU_Get_configuration( void );
     332
     333typedef enum {
     334  NIOS2_MPU_INST_PERM_SVR_NONE_USER_NONE = 0,
     335  NIOS2_MPU_INST_PERM_SVR_EXECUTE_USER_NONE,
     336  NIOS2_MPU_INST_PERM_SVR_EXECUTE_USER_EXECUTE,
     337  NIOS2_MPU_DATA_PERM_SVR_NONE_USER_NONE = 0,
     338  NIOS2_MPU_DATA_PERM_SVR_READONLY_USER_NONE,
     339  NIOS2_MPU_DATA_PERM_SVR_READONLY_USER_READONLY,
     340  NIOS2_MPU_DATA_PERM_SVR_READWRITE_USER_NONE = 4,
     341  NIOS2_MPU_DATA_PERM_SVR_READWRITE_USER_READONLY,
     342  NIOS2_MPU_DATA_PERM_SVR_READWRITE_USER_READWRITE
     343} Nios2_MPU_Region_permissions;
     344
     345typedef struct {
     346  int index;
     347  const void *base;
     348  const void *end;
     349  Nios2_MPU_Region_permissions perm;
     350  bool data;
     351  bool cacheable;
     352  bool read;
     353  bool write;
     354} Nios2_MPU_Region_descriptor;
     355
     356#define NIOS2_MPU_REGION_DESC_INST( index, base, end ) \
     357  { \
     358    (index), (base), (end), NIOS2_MPU_INST_PERM_SVR_EXECUTE_USER_NONE, \
     359    false, false, false, true \
     360  }
     361
     362#define NIOS2_MPU_REGION_DESC_DATA_RO( index, base, end ) \
     363  { \
     364    (index), (base), (end), NIOS2_MPU_DATA_PERM_SVR_READONLY_USER_NONE, \
     365    true, true, false, true \
     366  }
     367
     368#define NIOS2_MPU_REGION_DESC_DATA_RW( index, base, end ) \
     369  { \
     370    (index), (base), (end), NIOS2_MPU_DATA_PERM_SVR_READWRITE_USER_NONE, \
     371    true, true, false, true \
     372  }
     373
     374#define NIOS2_MPU_REGION_DESC_DATA_IO( index, base, end ) \
     375  { \
     376    (index), (base), (end), NIOS2_MPU_DATA_PERM_SVR_READWRITE_USER_NONE, \
     377    true, false, false, true \
     378  }
     379
     380bool _Nios2_MPU_Setup_region_registers(
     381  const Nios2_MPU_Configuration *config,
     382  const Nios2_MPU_Region_descriptor *desc,
     383  uint32_t *mpubase,
     384  uint32_t *mpuacc
     385);
     386
     387static inline void _Nios2_MPU_Get_region_registers(
     388  int index,
     389  bool data,
     390  uint32_t *mpubase,
     391  uint32_t *mpuacc
     392)
     393{
     394  uint32_t base = (uint32_t)
     395    (((index << NIOS2_MPUBASE_INDEX_OFFSET) & NIOS2_MPUBASE_INDEX_MASK)
     396      | (data ? NIOS2_MPUBASE_D : 0));
     397
     398  _Nios2_Set_ctlreg_mpubase( base );
     399  _Nios2_Set_ctlreg_mpuacc( NIOS2_MPUACC_RD );
     400  *mpubase = _Nios2_Get_ctlreg_mpubase() | base;
     401  *mpuacc = _Nios2_Get_ctlreg_mpuacc();
     402}
     403
     404static inline void _Nios2_MPU_Enable( void )
     405{
     406  uint32_t config = _Nios2_Get_ctlreg_config();
     407
     408  _Nios2_Set_ctlreg_config( config | NIOS2_CONFIG_PE );
     409}
     410
     411static inline uint32_t _Nios2_MPU_Disable( void )
     412{
     413  uint32_t config = _Nios2_Get_ctlreg_config();
     414  uint32_t config_pe = NIOS2_CONFIG_PE;
     415
     416  _Nios2_Set_ctlreg_config( config & ~config_pe );
     417
     418  return config;
     419}
     420
     421static inline void _Nios2_MPU_Restore( uint32_t config )
     422{
     423  _Nios2_Set_ctlreg_config( config );
     424}
     425
     426uint32_t _Nios2_MPU_Disable_protected( void );
     427
     428void _Nios2_MPU_Reset( const Nios2_MPU_Configuration *config );
     429
    308430#ifdef __cplusplus
    309431}
    310432#endif /* __cplusplus */
    311433
    312 #endif /* !ASM */
     434#else /* ASM */
     435
     436        .macro  NIOS2_ASM_DISABLE_INTERRUPTS new_status, current_status
     437        movhi   \new_status, %hiadj(_Nios2_ISR_Status_mask)
     438        addi    \new_status, \new_status, %lo(_Nios2_ISR_Status_mask)
     439        and     \new_status, \current_status, \new_status
     440        ori     \new_status, \new_status, %lo(_Nios2_ISR_Status_bits)
     441        wrctl   status, \new_status
     442        .endm
     443
     444#endif /* ASM */
    313445
    314446#endif /* _RTEMS_SCORE_NIOS2_UTILITY_H */
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