Changeset d4a4811 in rtems


Ignore:
Timestamp:
Apr 19, 2013, 12:01:47 PM (6 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
7a44d06
Parents:
dbe6aae7
git-author:
Sebastian Huber <sebastian.huber@…> (04/19/13 12:01:47)
git-committer:
Sebastian Huber <sebastian.huber@…> (04/23/13 07:59:57)
Message:

bsp/mpc5200: Set SDELAY register

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/gen5200/start/start.S

    rdbe6aae7 rd4a4811  
    120120.set    CFG2,                   0x10C
    121121.set    ADRSEL,                 0x110
     122.set    SDELAY,                 0x190
    122123
    123124/* Register offsets of MPC5x00 GPIO registers needed */
     
    523524
    524525#endif
     526
     527        #define SDELAY_VAL 0x00000004
     528
     529        LWI     r3, SDELAY_VAL
     530        stw     r3, SDELAY(r31)
     531
    525532        LWI     r30, 0xC4222600                 /* Single Read2Read/Write delay=0xC, Single Write2Read/Prec. delay=0x4 */
    526533        stw     r30, CFG1(r31)                  /* Read CAS latency=0x2, Active2Read delay=0x2, Prec.2active delay=0x2 */
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