Changeset d468669 in umon


Ignore:
Timestamp:
Jun 20, 2015, 2:52:45 PM (4 years ago)
Author:
Jarielle Catbagan <jcatbagan93@…>
Branches:
master
Children:
eb2caa2
Parents:
d47f458
git-author:
Jarielle Catbagan <jcatbagan93@…> (06/20/15 14:52:45)
git-committer:
Ed Sutter <edsutterjr@…> (06/27/15 12:42:51)
Message:

BBB/AM335x: Store addresses of custom exception handlers in the Public RAM reserved for exception vectors

The AM335x jumps to a predefined location when handling an exception. The default locations of the
exception handlers are tablified in Table 26-3 under Section 26.1.3.2 in the AM335x TRM. When Umon
is executing and an exception occurs the AM335x will normally try to jump to the default exception
handler appropriate for the exception that has occured. Since Umon defines a set of custom exception
handlers, the addresses of these exception handlers must be stored in the RAM exception vector
space in the Public RAM of the AM335x. This is done so that when an exception occurs, instead of
program execution being transferred to one of the default exception handlers, it will instead be
transferred to a custom exception handler defined by Umon.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • ports/beagleboneblack/rom_reset.S

    rd47f458 rd468669  
    9494        msr     cpsr,r0
    9595
     96        /* store the address of the custom exception handlers in the exception vector space
     97           of the AM335x Public RAM */
     98        ldr r1, =undefined_instruction
     99        movw r2, #0xce24
     100        movt r2, #0x4030
     101        str r1, [r2]
     102
     103        ldr r1, =software_interrupt
     104        movw r2, #0xce28
     105        movt r2, #0x4030
     106        str r1, [r2]
     107
     108        ldr r1, =abort_prefetch
     109        movw r2, #0xce2c
     110        movt r2, #0x4030
     111        str r1, [r2]
     112
     113        ldr r1, =abort_data
     114        movw r2, #0xce30
     115        movt r2, #0x4030
     116        str r1, [r2]
     117
     118        ldr r1, =not_assigned
     119        movw r2, #0xce34
     120        movt r2, #0x4030
     121        str r1, [r2]
     122
     123        ldr r1, =interrupt_request
     124        movw r2, #0xce38
     125        movt r2, #0x4030
     126        str r1, [r2]
     127
     128        ldr r1, =fast_interrupt_request
     129        movw r2, #0xce3c
     130        movt r2, #0x4030
     131        str r1, [r2]
     132
    96133//      bl cache_init
    97134
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