Changeset d40b09d in rtems


Ignore:
Timestamp:
Jun 6, 2012, 1:03:37 PM (8 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
f7deb58
Parents:
7329f55
git-author:
Sebastian Huber <sebastian.huber@…> (06/06/12 13:03:37)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/15/12 13:59:33)
Message:

bsp/lpc24xx: New BSP variants (PLX800 on LPC1778)

Location:
c/src/lib/libbsp/arm/lpc24xx
Files:
4 added
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/lpc24xx/Makefile.am

    r7329f55 rd40b09d  
    6868EXTRA_DIST += startup/linkcmds.lpc17xx_ea_ram
    6969EXTRA_DIST += startup/linkcmds.lpc17xx_ea_rom_int
     70EXTRA_DIST += startup/linkcmds.lpc17xx_plx800_ram
     71EXTRA_DIST += startup/linkcmds.lpc17xx_plx800_rom_int
    7072EXTRA_DIST += startup/linkcmds.lpc2362
    7173EXTRA_DIST += startup/linkcmds.lpc23xx_tli800
  • c/src/lib/libbsp/arm/lpc24xx/configure.ac

    r7329f55 rd40b09d  
    3333RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
    3434
    35 RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[120000000U])
    36 #RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[96000000U])
    37 #RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[48000000U])
     35RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17xx_ea*],[120000000U])
    3836RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc23*],[58982400U])
    3937RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc24xx_plx800_*],[51612800U])
     
    4139RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
    4240
    43 RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[lpc17*],[2U])
     41RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[lpc17xx_ea*],[2U])
    4442RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[*],[1U])
    45 RTEMS_BSPOPTS_HELP([LPC24XX_PCLKDIV],[peripheral clock divider for default PCLK (PCLK = CCLK / PCLKDIV)])
     43RTEMS_BSPOPTS_HELP([LPC24XX_PCLKDIV],[clock divider for default PCLK (PCLK = CCLK / PCLKDIV)])
    4644
    47 RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[lpc17*],[2U])
     45RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[lpc17xx_ea*],[2U])
    4846RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[*],[1U])
    49 RTEMS_BSPOPTS_HELP([LPC24XX_EMCCLKDIV],[peripheral clock divider for default EMCCLK (EMCCLK = CCLK / EMCCLKDIV)])
     47RTEMS_BSPOPTS_HELP([LPC24XX_EMCCLKDIV],[clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV)])
    5048
    5149RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U])
     
    6159RTEMS_BSPOPTS_HELP([LPC24XX_EMC_W9825G2JB75I],[enable Winbond W9825G2JB75I configuration for EMC])
    6260
    63 RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800D7],[lpc24xx_plx800_rom_*],[1])
     61RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800D7],[*_plx800_rom_*],[1])
    6462RTEMS_BSPOPTS_HELP([LPC24XX_EMC_IS42S32800D7],[enable ISSI IS42S32800D7 configuration for EMC])
    6563
     
    7068RTEMS_BSPOPTS_HELP([LPC24XX_EMC_M29W160E],[enable M29W160E configuration for EMC])
    7169
    72 RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W320E70],[lpc24xx_plx800_rom_*],[1])
     70RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W320E70],[*_plx800_rom_*],[1])
    7371RTEMS_BSPOPTS_HELP([LPC24XX_EMC_M29W320E70],[enable M29W320E70 configuration for EMC])
    7472
     
    8179RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_CONSOLE],[configuration for console (UART 0)])
    8280
    83 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[lpc24xx_plx800_*],[0])
     81RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*_plx800_*],[0])
    8482RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1])
    8583
    8684RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc23*],[0])
    8785RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_ncs_*],[0])
    88 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_plx800_*],[0])
     86RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[*_plx800_*],[0])
    8987RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2])
    9088
  • c/src/lib/libbsp/arm/lpc24xx/include/bspopts.h.in

    r7329f55 rd40b09d  
    4343#undef LPC24XX_CONFIG_UART_3
    4444
    45 /* peripheral clock divider for default EMCCLK (EMCCLK = CCLK / EMCCLKDIV) */
     45/* clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV) */
    4646#undef LPC24XX_EMCCLKDIV
    4747
     
    8282#undef LPC24XX_OSCILLATOR_RTC
    8383
    84 /* peripheral clock divider for default PCLK (PCLK = CCLK / PCLKDIV) */
     84/* clock divider for default PCLK (PCLK = CCLK / PCLKDIV) */
    8585#undef LPC24XX_PCLKDIV
    8686
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