Changeset d3db8ae in rtems for c/src/lib/libbsp/mips/csb350


Ignore:
Timestamp:
Apr 26, 2005, 11:14:13 PM (15 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
6bb9a8a4
Parents:
6191ee4
Message:

2005-04-26 Joel Sherrill <joel@…>

  • clock/clockdrv.c: Add include of rtems/bspIo.h.
  • include/tm27.h: Delete TX3904 code and leave stub.
  • network/network.c: Eliminate warnings.
  • startup/bspclean.c: Add include of rtems/bspIo.h. Reformat.
Location:
c/src/lib/libbsp/mips/csb350
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/mips/csb350/ChangeLog

    r6191ee4 rd3db8ae  
     12005-04-26      Joel Sherrill <joel@OARcorp.com>
     2
     3        * clock/clockdrv.c: Add include of rtems/bspIo.h.
     4        * include/tm27.h: Delete TX3904 code and leave stub.
     5        * network/network.c: Eliminate warnings.
     6        * startup/bspclean.c: Add include of rtems/bspIo.h.  Reformat.
     7
    182005-03-14      Joel Sherrill <joel@OARcorp.com>
    29
  • c/src/lib/libbsp/mips/csb350/clock/clockdrv.c

    r6191ee4 rd3db8ae  
    1717#include <bsp.h>
    1818#include <libcpu/au1x00.h>
    19 
     19#include <rtems/bspIo.h>
    2020
    2121unsigned32 tick_interval;
  • c/src/lib/libbsp/mips/csb350/include/tm27.h

    r6191ee4 rd3db8ae  
    2222#define MUST_WAIT_FOR_INTERRUPT 1
    2323
    24 #if 0
    25 #define Install_tm27_vector( handler ) \
    26     (void) set_vector( handler, TX3904_IRQ_SOFTWARE_1, 1 ); \
    27 
    28 #define Cause_tm27_intr() \
    29     asm volatile ( "syscall 0x01" : : );
    30 
    31 #define CLOCK_VECTOR TX3904_IRQ_TMR0
    32 
    33 #define Clear_tm27_intr() /* empty */
    34 
    35 #define Lower_tm27_intr() /* empty */
    36 #else
    37 #define Install_tm27_vector( handler ) \
    38     (void) set_vector( handler, TX3904_IRQ_TMR0, 1 ); \
     24#define Install_tm27_vector( handler )
    3925
    4026#define Cause_tm27_intr() \
    4127  do { \
    42     uint32_t   _clicks = 20; \
    43     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
    44     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \
    45     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \
    46     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \
    47     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR,   0xC0 ); \
    48     *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \
     28    ; \
    4929  } while(0)
    5030
    5131#define Clear_tm27_intr() \
    5232  do { \
    53     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \
    54     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
    55     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR,   0x00 ); \
     33    ; \
    5634  } while(0)
    5735
    58 #define Lower_tm27_intr() \
    59   mips_enable_in_interrupt_mask( 0xff01 );
     36#define Lower_tm27_intr()
    6037
    6138#endif
    62 
    63 #endif
  • c/src/lib/libbsp/mips/csb350/network/network.c

    r6191ee4 rd3db8ae  
    1515#include <rtems/rtems_bsdnet.h>
    1616#include <bsp.h>
     17#include <rtems/bspIo.h>
    1718#include <libcpu/au1x00.h>
    1819
     
    132133} au1x00_emac_softc_t;
    133134
    134 static volatile au1x00_emac_softc_t softc[NUM_IFACES];
     135static au1x00_emac_softc_t softc[NUM_IFACES];
    135136
    136137
     
    241242     */
    242243   
    243     memset(sc, 0, sizeof(*sc));
     244    memset((void *)sc, 0, sizeof(*sc));
    244245   
    245246    sc->unitnumber = unitnumber;
     
    459460         */
    460461        if (mtod(m, unsigned32) & 0x1f) {
    461           unsigned32 *p = &mtod(m, unsigned32);
     462          unsigned32 *p = mtod(m, unsigned32 *);
    462463          *p = (mtod(m, unsigned32) + 0x1f) & 0x1f;
    463464        }
     
    654655                 * boundary.
    655656                 */
    656                 { unsigned32 *p = &mtod(m, unsigned32);
     657                {
     658                  unsigned32 *p = mtod(m, unsigned32 *);
    657659                  *p = (mtod(m, unsigned32) + 0x1f) & ~0x1f;
    658660                }
     
    829831{
    830832    volatile au1x00_emac_softc_t *sc;
    831     int index;
    832833    int tx_flag = 0;
    833834    int rx_flag = 0;
    834835
    835     if (v == AU1X00_IRQ_MAC0) {
    836         sc = &softc[0];
    837     } else {
    838         assert(v == AU1X00_IRQ_MAC0);
     836    sc = &softc[0];
     837    if (v != AU1X00_IRQ_MAC0) {
     838      assert(v == AU1X00_IRQ_MAC0);
    839839    }
    840840
  • c/src/lib/libbsp/mips/csb350/startup/bspclean.c

    r6191ee4 rd3db8ae  
    1111#include <rtems.h>
    1212#include <libcpu/au1x00.h>
     13#include <rtems/bspIo.h>
    1314
    1415void bsp_cleanup( void )
    1516{
    16     void (*reset_func)(void);
     17  int console_inbyte_nonblocking(int);
     18  void (*reset_func)(void);
    1719 
    18     reset_func = (void *)0xbfc00000;
     20  reset_func = (void *)0xbfc00000;
    1921
    20     mips_set_sr( 0x00200000 ); /* all interrupts off, boot exception vectors */
     22  mips_set_sr( 0x00200000 ); /* all interrupts off, boot exception vectors */
    2123
    22     printk("\nEXECUTIVE SHUTDOWN! Any key to reboot...");
    23     while (console_inbyte_nonblocking(0) < 0) {
    24         continue;
    25     }
     24  printk("\nEXECUTIVE SHUTDOWN! Any key to reboot...");
     25  while (console_inbyte_nonblocking(0) < 0) {
     26    continue;
     27  }
    2628
    27     /* Try to restart bootloader */
    28     reset_func();
    29 
     29  /* Try to restart bootloader */
     30  reset_func();
    3031}
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