Changeset d3a428c in rtems


Ignore:
Timestamp:
Jul 17, 2016, 4:45:46 PM (4 years ago)
Author:
Pavel Pisa <pisa@…>
Branches:
4.11
Children:
22cc8078
Parents:
8c5c8b27
git-author:
Pavel Pisa <pisa@…> (07/17/16 16:45:46)
git-committer:
Pavel Pisa <pisa@…> (10/02/16 08:40:34)
Message:

arm/raspberrypi: use cache manager operations to flush/invalidate all cache levels.

This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.

Updates #2782
Updates #2783

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c

    r8c5c8b27 rd3a428c  
    4747       * before switching off to be extra carefull.
    4848       */
    49       arm_cp15_drain_write_buffer();
    50       arm_cp15_data_cache_clean_and_invalidate();
     49      rtems_cache_flush_entire_data();
     50      rtems_cache_invalidate_entire_data();
    5151    }
    5252    arm_cp15_flush_prefetch_buffer();
    5353    sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
    5454    arm_cp15_set_control(sctlr_val);
    55 
    56     arm_cp15_tlb_invalidate();
    57     arm_cp15_flush_prefetch_buffer();
    58     arm_cp15_data_cache_invalidate();
    59     arm_cp15_instruction_cache_invalidate();
    6055  }
     56  rtems_cache_invalidate_entire_data();
     57  rtems_cache_invalidate_entire_instruction();
     58  arm_cp15_branch_predictor_invalidate_all();
     59  arm_cp15_tlb_invalidate();
     60  arm_cp15_flush_prefetch_buffer();
    6161
    6262  /* Clear Translation Table Base Control Register */
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