Changeset d389819 in rtems-docs for cpu_supplement/sparc64.rst


Ignore:
Timestamp:
Jan 18, 2016, 5:37:40 AM (5 years ago)
Author:
Amar Takhar <amar@…>
Branches:
4.11, 5, am, master
Children:
f916fca
Parents:
11e1a6f
git-author:
Amar Takhar <amar@…> (01/18/16 05:37:40)
git-committer:
Amar Takhar <verm@…> (05/03/16 00:51:24)
Message:

Convert all Unicode to ASCII(128)

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpu_supplement/sparc64.rst

    r11e1a6f rd389819  
    1717The following documents were used in developing the SPARC-64 sun4u port:
    1818
    19 - UltraSPARC  User’s Manual
     19- UltraSPARC  User's Manual
    2020  (http://www.sun.com/microelectronics/manuals/ultrasparc/802-7220-02.pdf)
    2121
     
    105105Each high-level language compiler generates
    106106subroutine entry and exit code based upon a set of rules known
    107 as the compiler’s calling convention.   These rules address the
     107as the compiler's calling convention.   These rules address the
    108108following issues:
    109109
     
    114114- call and return mechanism
    115115
    116 A compiler’s calling convention is of importance when
     116A compiler's calling convention is of importance when
    117117interfacing to subroutines written in another language either
    118118assembly or high-level.  Even when the high-level language and
     
    223223*``Processor State Register (pstate)``*
    224224    The privileged pstate register contains control fields for the proces-
    225     sor’s current state. Its flag fields include the interrupt enable, privi-
     225    sor's current state. Its flag fields include the interrupt enable, privi-
    226226    leged mode, and enable FPU.
    227227
     
    271271Because the set of register windows is finite, it is
    272272possible to execute enough save instructions without
    273 corresponding restore’s to consume all of the register windows.
     273corresponding restore's to consume all of the register windows.
    274274This is easily accomplished in a high level language because
    275275each subroutine typically performs a save instruction upon
     
    282282
    283283Similarly, the subroutines will eventually complete
    284 and begin to perform restore’s.  If the restore results in the
     284and begin to perform restore's.  If the restore results in the
    285285need for a register window which has previously been written to
    286286memory as part of an overflow, then a window underflow condition
     
    339339effective call and return mechanism.  A subroutine is invoked
    340340via the call (call) instruction.  This instruction places the
    341 return address in the caller’s output register 7 (o7).  After
     341return address in the caller's output register 7 (o7).  After
    342342the callee executes a save instruction, this value is available
    343343in input register 7 (i7) until the corresponding restore
     
    347347return address.  There is a delay slot following this
    348348instruction which is commonly used to execute a restore
    349 instruction – if a register window was allocated by this
     349instruction - if a register window was allocated by this
    350350subroutine.
    351351
     
    355355restore instructions which manage the set of registers windows.
    356356This allows for the compiler to generate leaf-optimized functions
    357 that utilize the caller’s output registers without using save and restore.
     357that utilize the caller's output registers without using save and restore.
    358358
    359359Calling Mechanism
     
    377377
    378378RTEMS assumes that arguments are placed in the
    379 caller’s output registers with the first argument in output
     379caller's output registers with the first argument in output
    380380register 0 (o0), the second argument in output register 1 (o1),
    381381and so forth.  Until the callee executes a save instruction, the
     
    411411models ranging from pure physical addressing to complex demand
    412412paged virtual memory systems.  RTEMS supports a flat memory
    413 model which ranges contiguously over the processor’s allowable
     413model which ranges contiguously over the processor's allowable
    414414address space.  RTEMS does not support segmentation or virtual
    415415memory of any kind.  The appropriate memory model for RTEMS
     
    543543performs the following actions:
    544544
    545 - saves the state of the interrupted task on it’s stack,
     545- saves the state of the interrupted task on it's stack,
    546546
    547547- switches the processor to trap level 0,
     
    598598since EVERY task stack would have to include enough space to
    599599account for the worst case interrupt stack requirements in
    600 addition to it’s own worst case usage.  RTEMS addresses this
     600addition to it's own worst case usage.  RTEMS addresses this
    601601problem on the SPARC by providing a dedicated interrupt stack
    602602managed by software.
     
    662662For more information on developing a BSP, refer to the chapter
    663663titled Board Support Packages in the RTEMS
    664 Applications User’s Guide.
     664Applications User's Guide.
    665665
    666666HelenOS and Open Firmware
Note: See TracChangeset for help on using the changeset viewer.