Changeset d1eb7b1 in rtems
- Timestamp:
- 11/19/14 14:07:58 (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 50440c0
- Parents:
- 5f4f828
- git-author:
- Sebastian Huber <sebastian.huber@…> (11/19/14 14:07:58)
- git-committer:
- Sebastian Huber <sebastian.huber@…> (11/20/14 09:30:28)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
r5f4f828 rd1eb7b1 467 467 468 468 rtems_interrupt_lock l2c_310_lock = RTEMS_INTERRUPT_LOCK_INITIALIZER( 469 " cache"469 "L2-310 cache controller" 470 470 ); 471 471 … … 874 874 l2c_310_flush_range( const void* d_addr, const size_t n_bytes ) 875 875 { 876 rtems_interrupt_lock_context lock_context;877 876 /* Back starting address up to start of a line and invalidate until ADDR_LAST */ 878 877 uint32_t adx = (uint32_t)d_addr … … 884 883 volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE; 885 884 886 rtems_interrupt_lock_acquire( &l2c_310_lock, &lock_context );887 888 885 for (; 889 886 adx <= ADDR_LAST; 890 887 adx = block_end + 1, 891 888 block_end = L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES )) { 889 rtems_interrupt_lock_context lock_context; 890 891 rtems_interrupt_lock_acquire( &l2c_310_lock, &lock_context ); 892 892 893 for (; adx <= block_end; adx += CPU_DATA_CACHE_ALIGNMENT ) { 893 894 l2c_310_flush_1_line( l2cc, adx ); 894 895 } 895 if( block_end < ADDR_LAST ) { 896 rtems_interrupt_lock_release( &l2c_310_lock, &lock_context ); 897 rtems_interrupt_lock_acquire( &l2c_310_lock, &lock_context ); 898 } 899 } 900 l2c_310_sync( l2cc ); 901 rtems_interrupt_lock_release( &l2c_310_lock, &lock_context ); 896 897 l2c_310_sync( l2cc ); 898 899 rtems_interrupt_lock_release( &l2c_310_lock, &lock_context ); 900 } 902 901 } 903 902 … … 937 936 938 937 static inline void 939 l2c_310_invalidate_range( uint32_t adx, const uint32_t ADDR_LAST ) 940 { 941 volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE; 942 rtems_interrupt_lock_context lock_context; 943 944 rtems_interrupt_lock_acquire( &l2c_310_lock, &lock_context ); 938 l2c_310_invalidate_range( const void* d_addr, const size_t n_bytes ) 939 { 940 /* Back starting address up to start of a line and invalidate until ADDR_LAST */ 941 uint32_t adx = (uint32_t)d_addr 942 & ~L2C_310_DATA_LINE_MASK; 943 const uint32_t ADDR_LAST = 944 (uint32_t)( (size_t)d_addr + n_bytes - 1 ); 945 uint32_t block_end = 946 L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES ); 947 volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE; 948 945 949 for (; 946 adx <= ADDR_LAST; 947 adx += CPU_INSTRUCTION_CACHE_ALIGNMENT ) { 948 /* Invalidate L2 cache line */ 949 l2cc->inv_pa = adx; 950 } 951 l2c_310_sync( l2cc ); 952 rtems_interrupt_lock_release( &l2c_310_lock, &lock_context ); 953 } 950 adx <= ADDR_LAST; 951 adx = block_end + 1, 952 block_end = L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES )) { 953 rtems_interrupt_lock_context lock_context; 954 955 rtems_interrupt_lock_acquire( &l2c_310_lock, &lock_context ); 956 957 for (; adx <= block_end; adx += CPU_DATA_CACHE_ALIGNMENT ) { 958 /* Invalidate L2 cache line */ 959 l2cc->inv_pa = adx; 960 } 961 962 l2c_310_sync( l2cc ); 963 964 rtems_interrupt_lock_release( &l2c_310_lock, &lock_context ); 965 } 966 } 967 954 968 955 969 static inline void … … 1211 1225 ) 1212 1226 { 1213 if ( n_bytes != 0 ) { 1214 arm_cache_l1_flush_data_range( 1215 d_addr, 1216 n_bytes 1217 ); 1218 l2c_310_flush_range( 1219 d_addr, 1220 n_bytes 1221 ); 1222 } 1227 arm_cache_l1_flush_data_range( 1228 d_addr, 1229 n_bytes 1230 ); 1231 l2c_310_flush_range( 1232 d_addr, 1233 n_bytes 1234 ); 1223 1235 } 1224 1236 … … 1236 1248 ) 1237 1249 { 1238 if ( n_bytes > 0 ) { 1239 /* Back starting address up to start of a line and invalidate until ADDR_LAST */ 1240 uint32_t adx = (uint32_t) addr_first 1241 & ~L2C_310_DATA_LINE_MASK; 1242 const uint32_t ADDR_LAST = 1243 (uint32_t)( (size_t)addr_first + n_bytes - 1 ); 1244 uint32_t block_end = 1245 L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES ); 1246 1247 /* We have to apply a lock. Thus we will operate only L2C_310_MAX_LOCKING_BYTES 1248 * at a time */ 1249 for (; 1250 adx <= ADDR_LAST; 1251 adx = block_end + 1, 1252 block_end = L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES )) { 1253 l2c_310_invalidate_range( 1254 adx, 1255 block_end 1256 ); 1257 } 1258 arm_cache_l1_invalidate_data_range( 1259 addr_first, 1260 n_bytes 1261 ); 1262 1263 adx = (uint32_t)addr_first & ~L2C_310_DATA_LINE_MASK; 1264 block_end = L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES ); 1265 for (; 1266 adx <= ADDR_LAST; 1267 adx = block_end + 1, 1268 block_end = L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES )) { 1269 l2c_310_invalidate_range( 1270 adx, 1271 block_end 1272 ); 1273 } 1274 arm_cache_l1_invalidate_data_range( 1275 addr_first, 1276 n_bytes 1277 ); 1278 } 1250 l2c_310_invalidate_range( 1251 addr_first, 1252 n_bytes 1253 ); 1254 arm_cache_l1_invalidate_data_range( 1255 addr_first, 1256 n_bytes 1257 ); 1279 1258 } 1280 1259
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