Ignore:
Timestamp:
May 8, 2009, 6:22:51 PM (10 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.9
Children:
82948ea1
Parents:
ef3a82f
Message:

2009-05-08 Kate Feng <feng1@…>

PR1395/bsps

  • Updated the changes from RTEMS-4.8.0, which were made since Oct. 2007.
  • network/if_1GHz/if_wm.c: fixed some bugs in the 1GHz driver.
  • pci/pci_interface.c: + Enabled PCI "Read", "Read Line", and "Read Multiple" + Agressive Prefetch to improve the performance of the PCI based

applications (e.g. 1GHz NIC).

  • irq/BSP_irq.c : Replaced the irq/irq.c, and used GT_GPP_Value register to monitor the cause of the level sensitive interrupts. This unique solution solves various bugs in the 1GHz network drivers Fixed bugs in compute_pic_masks_from_prio()
  • pci/pci.c : Updated it to be consistent with the original pci.c
  • written by Eric Valette. There is no change in its function.
  • irq/irq_init.c : set defaultIrq->next_handler to be 0
  • for BSP_SHARED_HANDLER_SUPPORT.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pcireg.h

    ref3a82f rcf599996  
    55 *     Christopher G. Demetriou.  All rights reserved.
    66 * Copyright (c) 1994, 1996 Charles M. Hannum.  All rights reserved.
     7 * Copyright (C) 2007 Brookhaven National Laboratory, Shuchen Kate Feng
    78 *
    89 * Redistribution and use in source and binary forms, with or without
     
    3132 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3233 */
     34#include <bsp.h>
    3335
    3436/*
     
    306308
    307309#define PCI_MAPREG_IO_ADDR(mr)                                          \
    308             ((mr) & PCI_MAPREG_IO_ADDR_MASK)
     310            ((mr+PCI0_IO_BASE) & PCI_MAPREG_IO_ADDR_MASK)
    309311#define PCI_MAPREG_IO_SIZE(mr)                                          \
    310312            (PCI_MAPREG_IO_ADDR(mr) & -PCI_MAPREG_IO_ADDR(mr))
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