Ignore:
Timestamp:
May 8, 2009, 6:22:51 PM (10 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.9
Children:
82948ea1
Parents:
ef3a82f
Message:

2009-05-08 Kate Feng <feng1@…>

PR1395/bsps

  • Updated the changes from RTEMS-4.8.0, which were made since Oct. 2007.
  • network/if_1GHz/if_wm.c: fixed some bugs in the 1GHz driver.
  • pci/pci_interface.c: + Enabled PCI "Read", "Read Line", and "Read Multiple" + Agressive Prefetch to improve the performance of the PCI based

applications (e.g. 1GHz NIC).

  • irq/BSP_irq.c : Replaced the irq/irq.c, and used GT_GPP_Value register to monitor the cause of the level sensitive interrupts. This unique solution solves various bugs in the 1GHz network drivers Fixed bugs in compute_pic_masks_from_prio()
  • pci/pci.c : Updated it to be consistent with the original pci.c
  • written by Eric Valette. There is no change in its function.
  • irq/irq_init.c : set defaultIrq->next_handler to be 0
  • for BSP_SHARED_HANDLER_SUPPORT.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h

    ref3a82f rcf599996  
    88 *  http://www.rtems.com/license/LICENSE.
    99 *
    10  *  S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
     10 *  (C) S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
     11 *
    1112 *
    1213 */
     
    2324#include <bsp/vectors.h>
    2425
    25 #include <bsp/bspMvme5500.h>
     26/* Board type */
     27typedef enum {
     28        undefined = 0,
     29        MVME5500,
     30        MVME6100
     31} BSP_BoardTypes;
     32
     33BSP_BoardTypes BSP_getBoardType();
     34
     35/* Board type */
     36typedef enum {
     37        Undefined,
     38        UNIVERSE2,
     39        TSI148,
     40} BSP_VMEchipTypes;
     41
     42BSP_VMEchipTypes BSP_getVMEchipType();
     43
     44/* The version of Discovery system controller */
     45
     46typedef enum {
     47        notdefined,
     48        GT64260A,
     49        GT64260B,           
     50        MV64360,
     51} DiscoveryChipVersion;
     52
     53DiscoveryChipVersion BSP_getDiscoveryChipVersion();
     54
     55#define _256M           0x10000000
     56#define _512M           0x20000000
     57
     58#define GT64x60_REG_BASE        0xf1000000  /* Base of GT64260 Reg Space */
     59#define GT64x60_REG_SPACE_SIZE  0x10000     /* 64Kb Internal Reg Space */
     60
     61#define GT64x60_DEV1_BASE       0xf1100000  /* Device bank1(chip select 1) base
     62                                             */
     63#define GT64260_DEV1_SIZE       0x00100000 /* Device bank size */
    2664
    2765/* fundamental addresses for this BSP (PREPxxx are from libcpu/io.h) */
    28 #define _IO_BASE GT64260_REG_BASE
     66#define _IO_BASE GT64x60_REG_BASE
     67
     68#define BSP_NVRAM_BASE_ADDR     0xf1110000
     69
     70#define BSP_RTC_INTA_REG        0x7ff0
     71#define BSP_RTC_SECOND          0x7ff2 
     72#define BSP_RTC_MINUTE          0x7ff3
     73#define BSP_RTC_HOUR            0x7ff4 
     74#define BSP_RTC_DATE            0x7ff5
     75#define BSP_RTC_INTERRUPTS      0x7ff6
     76#define BSP_RTC_WATCHDOG        0x7ff7
    2977
    3078/* PCI0 Domain I/O space */
     
    70118
    71119#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
     120#define BSP_INTERRUPT_STACK_SIZE  (16 * 1024) /* <skf> 2/09 wants it to be adjustable by BSP */
    72121
    73122/* uart.c uses out_8 instead of outb  */
    74 #define BSP_UART_IOBASE_COM1    GT64260_DEV1_BASE + 0x20000
    75 #define BSP_UART_IOBASE_COM2    GT64260_DEV1_BASE + 0x21000
     123#define BSP_UART_IOBASE_COM1    GT64x60_DEV1_BASE + 0x20000
     124#define BSP_UART_IOBASE_COM2    GT64x60_DEV1_BASE + 0x21000
    76125
    77126#define BSP_CONSOLE_PORT                BSP_UART_COM1  /* console */
    78127#define BSP_UART_BAUD_BASE              115200
    79128
    80 /*
    81  * Vital Board data Start using DATA RESIDUAL
    82  */
    83129/*
    84130 * Total memory using RESIDUAL DATA
     
    101147  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
    102148
     149extern rtems_configuration_table  BSP_Configuration;
    103150extern void BSP_panic(char *s);
    104151extern void bsp_reset(void);
     
    119166#endif
    120167
    121 extern int
    122 RTEMS_BSP_NETWORK_DRIVER_ATTACH(/* struct rtems_bsdnet_ifconfig * */);
     168extern int RTEMS_BSP_NETWORK_DRIVER_ATTACH();
    123169
    124170/*
     
    127173#define BSP_ZERO_WORKSPACE_AUTOMATICALLY TRUE
    128174
    129 /* As per Linux, This should be in the ppc/system.h */
     175#define gccMemBar() RTEMS_COMPILER_MEMORY_BARRIER()
    130176
     177static inline void lwmemBar()
     178{
     179    asm volatile("lwsync":::"memory");
     180}
     181
     182static inline void io_flush()
     183{
     184    asm volatile("isync":::"memory");
     185}
    131186static inline void memBar()
    132187{
    133188    asm volatile("sync":::"memory");
    134189}
    135 
    136190static inline void ioBar()
    137191{
    138     asm volatile("eieio");
     192    asm volatile("eieio":::"memory");
    139193}
    140194
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