Changeset cf1f72e in rtems for c/src/lib


Ignore:
Timestamp:
Jun 13, 2000, 9:53:38 PM (21 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
7d52750
Parents:
f0b11d63
Message:

Moved i386 and m68k cache management code to libcpu. Everything
now is an implementation of the prototypes in rtems/rtems/cache.h.
The libcpu/i386/wrapup directory is no longer needed.
The PowerPC needs this done to it.

Location:
c/src/lib
Files:
8 added
8 edited
2 moved

Legend:

Unmodified
Added
Removed

  • c/src/lib/libbsp/i386/i386ex/wrapup/Makefile.am

    rf0b11d63 rcf1f72e  
    1414
    1515# bummer; have to use $foreach since % pattern subst rules only replace 1x
    16 OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.o))
     16OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \
     17       $(wildcard ../../../../libcpu/i386/$(ARCH)/*.o)
    1718LIB = $(ARCH)/libbsp.a
    1819

  • c/src/lib/libbsp/i386/pc386/wrapup/Makefile.am

    rf0b11d63 rcf1f72e  
    1414
    1515# bummer; have to use $foreach since % pattern subst rules only replace 1x
    16 OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.o))
     16OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \
     17       $(wildcard ../../../../libcpu/i386/$(ARCH)/*.o)
    1718LIB = $(ARCH)/libbsp.a
    1819

  • c/src/lib/libbsp/i386/ts_386ex/wrapup/Makefile.am

    rf0b11d63 rcf1f72e  
    1414
    1515# bummer; have to use $foreach since % pattern subst rules only replace 1x
    16 OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.o))
     16OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \
     17       $(wildcard ../../../../libcpu/i386/$(ARCH)/*.o)
    1718LIB = $(ARCH)/libbsp.a
    1819

  • c/src/lib/libbsp/m68k/mvme167/wrapup/Makefile.am

    rf0b11d63 rcf1f72e  
    1414# bummer; have to use $foreach since % pattern subst rules only replace 1x
    1515OBJS = $(foreach piece, $(BSP_PIECES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \
     16    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/shared/*/$(ARCH)/*.o) \
    1617    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/$(RTEMS_CPU_MODEL)/fpsp/$(ARCH)/fpsp.rel)
    1718

  • c/src/lib/libc/malloc.c

    rf0b11d63 rcf1f72e  
    420420}
    421421
    422 
    423 /*
    424  *  rtems_cache_aligned_malloc
    425  *
    426  *  DESCRIPTION:
    427  *
    428  *  This function is used to allocate storage that spans an
    429  *  integral number of cache blocks.
    430  */
    431 RTEMS_INLINE_ROUTINE void * rtems_cache_aligned_malloc (
    432   size_t nbytes
    433 )
    434 {
    435   /*
    436    * Arrange to have the user storage start on the first cache
    437    * block beyond the header.
    438    */
    439   return (void *) ((((unsigned long) malloc( nbytes + _CPU_DATA_CACHE_ALIGNMENT - 1 ))
    440                                                                         + _CPU_DATA_CACHE_ALIGNMENT - 1 ) &(~(_CPU_DATA_CACHE_ALIGNMENT - 1)) );
    441 }
    442 
    443 #endif
    444 
     422#endif

  • c/src/lib/libcpu/i386/Makefile.am

    rf0b11d63 rcf1f72e  
    66ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
    77
    8 LIBNAME = libcpu
    9 LIB = $(ARCH)/$(LIBNAME).a
     8VPATH = @srcdir@:@srcdir@/../shared/src
    109
    11 C_FILES = cpu.c displayCpu.c page.c
     10C_FILES = cache.c cache_aligned_malloc.c cache_manager.c displayCpu.c idt.c page.c
    1211C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
    1312
    14 H_FILES = cpu.h registers.h cpuModel.h
     13H_FILES = cache_.h
     14INSTALLED_H_FILES = cpu.h registers.h cpuModel.h
    1515
    16 S_FILES = cpu_asm.S cpuModel.S
     16S_FILES = cpuModel.S idtr.S
    1717S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o)
    1818
    … …  
    2222include $(top_srcdir)/../../../../../automake/lib.am
    2323
    24 $(LIB): $(OBJS)
    25         $(make-library)
     24AM_CPPFLAGS += -I$(srcdir)
    2625
    2726$(PROJECT_INCLUDE)/libcpu:
    … …  
    3130        $(INSTALL_DATA) $< $@
    3231
    33 $(PROJECT_RELEASE)/lib/$(LIBNAME)$(LIB_VARIANT).a: $(LIB)
     32$(PROJECT_INCLUDE)/libcpu/cache.h: $(top_srcdir)/../shared/include/cache.h
    3433        $(INSTALL_DATA) $< $@
    3534
    3635PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu \
    37     $(H_FILES:%=$(PROJECT_INCLUDE)/libcpu/%)
     36    $(PROJECT_INCLUDE)/libcpu/cache.h \
     37    $(INSTALLED_H_FILES:%=$(PROJECT_INCLUDE)/libcpu/%)
    3838
    39 TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/$(LIBNAME)$(LIB_VARIANT).a
     39all-local: $(ARCH) $(PREINSTALL_FILES) $(OBJS)
    4040
    41 all-local: $(ARCH) $(PREINSTALL_FILES) $(OBJS) $(LIB) $(TMPINSTALL_FILES)
    42 
    43 .PRECIOUS: $(LIB)
    44 
    45 EXTRA_DIST = cpu.c cpu.h cpuModel.S cpuModel.h cpu_asm.S displayCpu.c page.c \
    46     registers.h
     41EXTRA_DIST = cache.c cache_.h cpu.h cpuModel.S cpuModel.h \
     42    displayCpu.c idt.c idtr.S page.c registers.h
    4743
    4844include $(top_srcdir)/../../../../../automake/local.am

  • c/src/lib/libcpu/m68k/Makefile.am

    rf0b11d63 rcf1f72e  
    66ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
    77
    8 SUBDIRS = m68040
     8if shared
     9SHARED_LIB = shared
     10endif
     11
     12if m68040
     13CPU_SUBDIR = m68040
     14endif
     15
     16SUBDIRS = $(SHARED_LIB) $(CPU_SUBDIR)
    917
    1018include $(top_srcdir)/../../../../../automake/subdirs.am

  • c/src/lib/libcpu/m68k/configure.in

    rf0b11d63 rcf1f72e  
    2727RTEMS_CHECK_BSP_CACHE(RTEMS_BSP)
    2828
     29AM_CONDITIONAL(shared, test "$RTEMS_CPU_MODEL" = "m68020" \
     30|| test "$RTEMS_CPU_MODEL" = "m68020" \
     31|| test "$RTEMS_CPU_MODEL" = "m68030" \
     32|| test "$RTEMS_CPU_MODEL" = "m68lc040" \
     33|| test "$RTEMS_CPU_MODEL" = "m68040" \
     34|| test "$RTEMS_CPU_MODEL" = "m68060" )
     35
    2936AM_CONDITIONAL(m68040, test "$RTEMS_CPU_MODEL" = "m68040")
    3037
    … …  
    3239AC_OUTPUT(
    3340Makefile
     41shared/Makefile
     42shared/cache/Makefile
    3443m68040/Makefile
    3544m68040/fpsp/Makefile)

  • c/src/lib/libcpu/shared/src/cache_manager.c

    rf0b11d63 rcf1f72e  
    1 /*  cache.c
    2  *
     1/*
    32 *  Cache Manager
    43 *
    … …  
    1110 *
    1211 * 
    13  *  The functions in this file define the API to the RTEMS Cache Manager and
     12 *  The functions in this file implement the API to the RTEMS Cache Manager and
    1413 *  are divided into data cache and instruction cache functions. Data cache
    1514 *  functions are only declared if a data cache is supported. Instruction
    … …  
    3130 */
    3231
    33 #include <rtems/system.h>
     32#include <rtems.h>
    3433#include <sys/types.h>
    35 #include <rtems/rtems/cache.h>
    36 
    37 
    38 /*
    39  * THESE FUNCTIONS ONLY EXIST IF WE HAVE A DATA CACHE
    40  */
    41 #if defined(_CPU_DATA_CACHE_ALIGNMENT)
     34#include <libcpu/cache.h>
     35#include "cache_.h"
     36
     37
     38/*
     39 * THESE FUNCTIONS ONLY HAVE BODIES IF WE HAVE A DATA CACHE
     40 */
    4241
    4342/*
    … …  
    4948rtems_flush_multiple_data_cache_lines( const void * d_addr, size_t n_bytes )
    5049{
    51     const void * final_address;
    52    /*
    53     * Set d_addr to the beginning of the cache line; final_address indicates
    54     * the last address_t which needs to be pushed. Increment d_addr and push
    55     * the resulting line until final_address is passed.
    56     */
    57     final_address = (void *)((size_t)d_addr + n_bytes - 1);
    58     d_addr = (void *)((size_t)d_addr & ~(_CPU_DATA_CACHE_ALIGNMENT - 1));
    59     while( d_addr <= final_address )  {
    60         _CPU_flush_1_data_cache_line( d_addr );
    61         d_addr = (void *)((size_t)d_addr + _CPU_DATA_CACHE_ALIGNMENT);
    62     }
     50#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     51  const void * final_address;
     52
     53 /*
     54  * Set d_addr to the beginning of the cache line; final_address indicates
     55  * the last address_t which needs to be pushed. Increment d_addr and push
     56  * the resulting line until final_address is passed.
     57  */
     58
     59  final_address = (void *)((size_t)d_addr + n_bytes - 1);
     60  d_addr = (void *)((size_t)d_addr & ~(_CPU_DATA_CACHE_ALIGNMENT - 1));
     61  while( d_addr <= final_address )  {
     62    _CPU_flush_1_data_cache_line( d_addr );
     63    d_addr = (void *)((size_t)d_addr + _CPU_DATA_CACHE_ALIGNMENT);
     64  }
     65#endif
    6366}
    6467
    … …  
    6972 * perform the invalidations.
    7073 */
     74
    7175void
    7276rtems_invalidate_multiple_data_cache_lines( const void * d_addr, size_t n_bytes )
    7377{
    74     const void * final_address;
    75    /*
    76     * Set d_addr to the beginning of the cache line; final_address indicates
    77     * the last address_t which needs to be invalidated. Increment d_addr and
    78     * invalidate the resulting line until final_address is passed.
    79     */
    80     final_address = (void *)((size_t)d_addr + n_bytes - 1);
    81     d_addr = (void *)((size_t)d_addr & ~(_CPU_DATA_CACHE_ALIGNMENT - 1));
    82     while( final_address > d_addr ) {
    83         _CPU_invalidate_1_data_cache_line( d_addr );
    84         d_addr = (void *)((size_t)d_addr + _CPU_DATA_CACHE_ALIGNMENT);
    85     }
     78#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     79  const void * final_address;
     80
     81 /*
     82  * Set d_addr to the beginning of the cache line; final_address indicates
     83  * the last address_t which needs to be invalidated. Increment d_addr and
     84  * invalidate the resulting line until final_address is passed.
     85  */
     86
     87  final_address = (void *)((size_t)d_addr + n_bytes - 1);
     88  d_addr = (void *)((size_t)d_addr & ~(_CPU_DATA_CACHE_ALIGNMENT - 1));
     89  while( final_address > d_addr ) {
     90    _CPU_invalidate_1_data_cache_line( d_addr );
     91    d_addr = (void *)((size_t)d_addr + _CPU_DATA_CACHE_ALIGNMENT);
     92  }
     93#endif
    8694}
    8795
    … …  
    94102rtems_flush_entire_data_cache( void )
    95103{
     104#if defined(_CPU_DATA_CACHE_ALIGNMENT)
    96105   /*
    97106    * Call the CPU-specific routine
    98107    */
    99108   _CPU_flush_entire_data_cache();
    100      
     109#endif
    101110}
    102111
    … …  
    109118rtems_invalidate_entire_data_cache( void )
    110119{
    111    /*
    112     * Call the CPU-specific routine
    113     */
    114    _CPU_invalidate_entire_data_cache();
     120#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     121 /*
     122  * Call the CPU-specific routine
     123  */
     124
     125 _CPU_invalidate_entire_data_cache();
     126#endif
    115127}
    116128
    … …  
    122134rtems_get_data_cache_line_size( void )
    123135{
    124         return _CPU_DATA_CACHE_ALIGNMENT;
     136#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     137  return _CPU_DATA_CACHE_ALIGNMENT;
     138#else
     139  return 0;
     140#endif
    125141}
    126142
    … …  
    133149rtems_freeze_data_cache( void )
    134150{
    135         _CPU_freeze_data_cache();
     151#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     152  _CPU_freeze_data_cache();
     153#endif
    136154}
    137155
    … …  
    142160void rtems_unfreeze_data_cache( void )
    143161{
    144         _CPU_unfreeze_data_cache();
     162#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     163  _CPU_unfreeze_data_cache();
     164#endif
    145165}
    146166
    … …  
    150170rtems_enable_data_cache( void )
    151171{
    152         _CPU_enable_data_cache();
     172#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     173  _CPU_enable_data_cache();
     174#endif
    153175}
    154176
    … …  
    158180rtems_disable_data_cache( void )
    159181{
    160         _CPU_disable_data_cache();
    161 }
    162 #endif
    163 
    164 
    165 
    166 /*
    167  * THESE FUNCTIONS ONLY EXIST IF WE HAVE AN INSTRUCTION CACHE
    168  */
    169 #if defined(_CPU_INST_CACHE_ALIGNMENT)
     182#if defined(_CPU_DATA_CACHE_ALIGNMENT)
     183  _CPU_disable_data_cache();
     184#endif
     185}
     186
     187
     188
     189/*
     190 * THESE FUNCTIONS ONLY HAVE BODIES IF WE HAVE AN INSTRUCTION CACHE
     191 */
    170192
    171193/*
    … …  
    177199rtems_invalidate_multiple_inst_cache_lines( const void * i_addr, size_t n_bytes )
    178200{
    179     const void * final_address;
    180    /*
    181     * Set i_addr to the beginning of the cache line; final_address indicates
    182     * the last address_t which needs to be invalidated. Increment i_addr and
    183     * invalidate the resulting line until final_address is passed.
    184     */
    185     final_address = (void *)((size_t)i_addr + n_bytes - 1);
    186     i_addr = (void *)((size_t)i_addr & ~(_CPU_INST_CACHE_ALIGNMENT - 1));
    187     while( final_address > i_addr ) {
    188         _CPU_invalidate_1_inst_cache_line( i_addr );
    189         i_addr = (void *)((size_t)i_addr + _CPU_INST_CACHE_ALIGNMENT);
    190     }
     201#if defined(_CPU_INST_CACHE_ALIGNMENT)
     202  const void * final_address;
     203
     204 /*
     205  * Set i_addr to the beginning of the cache line; final_address indicates
     206  * the last address_t which needs to be invalidated. Increment i_addr and
     207  * invalidate the resulting line until final_address is passed.
     208  */
     209
     210  final_address = (void *)((size_t)i_addr + n_bytes - 1);
     211  i_addr = (void *)((size_t)i_addr & ~(_CPU_INST_CACHE_ALIGNMENT - 1));
     212  while( final_address > i_addr ) {
     213    _CPU_invalidate_1_inst_cache_line( i_addr );
     214    i_addr = (void *)((size_t)i_addr + _CPU_INST_CACHE_ALIGNMENT);
     215  }
     216#endif
    191217}
    192218
    … …  
    199225rtems_invalidate_entire_inst_cache( void )
    200226{
    201    /*
    202     * Call the CPU-specific routine
    203     */
    204    _CPU_invalidate_entire_inst_cache();
     227#if defined(_CPU_INST_CACHE_ALIGNMENT)
     228 /*
     229  * Call the CPU-specific routine
     230  */
     231
     232 _CPU_invalidate_entire_inst_cache();
     233#endif
    205234}
    206235
    … …  
    212241rtems_get_inst_cache_line_size( void )
    213242{
    214         return _CPU_INST_CACHE_ALIGNMENT;
     243#if defined(_CPU_INST_CACHE_ALIGNMENT)
     244  return _CPU_INST_CACHE_ALIGNMENT;
     245#else
     246  return 0;
     247#endif
    215248}
    216249
    … …  
    223256rtems_freeze_inst_cache( void )
    224257{
    225         _CPU_freeze_inst_cache();
     258#if defined(_CPU_INST_CACHE_ALIGNMENT)
     259  _CPU_freeze_inst_cache();
     260#endif
    226261}
    227262
    … …  
    232267void rtems_unfreeze_inst_cache( void )
    233268{
    234         _CPU_unfreeze_inst_cache();
     269#if defined(_CPU_INST_CACHE_ALIGNMENT)
     270  _CPU_unfreeze_inst_cache();
     271#endif
    235272}
    236273
    … …  
    240277rtems_enable_inst_cache( void )
    241278{
    242         _CPU_enable_inst_cache();
     279#if defined(_CPU_INST_CACHE_ALIGNMENT)
     280  _CPU_enable_inst_cache();
     281#endif
    243282}
    244283
    … …  
    248287rtems_disable_inst_cache( void )
    249288{
    250         _CPU_disable_inst_cache();
    251 }
    252 #endif
     289#if defined(_CPU_INST_CACHE_ALIGNMENT)
     290  _CPU_disable_inst_cache();
     291#endif
     292}
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