Changeset cd3d747 in rtems for c/src/lib/libbsp/arm/tms570

Timestamp:
03/27/17 06:01:38 (7 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
5, master
Children:
0027682
Parents:
82c0836
git-author:
Sebastian Huber <sebastian.huber@…> (03/27/17 06:01:38)
git-committer:
Sebastian Huber <sebastian.huber@…> (03/28/17 08:32:37)
Message:

arm: Optimize context switch

Set CPU_ENABLE_ROBUST_THREAD_DISPATCH to TRUE. In this case the
interrupts are always enabled during a context switch even after
interrupt processing (see #2751). Remove the CPSR from the context
control since it contains only volatile bits.

Close #2954.

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