Changeset cd3d747 in rtems for c/src/lib/libbsp/arm/tms570


Ignore:
Timestamp:
Mar 27, 2017, 6:01:38 AM (3 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
0027682
Parents:
82c0836
git-author:
Sebastian Huber <sebastian.huber@…> (03/27/17 06:01:38)
git-committer:
Sebastian Huber <sebastian.huber@…> (03/28/17 08:32:37)
Message:

arm: Optimize context switch

Set CPU_ENABLE_ROBUST_THREAD_DISPATCH to TRUE. In this case the
interrupts are always enabled during a context switch even after
interrupt processing (see #2751). Remove the CPSR from the context
control since it contains only volatile bits.

Close #2954.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/tms570/startup/bspstart.c

    r82c0836 rcd3d747  
    3535  void *need_remap_ptr;
    3636  unsigned int need_remap_int;
    37 
    38   #if BYTE_ORDER == BIG_ENDIAN
    39     /*
    40      * If CPU is big endian (TMS570 family variant)
    41      * set the CPU mode to supervisor and big endian.
    42      * Do not set mode if CPU is little endian
    43      * (RM48 family variant) for which default mode 0x13
    44      * defined in cpukit/score/cpu/arm/cpu.c
    45      * is right.
    46      */
    47     arm_cpu_mode = 0x213;
    48   #endif
    4937
    5038  tms570_initialize_and_clear();
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