Ignore:
Timestamp:
Nov 15, 2000, 9:38:55 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
ca406082
Parents:
23bdd25e
Message:

2000-11-14 Jiri Gaisler <jgais@…>

  • shared/src/cache_manager.c (rtems_cache_invalidate_multiple_instruction_lines): If CPU_INSTRUCTION_CACHE_ALIGNMENT is defined but 0, then there is an instruction cache but no notion of line size.
File:
1 edited

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