Changeset cb88748 in rtems

Timestamp:

11/15/00 21:38:55 (23 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

ca406082

Parents:

23bdd25e

Message:

2000-11-14 Jiri Gaisler <jgais@…>

• shared/src/cache_manager.c (rtems_cache_invalidate_multiple_instruction_lines): If CPU_INSTRUCTION_CACHE_ALIGNMENT is defined but 0, then there is an instruction cache but no notion of line size.

Location:

c/src/lib/libcpu

Files:

• ChangeLog (modified) (1 diff)
• shared/src/cache_manager.c (modified) (1 diff)

c/src/lib/libcpu/ChangeLog

@@ +1 @@
+2000-11-14      Jiri Gaisler <jgais@ws.estec.esa.nl>
+
+        * shared/src/cache_manager.c
+        (rtems_cache_invalidate_multiple_instruction_lines): If 
+        CPU_INSTRUCTION_CACHE_ALIGNMENT is defined but 0, then there is 
+        an instruction cache but no notion of line size.
+
 2000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 

c/src/lib/libcpu/shared/src/cache_manager.c

@@ -208 +208 @@
 rtems_cache_invalidate_multiple_instruction_lines( const void * i_addr, size_t n_bytes )
 {
-#if defined(CPU_INSTRUCTION_CACHE_ALIGNMENT)
+#if CPU_INSTRUCTION_CACHE_ALIGNMENT
   const void * final_address;