Changeset cb88748 in rtems


Ignore:
Timestamp:
Nov 15, 2000, 9:38:55 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
ca406082
Parents:
23bdd25e
Message:

2000-11-14 Jiri Gaisler <jgais@…>

  • shared/src/cache_manager.c (rtems_cache_invalidate_multiple_instruction_lines): If CPU_INSTRUCTION_CACHE_ALIGNMENT is defined but 0, then there is an instruction cache but no notion of line size.
Location:
c/src/lib/libcpu
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/ChangeLog

    r23bdd25e rcb88748  
     12000-11-14      Jiri Gaisler <jgais@ws.estec.esa.nl>
     2
     3        * shared/src/cache_manager.c
     4        (rtems_cache_invalidate_multiple_instruction_lines): If
     5        CPU_INSTRUCTION_CACHE_ALIGNMENT is defined but 0, then there is
     6        an instruction cache but no notion of line size.
     7
    182000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    29
  • c/src/lib/libcpu/shared/src/cache_manager.c

    r23bdd25e rcb88748  
    208208rtems_cache_invalidate_multiple_instruction_lines( const void * i_addr, size_t n_bytes )
    209209{
    210 #if defined(CPU_INSTRUCTION_CACHE_ALIGNMENT)
     210#if CPU_INSTRUCTION_CACHE_ALIGNMENT
    211211  const void * final_address;
    212212
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