Changeset c9b66f5 in rtems for c/src/lib/libcpu/arm


Ignore:
Timestamp:
Aug 22, 2013, 12:00:51 PM (7 years ago)
Author:
Ric Claus <claus@…>
Branches:
4.11, master
Children:
6e4c01e
Parents:
1a246d7e
git-author:
Ric Claus <claus@…> (08/22/13 12:00:51)
git-committer:
Sebastian Huber <sebastian.huber@…> (08/22/13 12:20:47)
Message:

bsps/arm: Add more CP15 cache functions

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/shared/include/arm-cp15.h

    r1a246d7e rc9b66f5  
    578578}
    579579
     580/* CCSIDR, Cache Size ID Register */
     581
     582static inline uint32_t arm_cp15_get_cache_size_id(void)
     583{
     584  ARM_SWITCH_REGISTERS;
     585  uint32_t val;
     586
     587  __asm__ volatile (
     588    ARM_SWITCH_TO_ARM
     589    "mcr p15, 1, %[val], c0, c0, 0\n"
     590     ARM_SWITCH_BACK
     591    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     592  );
     593
     594  return val;
     595}
     596
     597/* CLIDR, Cache Level ID Register */
     598
     599static inline uint32_t arm_cp15_get_cache_level_id(void)
     600{
     601  ARM_SWITCH_REGISTERS;
     602  uint32_t val;
     603
     604  __asm__ volatile (
     605    ARM_SWITCH_TO_ARM
     606    "mcr p15, 1, %[val], c0, c0, 1\n"
     607     ARM_SWITCH_BACK
     608    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     609  );
     610
     611  return val;
     612}
     613
     614/* CSSELR, Cache Size Selection Register */
     615
     616static inline uint32_t arm_cp15_get_cache_size_selection(void)
     617{
     618  ARM_SWITCH_REGISTERS;
     619  uint32_t val;
     620
     621  __asm__ volatile (
     622    ARM_SWITCH_TO_ARM
     623    "mcr p15, 2, %[val], c0, c0, 0\n"
     624     ARM_SWITCH_BACK
     625    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     626  );
     627
     628  return val;
     629}
     630
     631static inline void arm_cp15_set_cache_size_selection(uint32_t val)
     632{
     633  ARM_SWITCH_REGISTERS;
     634
     635  __asm__ volatile (
     636    ARM_SWITCH_TO_ARM
     637    "mcr p15, 2, %[val], c0, c0, 0\n"
     638     ARM_SWITCH_BACK
     639    : ARM_SWITCH_OUTPUT
     640    : [val] "r" (val)
     641    : "memory"
     642  );
     643}
     644
    580645static inline void arm_cp15_cache_invalidate(void)
    581646{
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