Changeset c83c325 in rtems


Ignore:
Timestamp:
Sep 12, 2007, 3:16:02 PM (12 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
47d88b7
Parents:
bd51a63
Message:

2007-09-12 Joel Sherrill <joel.sherrill@…>

PR 1257/bsps

  • shared/irq/idt.c, shared/irq/irq.c, shared/irq/irq_init.c: Code outside of cpukit should use the public API for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the public API and directly accessing _CPU_ISR_Disable and _CPU_ISR_Enable, they were bypassing the compiler memory barrier directive which could lead to problems. This patch also changes the type of the variable passed into these routines and addresses minor style issues.
Location:
c/src/lib/libbsp/i386
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/i386/ChangeLog

    rbd51a63 rc83c325  
     12007-09-12      Joel Sherrill <joel.sherrill@OARcorp.com>
     2
     3        PR 1257/bsps
     4        * shared/irq/idt.c, shared/irq/irq.c, shared/irq/irq_init.c: Code
     5        outside of cpukit should use the public API for
     6        rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
     7        public API and directly accessing _CPU_ISR_Disable and
     8        _CPU_ISR_Enable, they were bypassing the compiler memory barrier
     9        directive which could lead to problems. This patch also changes the
     10        type of the variable passed into these routines and addresses minor
     11        style issues.
     12
    1132007-03-30      Ralf Corsépius <ralf.corsepius@rtems.org>
    214
  • c/src/lib/libbsp/i386/shared/irq/idt.c

    rbd51a63 rc83c325  
    6363    interrupt_gate_descriptor*  idt_entry_tbl;
    6464    unsigned                    limit;
    65     unsigned int                level;
     65    rtems_interrupt_level       level;
    6666
    6767    i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
     
    8484    }
    8585
    86     _CPU_ISR_Disable(level);
     86    rtems_interrupt_disable(level);
    8787
    8888    raw_irq_table [irq->idtIndex] = *irq;
     
    9090    irq->on(irq);
    9191
    92     _CPU_ISR_Enable(level);
     92    rtems_interrupt_enable(level);
    9393    return 1;
    9494}
     
    101101    unsigned                    limit;
    102102    interrupt_gate_descriptor   new;
    103     unsigned int                level;
     103    rtems_interrupt_level       level;
    104104
    105105    i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
     
    111111      return;
    112112    }
    113     _CPU_ISR_Disable(level)
     113    rtems_interrupt_disable(level);
    114114    * ((unsigned int *) oldHdl) = idt_entry_tbl[vector].low_offsets_bits |
    115115        (idt_entry_tbl[vector].high_offsets_bits << 16);
     
    118118    idt_entry_tbl[vector] = new;
    119119
    120     _CPU_ISR_Enable(level);
     120    rtems_interrupt_enable(level);
    121121}
    122122
     
    145145    interrupt_gate_descriptor*  idt_entry_tbl;
    146146    unsigned                    limit;
    147     unsigned int                level;
     147    rtems_interrupt_level       level;
    148148
    149149    i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
     
    165165      return 0;
    166166    }
    167     _CPU_ISR_Disable(level);
     167    rtems_interrupt_disable(level);
    168168
    169169    idt_entry_tbl[irq->idtIndex] = default_idt_entry;
     
    174174    raw_irq_table[irq->idtIndex].idtIndex = irq->idtIndex;
    175175
    176     _CPU_ISR_Enable(level);
     176    rtems_interrupt_enable(level);
    177177
    178178    return 1;
     
    186186    unsigned                    limit;
    187187    unsigned                    i;
    188     unsigned                    level;
     188    rtems_interrupt_level       level;
    189189    interrupt_gate_descriptor*  idt_entry_tbl;
    190190
     
    204204    default_raw_irq_entry       = config->defaultRawEntry;
    205205
    206     _CPU_ISR_Disable(level);
     206    rtems_interrupt_disable(level);
    207207
    208208    create_interrupt_gate_descriptor (&default_idt_entry, default_raw_irq_entry.hdl);
     
    219219      }
    220220    }
    221     _CPU_ISR_Enable(level);
     221    rtems_interrupt_enable(level);
    222222
    223223    return 1;
  • c/src/lib/libbsp/i386/shared/irq/irq.c

    rbd51a63 rc83c325  
    5757int BSP_irq_disable_at_i8259s    (const rtems_irq_number irqLine)
    5858{
    59   unsigned short mask;
    60   unsigned int  level;
     59  unsigned short        mask;
     60  rtems_interrupt_level level;
    6161
    6262  if ( ((int)irqLine < BSP_LOWEST_OFFSET) ||
     
    6565    return 1;
    6666
    67   _CPU_ISR_Disable(level);
     67  rtems_interrupt_disable(level);
    6868
    6969  mask = 1 << irqLine;
     
    7878    outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
    7979  }
    80   _CPU_ISR_Enable (level);
     80  rtems_interrupt_enable(level);
    8181
    8282  return 0;
     
    9292int BSP_irq_enable_at_i8259s    (const rtems_irq_number irqLine)
    9393{
    94   unsigned short mask;
    95   unsigned int  level;
     94  unsigned short        mask;
     95  rtems_interrupt_level level;
    9696
    9797  if ( ((int)irqLine < BSP_LOWEST_OFFSET) ||
     
    100100    return 1;
    101101
    102   _CPU_ISR_Disable(level);
     102  rtems_interrupt_disable(level);
    103103
    104104  mask = ~(1 << irqLine);
     
    113113    outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
    114114  }
    115   _CPU_ISR_Enable (level);
     115  rtems_interrupt_enable(level);
    116116
    117117  return 0;
     
    201201int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
    202202{
    203     unsigned int level;
     203    rtems_interrupt_level      level;
    204204
    205205    if (!isValidInterrupt(irq->name)) {
     
    213213     * to get the previous handler before accepting to disconnect.
    214214     */
    215     _CPU_ISR_Disable(level);
     215    rtems_interrupt_disable(level);
    216216    if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
    217           _CPU_ISR_Enable(level);
     217          rtems_interrupt_enable(level);
    218218      return 0;
    219219    }
     
    232232    irq->on(irq);
    233233
    234     _CPU_ISR_Enable(level);
     234    rtems_interrupt_enable(level);
    235235
    236236    return 1;
     
    239239int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* irq)
    240240{
    241      unsigned int level;
    242 
    243      if (!isValidInterrupt(irq->name)) {
    244       return 0;
    245      }
    246     _CPU_ISR_Disable(level);
    247      *irq = rtems_hdl_tbl[irq->name];
    248     _CPU_ISR_Enable(level);
    249      return 1;
     241    rtems_interrupt_level      level;
     242
     243    if (!isValidInterrupt(irq->name)) {
     244      return 0;
     245    }
     246    rtems_interrupt_disable(level);
     247      *irq = rtems_hdl_tbl[irq->name];
     248    rtems_interrupt_enable(level);
     249    return 1;
    250250}
    251251
    252252int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
    253253{
    254     unsigned int level;
     254    rtems_interrupt_level      level;
    255255
    256256    if (!isValidInterrupt(irq->name)) {
     
    264264     * to get the previous handler before accepting to disconnect.
    265265     */
    266     _CPU_ISR_Disable(level);
     266    rtems_interrupt_disable(level);
    267267    if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
    268       _CPU_ISR_Enable(level);
     268      rtems_interrupt_enable(level);
    269269      return 0;
    270270    }
     
    285285    rtems_hdl_tbl[irq->name] = default_rtems_entry;
    286286
    287     _CPU_ISR_Enable(level);
     287    rtems_interrupt_enable(level);
    288288
    289289    return 1;
     
    296296int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
    297297{
    298     int i;
    299     unsigned int level;
    300    /*
    301     * Store various code accelerators
    302     */
     298    int                    i;
     299    rtems_interrupt_level  level;
     300
     301    /*
     302     * Store various code accelerators
     303     */
    303304    internal_config             = config;
    304305    default_rtems_entry         = config->defaultEntry;
    305306    rtems_hdl_tbl               = config->irqHdlTbl;
    306307
    307     _CPU_ISR_Disable(level);
     308    rtems_interrupt_disable(level);
    308309    /*
    309310     * set up internal tables used by rtems interrupt prologue
     
    325326     */
    326327    BSP_irq_enable_at_i8259s (2);
    327     _CPU_ISR_Enable(level);
     328    rtems_interrupt_enable(level);
    328329    return 1;
    329330}
  • c/src/lib/libbsp/i386/shared/irq/irq_init.c

    rbd51a63 rc83c325  
    115115    interrupt_gate_descriptor*  idt_entry_tbl;
    116116    unsigned int                limit;
    117     unsigned int                level;
     117    rtems_interrupt_level       level;
    118118
    119119    i386_get_info_from_IDTR(&idt_entry_tbl, &limit);
     
    127127    }
    128128
    129     _CPU_ISR_Disable(level);
     129    rtems_interrupt_disable(level);
    130130
    131131    /*
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