Changeset c7cf1d77 in rtems


Ignore:
Timestamp:
Jul 28, 2009, 7:21:24 PM (10 years ago)
Author:
Eric Norum <WENorum@…>
Branches:
4.10, 4.11, master
Children:
5353469
Parents:
f1b90cc
Message:

PR 1420/bsps
Turn on buffered writes to DRAM. As Device Errata SECF124 notes this may cause
double writes, but that's not really a big problem and benchmarking tests have
shown that buffered writes do gain some performance.

Location:
c/src/lib/libbsp/m68k/uC5282
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/uC5282/ChangeLog

    rf1b90cc rc7cf1d77  
     12009-07-28  Eric Norum <norume@aps.anl.gov>
     2
     3        PR 1420/bsps
     4        * startup/bspstart.c: Turn on buffered writes to DRAM. As Device Errata
     5      SECF124 notes this may cause double writes, but that's not really a big
     6      problem and benchmarking tests have shown that buffered writes do gain
     7      some performance.
     8
    192009-07-16      Joel Sherrill <joel.sherrill@oarcorp.com>
    210
  • c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c

    rf1b90cc rc7cf1d77  
    253253  /*
    254254   * Cache SDRAM
     255   * Enable buffered writes
     256   * As Device Errata SECF124 notes this may cause double writes,
     257   * but that's not really a big problem and benchmarking tests have
     258   * shown that buffered writes do gain some performance.
    255259   */
    256260  mcf5282_acr0_mode = MCF5XXX_ACR_AB((uint32_t)RamBase)     |
    257261                      MCF5XXX_ACR_AM((uint32_t)RamSize-1)   |
    258                       MCF5XXX_ACR_EN                         |
    259                       MCF5XXX_ACR_SM_IGNORE;
     262                      MCF5XXX_ACR_EN                        |
     263                      MCF5XXX_ACR_SM_IGNORE                 |
     264                      MCF5XXX_ACR_BWE;
    260265  m68k_set_acr0(mcf5282_acr0_mode);
    261266
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