Changeset c7935a4a in rtems


Ignore:
Timestamp:
May 27, 2009, 12:01:59 PM (10 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, master
Children:
3fb3de1
Parents:
31099c7d
Message:

2009-05-25 Allan Hessenflow <allanh@…>

PR 1418/cpukit

  • rtems/score/cpu.h: corrected _CPU_ISR_Flash implementation, added core synchronization after all cli/sti.
Location:
cpukit/score/cpu/bfin
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/bfin/ChangeLog

    r31099c7d rc7935a4a  
     12009-05-25      Allan Hessenflow <allanh@kallisti.com>
     2
     3        PR 1418/cpukit
     4        * rtems/score/cpu.h: corrected _CPU_ISR_Flash implementation, added
     5        core synchronization after all cli/sti.
     6
    172009-03-12      Joel Sherrill <joel.sherrill@OARcorp.com>
    28
  • cpukit/score/cpu/bfin/rtems/score/cpu.h

    r31099c7d rc7935a4a  
    728728#define _CPU_ISR_Disable( _level ) \
    729729  {                                     \
    730        asm volatile ("cli %0 \n" : "=d" (_level) );     \
     730       asm volatile ("cli %0; csync \n" : "=d" (_level) );     \
    731731  }
    732732 
     
    745745 */
    746746#define _CPU_ISR_Enable( _level ) { \
    747     __asm__ __volatile__ ("sti %0 \n" : : "d" (_level) );   \
     747    __asm__ __volatile__ ("sti %0; csync \n" : : "d" (_level) );   \
    748748  }
    749749
     
    762762 */
    763763#define _CPU_ISR_Flash( _level ) { \
    764     __asm__ __volatile__ ("sti %0; ssync; sti %1" \
    765                           : : "d"(0xffff), "d"(_level)); \
     764    __asm__ __volatile__ ("sti %0; csync; cli r0; csync" \
     765                          : : "d"(_level) : "R0" ); \
    766766  }
    767767
     
    785785#define _CPU_ISR_Set_level( _new_level ) \
    786786  { \
    787     __asm__ __volatile__ ( "sti %0" : : "d"(_new_level ? 0 : 0xffff) ); \
     787    __asm__ __volatile__ ( "sti %0; csync" : : "d"(_new_level ? 0 : 0xffff) ); \
    788788  }
    789789
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